[PATCH] D36849: [AMDGPU] Port of HSAIL inliner

[Stanislav Mekhanoshin via Phabricator via llvm-commits]

rampitec added a comment.

In https://reviews.llvm.org/D36849#853144, @arsenm wrote:

> In https://reviews.llvm.org/D36849#851091, @rampitec wrote:
>
> > In https://reviews.llvm.org/D36849#851079, @arsenm wrote:
> >
> > > I don't like the idea of having a custom inlined, and thinking about this is very premature. We haven't attempted any benchmarking of calls or looked at current inlining behavior or if it could be improved. I would rather not commit this until it is clear it is absolutely necessary.
> >
> >
> > We did a lot of benchmarking with HSAIL. LLVM general inliner did not change much since then and does not factor stuff important for us.
>
>
> It's not really meaningful to compare inlining of HSAIL to AMDGPU. HSAIL never implemented any of the TTI cost model (and actually really completely broke it) plus other ABI differences. HSAIL was always using the default ABI using sret / byval among other differences.


What in the default inliner will bump threshold if private pointer is passed?


https://reviews.llvm.org/D36849