[PATCH] D36454: [X86] Changes to extract Horizontal addition operation for AVX-512.

Jatin Bhateja via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sun Aug 27 06:27:23 PDT 2017


jbhateja added a comment.

In https://reviews.llvm.org/D36454#853351, @craig.topper wrote:

> Thinking about this some more. Do we really want to use a horizontal add instruction for a register with itself? Horizontal add is suboptimally implemented in microcode. It's 3 uops while the pshufd and the add are only 2 uops. The 3 uops also mean its limited to the complex decoder on Intel hardware.


Yes, I agree. latency and number of micro codes are better without hadd, only lesser code size is advantage with hadd with same operands.
Do you suggest adding a check in isHorizontalBinOp to not recognize a valid pttern for horizontal add/sub if operands of are same.


https://reviews.llvm.org/D36454





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