[PATCH] D37190: [x86][AsmParser] Allow some more MS size directives

coby via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sun Aug 27 04:50:39 PDT 2017


coby created this revision.

MS allows the following size directives: float/double and long as synonymous to dword/qword and dword, respectively.


Repository:
  rL LLVM

https://reviews.llvm.org/D37190

Files:
  lib/Target/X86/AsmParser/X86AsmParser.cpp
  test/MC/X86/intel-syntax.s


Index: lib/Target/X86/AsmParser/X86AsmParser.cpp
===================================================================
--- lib/Target/X86/AsmParser/X86AsmParser.cpp
+++ lib/Target/X86/AsmParser/X86AsmParser.cpp
@@ -1689,7 +1689,10 @@
     .Cases("BYTE", "byte", 8)
     .Cases("WORD", "word", 16)
     .Cases("DWORD", "dword", 32)
+    .Cases("FLOAT", "float", 32)
+    .Cases("LONG", "long", 32)
     .Cases("FWORD", "fword", 48)
+    .Cases("DOUBLE", "double", 64)
     .Cases("QWORD", "qword", 64)
     .Cases("MMWORD","mmword", 64)
     .Cases("XWORD", "xword", 80)
Index: test/MC/X86/intel-syntax.s
===================================================================
--- test/MC/X86/intel-syntax.s
+++ test/MC/X86/intel-syntax.s
@@ -693,11 +693,13 @@
 // CHECK: fadds   "?half@?0??bar@@YAXXZ at 4NA"@IMGREL
 
 inc qword ptr [rax]
+inc long ptr [rax]
 inc dword ptr [rax]
 inc word ptr [rax]
 inc byte ptr [rax]
 // CHECK: incq (%rax)
 // CHECK: incl (%rax)
+// CHECK: incl (%rax)
 // CHECK: incw (%rax)
 // CHECK: incb (%rax)
 
@@ -807,6 +809,11 @@
 // CHECK: fbld (%eax)
 // CHECK: fbstp (%eax)
 
+fld float ptr [rax]
+fld double ptr [rax]
+// CHECK: flds (%rax)
+// CHECK: fldl (%rax)
+
 fcomip st, st(2)
 fucomip st, st(2)
 // CHECK: fcompi  %st(2)


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