[PATCH] D36913: TableGen: Fix subreg composition/concatenation
Quentin Colombet via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Aug 25 10:42:15 PDT 2017
qcolombet accepted this revision.
qcolombet added a comment.
This revision is now accepted and ready to land.
LGTM.
Nitpicks below, no need to submit a new version.
Thanks
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Comment at: test/TableGen/ConcatenatedSubregs.td:16
+
+def sub0 : SubRegIndex<32>;
+def sub1 : SubRegIndex<32, 32>;
----------------
Could you add a comment with a drawing of the register hierarchy you describe?
For lazy people like me, it is faster to get what is being represented :).
================
Comment at: utils/TableGen/CodeGenRegisters.cpp:130
+ ConcatenationOf.begin()) && "parts consistent");
+ }
+}
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No brackets for 1 line blocks
================
Comment at: utils/TableGen/CodeGenRegisters.cpp:496
+ assert(Cand->ExplicitSubRegs[0] == SubReg);
+ assert(getSubRegIndex(SubReg) == SubRegIdx);
+ for (CodeGenRegister *SubReg : Cand->ExplicitSubRegs) {
----------------
Could you add messages in the asserts?
================
Comment at: utils/TableGen/CodeGenRegisters.cpp:504
+ Parts.push_back(SubIdx);
+ }
+ } else {
----------------
No brackets for 1 line blocks
Repository:
rL LLVM
https://reviews.llvm.org/D36913
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