[PATCH] D37096: [x86] Fix an amazing goof in the handling of sub, or, and xor lowering.
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Aug 24 09:22:29 PDT 2017
craig.topper added a comment.
Curious, what happens if you change it to just
if (UI->getOpcode() != ISD::CopyToReg && UI->getOpcode() != ISD::SETCC)
The "!= ISD::STORE" was added when the INC/DEC support was added to X86ISelDAGToDAG.cpp. Prior to that, ADD just had CopyToReg and SETCC. Sometime even earlier than that ADD was == STORE like SUB/XOR/OR/AND are now.
I don't think the comment above ADD was ever properly updated after != STORE was added.
https://reviews.llvm.org/D37096
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