[PATCH] D37069: [x86] use the IR type of formal args to create assertzext/assertsext and scalar truncate nodes

[Sanjay Patel via Phabricator via llvm-commits]

spatel created this revision.
Herald added a subscriber: mcrosier.

This is an implementation of the idea I suggested in https://reviews.llvm.org/D37017 as an alternate way to solve the multiple assertzext problem. I'm posting this just so it's clear what I had drafted. It could be completely wrong for reasons I don't understand yet. :)

1. I've avoided the vector problems/questions by only using the IR type in a truncate of a scalar. I don't know what mapping we use for illegal vector types or AVX512 masks to formal args, but there must be some cases where vectors are mapped to scalars because I hit asserts without that limitation.
2. I loosened an assert in SelectionDAGISel::LowerArguments() to account for this new/unexpected behavior.
3. The tests diffs are a superset of those in https://reviews.llvm.org/D37017 currently because we handle assertsext here.


https://reviews.llvm.org/D37069

Files:
  lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
  lib/Target/X86/X86ISelLowering.cpp
  test/CodeGen/X86/bool-zext.ll
  test/CodeGen/X86/critical-edge-split-2.ll
  test/CodeGen/X86/fp128-select.ll
  test/CodeGen/X86/illegal-bitfield-loadstore.ll
  test/CodeGen/X86/mask-negated-bool.ll
  test/CodeGen/X86/negate-i1.ll
  test/CodeGen/X86/select_const.ll
  test/CodeGen/X86/sext-i1.ll
  test/CodeGen/X86/split-store.ll

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