[PATCH] D37017: [DAGCombiner] fold assertzexts separated by trunc

[Sanjay Patel via Phabricator via llvm-commits]

spatel added reviewers: delena, zvi, qcolombet, andreadb.
spatel added a comment.

In https://reviews.llvm.org/D37017#849197, @aaboud wrote:

> I have one comment below.
>  By the way, I noticed that the double AssertZero occur only for the x86_64 (in i386 it does not happen).
>  It might be worth checking where it comes from, regardless of this patch.


i386 is (mostly?) immune from this because it passes function arguments on the stack. The first assertzext (the one with i32/i8 types in most of these examples) is generated by X86TargetLowering::LowerFormalArguments(). We always get the zext assert source value type as i8 for an i1 arg because that's what is specified in "RegisterTypeForVT", but I think that's the root cause of the bug. Should we be using the IR type (i1) at this stage when creating assertzext nodes and the subsequent truncate node?

Adding some more potential reviewers. This is my first look at function arg lowering. Is the intermediate trunc to i8 of the formal arg necessary for other reasons? The naive change to X86TargetLowering::LowerFormalArguments() doesn't work for weird vector types or AVX512 masks:

  @@ -3015,7 +3015,7 @@
             // Promoting a mask type (v*i1) into a register of type i64/i32/i16/i8
             ArgValue = lowerRegToMasks(ArgValue, VA.getValVT(), RegVT, dl, DAG);
           } else
  -          ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), ArgValue);
  +          ArgValue = DAG.getNode(ISD::TRUNCATE, dl, Ins[InsIndex].ArgVT, ArgValue);
         }
       } else {
         assert(VA.isMemLoc());

We're trying to avoid adding a DAG combine for this pattern by not creating the pattern in the first place:

        t4: i32 = AssertZext t2, ValueType:ch:i8
      t5: i8 = truncate t4
    t7: i8 = AssertZext t5, ValueType:ch:i1
  t8: i1 = truncate t7

-->

    t16: i32 = AssertZext t2, ValueType:ch:i1
  t18: i1 = truncate t16


https://reviews.llvm.org/D37017