[PATCH] D36992: [AVX512] Don't create SHRUNKBLEND SDNodes for 512-bit vectors.x

[Zvi Rackover via Phabricator via llvm-commits]

zvi added inline comments.


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Comment at: lib/Target/X86/X86ISelLowering.cpp:30679
 
   // Look for vselects with LHS/RHS being bitcasted from an operation that
   // can be executed on another type. Push the bitcast to the inputs of
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Any chance that due to the added bail-out we will be missing out on this combine?


https://reviews.llvm.org/D36992