[PATCH] D37051: Model cache size and associativity in TargetTransformInfo

Roman via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Aug 23 00:58:10 PDT 2017


gareevroman added a comment.

I think throughput and latency of vector fma instructions are pretty constant across micro-architectures too. Can we also add them?

> information (based on ideas from "Analytical Models for the BLIS Framework").

Could you add the reference to the paper to the summary?


https://reviews.llvm.org/D37051





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