[PATCH] D36388: [X86][SandyBridge] Additional updates to the SNB instructions scheduling information

[Gadi Haber via Phabricator via llvm-commits]

gadi.haber added a comment.

Unfortunately, splitting the patch creates an even worse case of unstable scheduling which produces regressions.
I am working on fine tuning the existing scheduling - which I hope to put on review soon.

Note that there may be a better solution here.
Currently, the default -x86_64 default flag is set to SandyBridge.
I would recommend to try changing it to Haswell and see if you get a better scheduling.

Here is the relevant setting in X86.td under LLVM lib Target X86:

// We currently use the Sandy Bridge model as the default scheduling model as
// we use it across Nehalem, Westmere, Sandy Bridge, and Ivy Bridge which
// covers a huge swath of x86 processors. If there are specific scheduling
// knobs which need to be tuned differently for AMD chips, we might consider
// forming a common base for them.
def : ProcessorModel<"x86-64", SandyBridgeModel,

  [FeatureX87, FeatureMMX, FeatureSSE2, FeatureFXSR,
   Feature64Bit, FeatureSlowBTMem ]>;


Repository:
  rL LLVM

https://reviews.llvm.org/D36388