D34393: Adding code padding for performance stability - infrastructure

Aboud, Amjad via llvm-commits llvm-commits at lists.llvm.org
Mon Aug 21 14:22:21 PDT 2017


Hi David,
Any chance that you can provide us with snapshot of assembly code (including address of each instruction) for the hotspot that you suspect a code layout issue to exist in?
We might be able to analyze it statically and came up with the right policy that might solve it.

Thanks,
Amjad

From: Xinliang David Li [mailto:davidxl at google.com]
Sent: Monday, August 21, 2017 22:52
To: Paparo Bivas, Omer <omer.paparo.bivas at intel.com>
Cc: reviews+D34393+public+21d556604f5de68f at reviews.llvm.org; Aboud, Amjad <amjad.aboud at intel.com>; Rackover, Zvi <zvi.rackover at intel.com>; Ansari, Zia <zia.ansari at intel.com>; craig.topper at gmail.com; rafael.espindola at gmail.com; Elovikov, Andrei <andrei.elovikov at intel.com>; gberry at codeaurora.org; wmi at google.com; eraman at google.com; kyle+llvm at iteratee.net; chandlerc at gmail.com; llvm-dev at redking.me.uk; simon.dardis at imgtec.com; mgorny at gentoo.org; javed.absar at arm.com; llvm-commits at lists.llvm.org; Ben Simhon, Oren <oren.ben.simhon at intel.com>; Saba, Lama <lama.saba at intel.com>
Subject: Re: D34393: Adding code padding for performance stability - infrastructure

Hi Paparo, I had some trouble applying these patches cleanly. Probably related to to the ^M in the patch. Stripping all of them does not help either.

David

On Sun, Aug 20, 2017 at 7:35 AM, Paparo Bivas, Omer <omer.paparo.bivas at intel.com<mailto:omer.paparo.bivas at intel.com>> wrote:
Hi,

Attached is the said patch (CodePadding_x86.patch). I'm also attaching the infrastructure patch it relies on (CodePadding_inf.patch), which is identical to the one I've sent a few days ago.

Thanks,
Omer

-----Original Message-----
From: Omer Paparo Bivas via Phabricator [mailto:reviews at reviews.llvm.org<mailto:reviews at reviews.llvm.org>]
Sent: Sunday, August 20, 2017 17:30
To: Paparo Bivas, Omer <omer.paparo.bivas at intel.com<mailto:omer.paparo.bivas at intel.com>>; Aboud, Amjad <amjad.aboud at intel.com<mailto:amjad.aboud at intel.com>>; Rackover, Zvi <zvi.rackover at intel.com<mailto:zvi.rackover at intel.com>>; Ansari, Zia <zia.ansari at intel.com<mailto:zia.ansari at intel.com>>; craig.topper at gmail.com<mailto:craig.topper at gmail.com>; rafael.espindola at gmail.com<mailto:rafael.espindola at gmail.com>
Cc: Elovikov, Andrei <andrei.elovikov at intel.com<mailto:andrei.elovikov at intel.com>>; gberry at codeaurora.org<mailto:gberry at codeaurora.org>; wmi at google.com<mailto:wmi at google.com>; eraman at google.com<mailto:eraman at google.com>; kyle+llvm at iteratee.net<mailto:kyle%2Bllvm at iteratee.net>; chandlerc at gmail.com<mailto:chandlerc at gmail.com>; davidxl at google.com<mailto:davidxl at google.com>; llvm-dev at redking.me.uk<mailto:llvm-dev at redking.me.uk>; simon.dardis at imgtec.com<mailto:simon.dardis at imgtec.com>; mgorny at gentoo.org<mailto:mgorny at gentoo.org>; javed.absar at arm.com<mailto:javed.absar at arm.com>; llvm-commits at lists.llvm.org<mailto:llvm-commits at lists.llvm.org>; Ben Simhon, Oren <oren.ben.simhon at intel.com<mailto:oren.ben.simhon at intel.com>>; Saba, Lama <lama.saba at intel.com<mailto:lama.saba at intel.com>>
Subject: [PATCH] D34393: Adding code padding for performance stability - infrastructure
opaparo added a comment.

In https://reviews.llvm.org/D34393#844569, @davidxl wrote:

> Tried the two patches with our internal benchmark -- the alignment related performance issue is still there.  The problem disappears with -mllvm -x86-experimental-pref-loop-alignment=5 is used.


I can think of two reasons that might have caused the patch to fail to help you:

1. This optimization is not enabled for all architectures. Use -target-cpu to specify the target (if you haven't already) to make sure you are compiling for the desired architecture, which will enable the optimization (if relevant). See the constructor of X86MCCodePadder for the list of architectures for which the optimization is enabled.
2. You might have encountered a different alignment issue than the one handled by this patch. I will send you soon another patch (which was not yet uploaded for review) that addresses another alignment issue (in addition to the first one), which will hopefully handle your case. Regardless of the results you'll get, could you send a small reproducer for this problem? I would like to investigate it and see the kind of alignment issue we are facing here.




https://reviews.llvm.org/D34393


---------------------------------------------------------------------
Intel Israel (74) Limited

This e-mail and any attachments may contain confidential material for
the sole use of the intended recipient(s). Any review or distribution
by others is strictly prohibited. If you are not the intended
recipient, please contact the sender and delete all copies.

---------------------------------------------------------------------
Intel Israel (74) Limited

This e-mail and any attachments may contain confidential material for
the sole use of the intended recipient(s). Any review or distribution
by others is strictly prohibited. If you are not the intended
recipient, please contact the sender and delete all copies.
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20170821/e4ca7cb6/attachment.html>


More information about the llvm-commits mailing list