[llvm] r311401 - [RegAlloc] Make sure live-ranges reflect the state of the IR when removing them
Quentin Colombet via llvm-commits
llvm-commits at lists.llvm.org
Mon Aug 21 15:56:18 PDT 2017
Author: qcolombet
Date: Mon Aug 21 15:56:18 2017
New Revision: 311401
URL: http://llvm.org/viewvc/llvm-project?rev=311401&view=rev
Log:
[RegAlloc] Make sure live-ranges reflect the state of the IR when removing them
When removing a live-range we used to not touch them making debug
prints harder to read because the IR was not matching what the
live-ranges information was saying.
This only affects debug printing and allows to put stronger asserts in
the code (see r308906 for instance).
Modified:
llvm/trunk/lib/CodeGen/RegAllocBasic.cpp
llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp
Modified: llvm/trunk/lib/CodeGen/RegAllocBasic.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocBasic.cpp?rev=311401&r1=311400&r2=311401&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/RegAllocBasic.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegAllocBasic.cpp Mon Aug 21 15:56:18 2017
@@ -143,14 +143,17 @@ INITIALIZE_PASS_END(RABasic, "regallocba
false)
bool RABasic::LRE_CanEraseVirtReg(unsigned VirtReg) {
+ LiveInterval &LI = LIS->getInterval(VirtReg);
if (VRM->hasPhys(VirtReg)) {
- LiveInterval &LI = LIS->getInterval(VirtReg);
Matrix->unassign(LI);
aboutToRemoveInterval(LI);
return true;
}
// Unassigned virtreg is probably in the priority queue.
// RegAllocBase will erase it after dequeueing.
+ // Nonetheless, clear the live-range so that the debug
+ // dump will show the right state for that VirtReg.
+ LI.clear();
return false;
}
Modified: llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp?rev=311401&r1=311400&r2=311401&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp Mon Aug 21 15:56:18 2017
@@ -546,14 +546,17 @@ void RAGreedy::getAnalysisUsage(Analysis
//===----------------------------------------------------------------------===//
bool RAGreedy::LRE_CanEraseVirtReg(unsigned VirtReg) {
+ LiveInterval &LI = LIS->getInterval(VirtReg);
if (VRM->hasPhys(VirtReg)) {
- LiveInterval &LI = LIS->getInterval(VirtReg);
Matrix->unassign(LI);
aboutToRemoveInterval(LI);
return true;
}
// Unassigned virtreg is probably in the priority queue.
// RegAllocBase will erase it after dequeueing.
+ // Nonetheless, clear the live-range so that the debug
+ // dump will show the right state for that VirtReg.
+ LI.clear();
return false;
}
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