[PATCH] D36965: [RelNotes, AArch64] Mention improved instruction fusion and fun alignment.

[Florian Hahn via Phabricator via llvm-commits]

fhahn created this revision.
Herald added subscribers: rengolin, aemerson.

https://reviews.llvm.org/D36965

Files:
  docs/ReleaseNotes.rst


Index: docs/ReleaseNotes.rst
===================================================================
--- docs/ReleaseNotes.rst
+++ docs/ReleaseNotes.rst
@@ -77,11 +77,16 @@
 * Added speculatable attribute indicating a function which does has no
   side-effects which could inhibit hoisting of calls.
 
-Changes to the ARM Backend
+Changes to the Arm Targets
 --------------------------
 
- During this release ...
+During this release the AArch64 target has:
 
+ * Made instruction fusion more aggressive, resulting in speedups
+   for code making use of AArch64 AES instructions. AES fusion has been
+   enabled for most Cortex-A cores and the AArch64MacroFusion pass was moved
+   to the generic MacroFusion pass.
+ * Added preferred function alignments for most Cortex-A cores.
 
 Changes to the MIPS Target
 --------------------------


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