[llvm] r311337 - [InstCombine] regenerate test checks; NFC
Sanjay Patel via llvm-commits
llvm-commits at lists.llvm.org
Mon Aug 21 07:34:06 PDT 2017
Author: spatel
Date: Mon Aug 21 07:34:06 2017
New Revision: 311337
URL: http://llvm.org/viewvc/llvm-project?rev=311337&view=rev
Log:
[InstCombine] regenerate test checks; NFC
Modified:
llvm/trunk/test/Transforms/InstCombine/udivrem-change-width.ll
Modified: llvm/trunk/test/Transforms/InstCombine/udivrem-change-width.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/udivrem-change-width.ll?rev=311337&r1=311336&r2=311337&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/udivrem-change-width.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/udivrem-change-width.ll Mon Aug 21 07:34:06 2017
@@ -3,60 +3,73 @@
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
; PR4548
-define i8 @udiv_i8(i8 %a, i8 %b) nounwind {
- %conv = zext i8 %a to i32
- %conv2 = zext i8 %b to i32
- %div = udiv i32 %conv, %conv2
- %conv3 = trunc i32 %div to i8
- ret i8 %conv3
+define i8 @udiv_i8(i8 %a, i8 %b) {
; CHECK-LABEL: @udiv_i8(
-; CHECK: udiv i8 %a, %b
+; CHECK-NEXT: [[DIV:%.*]] = udiv i8 %a, %b
+; CHECK-NEXT: ret i8 [[DIV]]
+;
+ %za = zext i8 %a to i32
+ %zb = zext i8 %b to i32
+ %udiv = udiv i32 %za, %zb
+ %conv3 = trunc i32 %udiv to i8
+ ret i8 %conv3
}
-define i8 @urem_i8(i8 %a, i8 %b) nounwind {
- %conv = zext i8 %a to i32
- %conv2 = zext i8 %b to i32
- %div = urem i32 %conv, %conv2
- %conv3 = trunc i32 %div to i8
- ret i8 %conv3
+define i8 @urem_i8(i8 %a, i8 %b) {
; CHECK-LABEL: @urem_i8(
-; CHECK: urem i8 %a, %b
+; CHECK-NEXT: [[TMP1:%.*]] = urem i8 %a, %b
+; CHECK-NEXT: ret i8 [[TMP1]]
+;
+ %za = zext i8 %a to i32
+ %zb = zext i8 %b to i32
+ %udiv = urem i32 %za, %zb
+ %conv3 = trunc i32 %udiv to i8
+ ret i8 %conv3
}
-define i32 @udiv_i32(i8 %a, i8 %b) nounwind {
- %conv = zext i8 %a to i32
- %conv2 = zext i8 %b to i32
- %div = udiv i32 %conv, %conv2
- ret i32 %div
+define i32 @udiv_i32(i8 %a, i8 %b) {
; CHECK-LABEL: @udiv_i32(
-; CHECK: udiv i8 %a, %b
-; CHECK: zext
+; CHECK-NEXT: [[DIV:%.*]] = udiv i8 %a, %b
+; CHECK-NEXT: [[UDIV:%.*]] = zext i8 [[DIV]] to i32
+; CHECK-NEXT: ret i32 [[UDIV]]
+;
+ %za = zext i8 %a to i32
+ %zb = zext i8 %b to i32
+ %udiv = udiv i32 %za, %zb
+ ret i32 %udiv
}
-define i32 @urem_i32(i8 %a, i8 %b) nounwind {
- %conv = zext i8 %a to i32
- %conv2 = zext i8 %b to i32
- %div = urem i32 %conv, %conv2
- ret i32 %div
+define i32 @urem_i32(i8 %a, i8 %b) {
; CHECK-LABEL: @urem_i32(
-; CHECK: urem i8 %a, %b
-; CHECK: zext
+; CHECK-NEXT: [[TMP1:%.*]] = urem i8 %a, %b
+; CHECK-NEXT: [[UDIV:%.*]] = zext i8 [[TMP1]] to i32
+; CHECK-NEXT: ret i32 [[UDIV]]
+;
+ %za = zext i8 %a to i32
+ %zb = zext i8 %b to i32
+ %udiv = urem i32 %za, %zb
+ ret i32 %udiv
}
-define i32 @udiv_i32_c(i8 %a) nounwind {
- %conv = zext i8 %a to i32
- %div = udiv i32 %conv, 10
- ret i32 %div
+define i32 @udiv_i32_c(i8 %a) {
; CHECK-LABEL: @udiv_i32_c(
-; CHECK: udiv i8 %a, 10
-; CHECK: zext
+; CHECK-NEXT: [[DIV:%.*]] = udiv i8 %a, 10
+; CHECK-NEXT: [[UDIV:%.*]] = zext i8 [[DIV]] to i32
+; CHECK-NEXT: ret i32 [[UDIV]]
+;
+ %za = zext i8 %a to i32
+ %udiv = udiv i32 %za, 10
+ ret i32 %udiv
}
-define i32 @urem_i32_c(i8 %a) nounwind {
- %conv = zext i8 %a to i32
- %div = urem i32 %conv, 10
- ret i32 %div
+define i32 @urem_i32_c(i8 %a) {
; CHECK-LABEL: @urem_i32_c(
-; CHECK: urem i8 %a, 10
-; CHECK: zext
+; CHECK-NEXT: [[TMP1:%.*]] = urem i8 %a, 10
+; CHECK-NEXT: [[UDIV:%.*]] = zext i8 [[TMP1]] to i32
+; CHECK-NEXT: ret i32 [[UDIV]]
+;
+ %za = zext i8 %a to i32
+ %udiv = urem i32 %za, 10
+ ret i32 %udiv
}
+
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