[llvm] r311300 - [AVX512] Add a test to check what happens when a load is referenced by two different masked scalar intrinsics with the same op inputs, but different masking node.

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Sun Aug 20 12:47:00 PDT 2017


Author: ctopper
Date: Sun Aug 20 12:47:00 2017
New Revision: 311300

URL: http://llvm.org/viewvc/llvm-project?rev=311300&view=rev
Log:
[AVX512] Add a test to check what happens when a load is referenced by two different masked scalar intrinsics with the same op inputs, but different masking node.

We're missing some single use checks in the sse_load_f32/f64 handling that cause us to replicate the load.

Modified:
    llvm/trunk/test/CodeGen/X86/avx512-memfold.ll

Modified: llvm/trunk/test/CodeGen/X86/avx512-memfold.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx512-memfold.ll?rev=311300&r1=311299&r2=311300&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/avx512-memfold.ll (original)
+++ llvm/trunk/test/CodeGen/X86/avx512-memfold.ll Sun Aug 20 12:47:00 2017
@@ -66,3 +66,24 @@ define <2 x double> @test_int_x86_avx512
   %res = call <2 x double> @llvm.x86.avx512.mask.vfmadd.sd(<2 x double> %a, <2 x double> %b, <2 x double> %cv, i8 %mask, i32 4)
   ret <2 x double> %res
 }
+
+; Test what happens when the load when we have multiple uses of the fadds DAG node via separate vselect nodes.
+; TODO: We shouldn't fold the load twice here.
+define <4 x float> @test_mask_add_ss_double_use(<4 x float> %a, float* %b, i8 %mask, <4 x float> %c) {
+; CHECK-LABEL: test_mask_add_ss_double_use:
+; CHECK:       ## BB#0:
+; CHECK-NEXT:    kmovw %esi, %k1
+; CHECK-NEXT:    vaddss (%rdi), %xmm0, %xmm1 {%k1}
+; CHECK-NEXT:    vaddss (%rdi), %xmm0, %xmm0 {%k1} {z}
+; CHECK-NEXT:    vmulps %xmm0, %xmm1, %xmm0
+; CHECK-NEXT:    retq
+  %b.val = load float, float* %b
+  %bv0 = insertelement <4 x float> undef, float %b.val, i32 0
+  %bv1 = insertelement <4 x float> %bv0, float 0.000000e+00, i32 1
+  %bv2 = insertelement <4 x float> %bv1, float 0.000000e+00, i32 2
+  %bv  = insertelement <4 x float> %bv2, float 0.000000e+00, i32 3
+  %res = call <4 x float> @llvm.x86.avx512.mask.add.ss.round(<4 x float> %a, <4 x float> %bv, <4 x float> %c, i8 %mask, i32 4)
+  %res2 = call <4 x float> @llvm.x86.avx512.mask.add.ss.round(<4 x float> %a, <4 x float> %bv, <4 x float> zeroinitializer, i8 %mask, i32 4)
+  %res3 = fmul <4 x float> %res, %res2
+  ret <4 x float> %res3
+}




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