[llvm] r311297 - [AVX-512] Use a scalar load pattern for FPCLASSSS/FPCLASSSD patterns.
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Sun Aug 20 11:30:25 PDT 2017
Author: ctopper
Date: Sun Aug 20 11:30:24 2017
New Revision: 311297
URL: http://llvm.org/viewvc/llvm-project?rev=311297&view=rev
Log:
[AVX-512] Use a scalar load pattern for FPCLASSSS/FPCLASSSD patterns.
Modified:
llvm/trunk/lib/Target/X86/X86InstrAVX512.td
Modified: llvm/trunk/lib/Target/X86/X86InstrAVX512.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrAVX512.td?rev=311297&r1=311296&r2=311297&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrAVX512.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrAVX512.td Sun Aug 20 11:30:24 2017
@@ -2663,7 +2663,7 @@ defm : avx512_fcmp_cc_packed_sae_lowerin
multiclass avx512_scalar_fpclass<bits<8> opc, string OpcodeStr, SDNode OpNode,
X86VectorVTInfo _, Predicate prd> {
let Predicates = [prd] in {
- def rr : AVX512<opc, MRMSrcReg, (outs _.KRC:$dst),//_.KRC:$dst),
+ def rr : AVX512<opc, MRMSrcReg, (outs _.KRC:$dst),
(ins _.RC:$src1, i32u8imm:$src2),
OpcodeStr##_.Suffix#"\t{$src2, $src1, $dst|$dst, $src1, $src2}",
[(set _.KRC:$dst,(OpNode (_.VT _.RC:$src1),
@@ -2676,18 +2676,18 @@ multiclass avx512_scalar_fpclass<bits<8>
(OpNode (_.VT _.RC:$src1),
(i32 imm:$src2))))], NoItinerary>, EVEX_K;
def rm : AVX512<opc, MRMSrcMem, (outs _.KRC:$dst),
- (ins _.MemOp:$src1, i32u8imm:$src2),
+ (ins _.ScalarMemOp:$src1, i32u8imm:$src2),
OpcodeStr##_.Suffix##
"\t{$src2, $src1, $dst|$dst, $src1, $src2}",
[(set _.KRC:$dst,
- (OpNode (_.VT (bitconvert (_.LdFrag addr:$src1))),
+ (OpNode (_.VT (scalar_to_vector (_.ScalarLdFrag addr:$src1))),
(i32 imm:$src2)))], NoItinerary>;
def rmk : AVX512<opc, MRMSrcMem, (outs _.KRC:$dst),
- (ins _.KRCWM:$mask, _.MemOp:$src1, i32u8imm:$src2),
+ (ins _.KRCWM:$mask, _.ScalarMemOp:$src1, i32u8imm:$src2),
OpcodeStr##_.Suffix##
"\t{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2}",
[(set _.KRC:$dst,(or _.KRCWM:$mask,
- (OpNode (_.VT (bitconvert (_.LdFrag addr:$src1))),
+ (OpNode (_.VT (scalar_to_vector (_.ScalarLdFrag addr:$src1))),
(i32 imm:$src2))))], NoItinerary>, EVEX_K;
}
}
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