[PATCH] D36498: [InstCombine] Teach foldSelectICmpAnd to recognize a (icmp slt trunc X, 0) and (icmp sgt trunc X, -1) as equivalent to an and with the sign bit of the truncated type

[Sanjay Patel via Phabricator via llvm-commits]

spatel added inline comments.


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Comment at: test/Transforms/InstCombine/select-with-bitwise-ops.ll:425-431
+; CHECK-LABEL: @test72(
+; CHECK-NEXT:    [[TMP1:%.*]] = trunc i32 [[X:%.*]] to i8
+; CHECK-NEXT:    [[TMP2:%.*]] = lshr i8 [[TMP1]], 6
+; CHECK-NEXT:    [[TMP3:%.*]] = and i8 [[TMP2]], 2
+; CHECK-NEXT:    [[TMP4:%.*]] = or i8 [[TMP3]], 40
+; CHECK-NEXT:    [[TMP5:%.*]] = zext i8 [[TMP4]] to i32
+; CHECK-NEXT:    ret i32 [[TMP5]]
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spatel wrote:
> Sorry if I missed it, but do you know why canEvaluateZExtd() failed on this?
> If you have a fix, I'd rather see that go in first because this doesn't look better in IR or x86 codegen.
This question came in close proximity to the last update, so you might not have seen it.


https://reviews.llvm.org/D36498