[llvm] r311187 - ARM: use an external relocation for calls from MachO ARM mode.
Tim Northover via llvm-commits
llvm-commits at lists.llvm.org
Fri Aug 18 12:13:57 PDT 2017
Author: tnorthover
Date: Fri Aug 18 12:13:56 2017
New Revision: 311187
URL: http://llvm.org/viewvc/llvm-project?rev=311187&view=rev
Log:
ARM: use an external relocation for calls from MachO ARM mode.
The internal (__text-relative) relocation risks the offset not being encodable
if the destination is Thumb.
Added:
llvm/trunk/test/CodeGen/ARM/arm-macho-tail.ll
Modified:
llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMachObjectWriter.cpp
llvm/trunk/test/MC/ARM/mixed-arm-thumb-bl-fixup.ll
llvm/trunk/test/MC/MachO/ARM/darwin-ARM-reloc.s
Modified: llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMachObjectWriter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMachObjectWriter.cpp?rev=311187&r1=311186&r2=311187&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMachObjectWriter.cpp (original)
+++ llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMachObjectWriter.cpp Fri Aug 18 12:13:56 2017
@@ -322,11 +322,10 @@ bool ARMMachObjectWriter::requiresExtern
default:
return false;
case MachO::ARM_RELOC_BR24:
- // PC pre-adjustment of 8 for these instructions.
- Value -= 8;
- // ARM BL/BLX has a 25-bit offset.
- Range = 0x1ffffff;
- break;
+ // An ARM call might be to a Thumb function, in which case the offset may
+ // not be encodable in the instruction and we must use an external
+ // relocation that explicitly mentions the function.
+ return true;
case MachO::ARM_THUMB_RELOC_BR22:
// PC pre-adjustment of 4 for these instructions.
Value -= 4;
Added: llvm/trunk/test/CodeGen/ARM/arm-macho-tail.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/arm-macho-tail.ll?rev=311187&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/arm-macho-tail.ll (added)
+++ llvm/trunk/test/CodeGen/ARM/arm-macho-tail.ll Fri Aug 18 12:13:56 2017
@@ -0,0 +1,16 @@
+; RUN: llc -mtriple=thumbv7-apple-watchos %s -filetype=obj -o %t
+; RUN: llvm-objdump -r %t | FileCheck %s
+
+ ; Relocation needs to explicitly mention _bar rather than be __text relative
+ ; because the __text relative offset is not encodable in an ARM instruction.
+; CHECK: ARM_RELOC_BR24 _bar
+define void @foo() "target-features"="-thumb-mode" {
+ tail call void @bar()
+ ret void
+}
+
+define void @one_inst() { ret void }
+
+define void @bar() {
+ ret void
+}
Modified: llvm/trunk/test/MC/ARM/mixed-arm-thumb-bl-fixup.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/mixed-arm-thumb-bl-fixup.ll?rev=311187&r1=311186&r2=311187&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/mixed-arm-thumb-bl-fixup.ll (original)
+++ llvm/trunk/test/MC/ARM/mixed-arm-thumb-bl-fixup.ll Fri Aug 18 12:13:56 2017
@@ -66,10 +66,10 @@ attributes #1 = { "target-features"="-th
; LINUX-NEXT: }
; IOS: Section __text {
-; IOS-NEXT: 0x2C 1 2 0 ARM_RELOC_BR24 0 __text
-; IOS-NEXT: 0x28 1 2 0 ARM_RELOC_BR24 0 __text
-; IOS-NEXT: 0x24 1 2 0 ARM_RELOC_BR24 0 __text
-; IOS-NEXT: 0x20 1 2 0 ARM_RELOC_BR24 0 __text
+; IOS-NEXT: 0x2C 1 2 1 ARM_RELOC_BR24 0 _global_thumb_fn
+; IOS-NEXT: 0x28 1 2 1 ARM_RELOC_BR24 0 _internal_thumb_fn
+; IOS-NEXT: 0x24 1 2 1 ARM_RELOC_BR24 0 _global_arm_fn
+; IOS-NEXT: 0x20 1 2 1 ARM_RELOC_BR24 0 _internal_arm_fn
; IOS-NEXT: 0x10 1 2 0 ARM_THUMB_RELOC_BR22 0 __text
; IOS-NEXT: 0xC 1 2 0 ARM_THUMB_RELOC_BR22 0 __text
; IOS-NEXT: 0x8 1 2 0 ARM_THUMB_RELOC_BR22 0 __text
Modified: llvm/trunk/test/MC/MachO/ARM/darwin-ARM-reloc.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/MachO/ARM/darwin-ARM-reloc.s?rev=311187&r1=311186&r2=311187&view=diff
==============================================================================
--- llvm/trunk/test/MC/MachO/ARM/darwin-ARM-reloc.s (original)
+++ llvm/trunk/test/MC/MachO/ARM/darwin-ARM-reloc.s Fri Aug 18 12:13:56 2017
@@ -99,7 +99,7 @@ Lsc0_0:
@ CHECK: ]
@ CHECK: Relocations [
@ CHECK: Section __text {
-@ CHECK: 0x4 1 2 0 ARM_RELOC_BR24 0 __text
+@ CHECK: 0x4 1 2 1 ARM_RELOC_BR24 0 _f0
@ CHECK: 0x0 1 2 1 ARM_RELOC_BR24 0 _printf
@ CHECK: }
@ CHECK: Section __data {
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