[llvm] r311148 - [AArch64] Remove DecodeAuthLoadWriteback

[Sam Parker via llvm-commits]

Author: sam_parker
Date: Fri Aug 18 01:39:54 2017
New Revision: 311148

URL: http://llvm.org/viewvc/llvm-project?rev=311148&view=rev
Log:
[AArch64] Remove DecodeAuthLoadWriteback

The BaseAuthLoad instruction class was incorrectly passing an empty
constraint string to its parent, so I have corrected this. This makes
the DecodeAuthLoadWriteback function redundant, so I've also removed
it.

Differential Revision: https://reviews.llvm.org/D36741

Modified:
    llvm/trunk/lib/Target/AArch64/AArch64InstrFormats.td
    llvm/trunk/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp

Modified: llvm/trunk/lib/Target/AArch64/AArch64InstrFormats.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64InstrFormats.td?rev=311148&r1=311147&r2=311148&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64InstrFormats.td (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64InstrFormats.td Fri Aug 18 01:39:54 2017
@@ -1169,7 +1169,7 @@ class AuthReturn<bits<3> op, bits<1> M,
 let mayLoad = 1 in
 class BaseAuthLoad<bit M, bit W, dag oops, dag iops, string asm,
                    string operands, string cstr, Operand opr>
-  : I<oops, iops, asm, operands, "", []>, Sched<[]> {
+  : I<oops, iops, asm, operands, cstr, []>, Sched<[]> {
   bits<10> offset;
   bits<5> Rn;
   bits<5> Rt;
@@ -1185,14 +1185,13 @@ class BaseAuthLoad<bit M, bit W, dag oop
 }
 
 multiclass AuthLoad<bit M, string asm, Operand opr> {
-  def indexed   : BaseAuthLoad<M, 0, (outs GPR64:$Rt), (ins GPR64sp:$Rn, opr:$offset),
+  def indexed   : BaseAuthLoad<M, 0, (outs GPR64:$Rt),
+                               (ins GPR64sp:$Rn, opr:$offset),
                                asm, "\t$Rt, [$Rn, $offset]", "", opr>;
   def writeback : BaseAuthLoad<M, 1, (outs GPR64sp:$wback, GPR64:$Rt),
                                (ins GPR64sp:$Rn, opr:$offset),
                                asm, "\t$Rt, [$Rn, $offset]!",
-                               "$Rn = $wback, at earlyclobber $wback", opr> {
-    let DecoderMethod = "DecodeAuthLoadWriteback";
-  }
+                               "$Rn = $wback, at earlyclobber $wback", opr>;
 
   def : InstAlias<asm # "\t$Rt, [$Rn]",
                   (!cast<Instruction>(NAME # "indexed") GPR64:$Rt, GPR64sp:$Rn, 0)>;

Modified: llvm/trunk/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp?rev=311148&r1=311147&r2=311148&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp Fri Aug 18 01:39:54 2017
@@ -1609,24 +1609,3 @@ static DecodeStatus DecodeSImm(llvm::MCI
   return Success;
 }
 
-static DecodeStatus DecodeAuthLoadWriteback(llvm::MCInst &Inst, uint32_t insn,
-                                            uint64_t Address,
-                                            const void *Decoder) {
-  unsigned Rt = fieldFromInstruction(insn, 0, 5);
-  unsigned Rn = fieldFromInstruction(insn, 5, 5);
-  unsigned Imm9 = fieldFromInstruction(insn, 12, 9);
-  unsigned S = fieldFromInstruction(insn, 22, 1);
-
-  unsigned Imm = Imm9 | (S << 9);
-
-  // Address writeback
-  DecodeGPR64spRegisterClass(Inst, Rn, Address, Decoder);
-  // Destination
-  DecodeGPR64RegisterClass(Inst, Rt, Address, Decoder);
-  // Address
-  DecodeGPR64spRegisterClass(Inst, Rn, Address, Decoder);
-  // Offset
-  DecodeSImm<10>(Inst, Imm, Address, Decoder);
-
-  return Success;
-}