[llvm] r311139 - Increase tail dup threshold for -O3 from 3 to 4.

Richard Smith via llvm-commits llvm-commits at lists.llvm.org
Thu Aug 17 16:38:41 PDT 2017


Author: rsmith
Date: Thu Aug 17 16:38:41 2017
New Revision: 311139

URL: http://llvm.org/viewvc/llvm-project?rev=311139&view=rev
Log:
Increase tail dup threshold for -O3 from 3 to 4.

We see a modest performance improvement from this slightly higher tail dup threshold.

Differential Revision: https://reviews.llvm.org/D36775

Modified:
    llvm/trunk/lib/CodeGen/MachineBlockPlacement.cpp
    llvm/trunk/test/CodeGen/Mips/brconge.ll
    llvm/trunk/test/CodeGen/Mips/brconle.ll
    llvm/trunk/test/CodeGen/X86/tail-dup-repeat.ll

Modified: llvm/trunk/lib/CodeGen/MachineBlockPlacement.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineBlockPlacement.cpp?rev=311139&r1=311138&r2=311139&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineBlockPlacement.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineBlockPlacement.cpp Thu Aug 17 16:38:41 2017
@@ -143,7 +143,7 @@ static cl::opt<unsigned> TailDupPlacemen
     "tail-dup-placement-aggressive-threshold",
     cl::desc("Instruction cutoff for aggressive tail duplication during "
              "layout. Used at -O3. Tail merging during layout is forced to "
-             "have a threshold that won't conflict."), cl::init(3),
+             "have a threshold that won't conflict."), cl::init(4),
     cl::Hidden);
 
 // Heuristic for tail duplication.

Modified: llvm/trunk/test/CodeGen/Mips/brconge.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/brconge.ll?rev=311139&r1=311138&r2=311139&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/brconge.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/brconge.ll Thu Aug 17 16:38:41 2017
@@ -1,4 +1,4 @@
-; RUN: llc  -march=mipsel -mattr=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16
+; RUN: llc  -march=mipsel -mattr=mips16 -relocation-model=pic -O2 < %s | FileCheck %s -check-prefix=16
 
 @i = global i32 5, align 4
 @j = global i32 10, align 4

Modified: llvm/trunk/test/CodeGen/Mips/brconle.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/brconle.ll?rev=311139&r1=311138&r2=311139&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/brconle.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/brconle.ll Thu Aug 17 16:38:41 2017
@@ -1,4 +1,4 @@
-; RUN: llc  -march=mipsel -mattr=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16
+; RUN: llc  -march=mipsel -mattr=mips16 -relocation-model=pic -O2 < %s | FileCheck %s -check-prefix=16
 
 @i = global i32 -5, align 4
 @j = global i32 10, align 4

Modified: llvm/trunk/test/CodeGen/X86/tail-dup-repeat.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/tail-dup-repeat.ll?rev=311139&r1=311138&r2=311139&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/tail-dup-repeat.ll (original)
+++ llvm/trunk/test/CodeGen/X86/tail-dup-repeat.ll Thu Aug 17 16:38:41 2017
@@ -1,4 +1,4 @@
-; RUN: llc -O3 -tail-dup-placement-threshold=4 -o - %s | FileCheck %s
+; RUN: llc -O3 -o - %s | FileCheck %s
 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
 target triple = "x86_64-unknown-linux-gnu"
 




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