[PATCH] D36815: [X86] Remove memopmmx pattern fragment
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Aug 16 20:03:11 PDT 2017
craig.topper created this revision.
Just like the FIXME says, there is no alignment requirement for MMX.
https://reviews.llvm.org/D36815
Files:
lib/Target/X86/X86InstrFragmentsSIMD.td
lib/Target/X86/X86InstrMMX.td
Index: lib/Target/X86/X86InstrMMX.td
===================================================================
--- lib/Target/X86/X86InstrMMX.td
+++ lib/Target/X86/X86InstrMMX.td
@@ -143,7 +143,7 @@
def rm64 : MMXSS38I<opc, MRMSrcMem, (outs VR64:$dst), (ins i64mem:$src),
!strconcat(OpcodeStr, "\t{$src, $dst|$dst, $src}"),
[(set VR64:$dst,
- (IntId64 (bitconvert (memopmmx addr:$src))))],
+ (IntId64 (bitconvert (load_mmx addr:$src))))],
itins.rm>, Sched<[itins.Sched.Folded]>;
}
@@ -163,7 +163,7 @@
!strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
[(set VR64:$dst,
(IntId64 VR64:$src1,
- (bitconvert (memopmmx addr:$src2))))], itins.rm>,
+ (bitconvert (load_mmx addr:$src2))))], itins.rm>,
Sched<[itins.Sched.Folded, ReadAfterLd]>;
}
}
Index: lib/Target/X86/X86InstrFragmentsSIMD.td
===================================================================
--- lib/Target/X86/X86InstrFragmentsSIMD.td
+++ lib/Target/X86/X86InstrFragmentsSIMD.td
@@ -761,15 +761,6 @@
def memopv2f64 : PatFrag<(ops node:$ptr), (v2f64 (memop node:$ptr))>;
def memopv2i64 : PatFrag<(ops node:$ptr), (v2i64 (memop node:$ptr))>;
-// SSSE3 uses MMX registers for some instructions. They aren't aligned on a
-// 16-byte boundary.
-// FIXME: 8 byte alignment for mmx reads is not required
-def memop64 : PatFrag<(ops node:$ptr), (load node:$ptr), [{
- return cast<LoadSDNode>(N)->getAlignment() >= 8;
-}]>;
-
-def memopmmx : PatFrag<(ops node:$ptr), (x86mmx (memop64 node:$ptr))>;
-
def X86masked_gather : SDNode<"X86ISD::MGATHER", SDTMaskedGather,
[SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>;
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