[llvm] r311060 - [X86] Exchange the memory op predicate for PALIGNR/VPALIGNR. I accidentally swapped them.
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Wed Aug 16 19:34:36 PDT 2017
Author: ctopper
Date: Wed Aug 16 19:34:35 2017
New Revision: 311060
URL: http://llvm.org/viewvc/llvm-project?rev=311060&view=rev
Log:
[X86] Exchange the memory op predicate for PALIGNR/VPALIGNR. I accidentally swapped them.
Modified:
llvm/trunk/lib/Target/X86/X86InstrSSE.td
Modified: llvm/trunk/lib/Target/X86/X86InstrSSE.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrSSE.td?rev=311060&r1=311059&r2=311060&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrSSE.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrSSE.td Wed Aug 16 19:34:35 2017
@@ -5520,13 +5520,13 @@ multiclass ssse3_palignr<string asm, Val
}
let Predicates = [HasAVX, NoVLX_Or_NoBWI] in
- defm VPALIGNR : ssse3_palignr<"vpalignr", v16i8, VR128, memopv2i64,
+ defm VPALIGNR : ssse3_palignr<"vpalignr", v16i8, VR128, loadv2i64,
i128mem, 0>, VEX_4V, VEX_WIG;
let Predicates = [HasAVX2, NoVLX_Or_NoBWI] in
defm VPALIGNRY : ssse3_palignr<"vpalignr", v32i8, VR256, loadv4i64,
i256mem, 0>, VEX_4V, VEX_L, VEX_WIG;
let Constraints = "$src1 = $dst", Predicates = [UseSSSE3] in
- defm PALIGNR : ssse3_palignr<"palignr", v16i8, VR128, loadv2i64,
+ defm PALIGNR : ssse3_palignr<"palignr", v16i8, VR128, memopv2i64,
i128mem>;
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