[PATCH] D36795: [SystemZ] Increase number of LOCRs emitted by passing regalloc hints
Jonas Paulsson via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Aug 16 08:14:43 PDT 2017
jonpa added a comment.
Below is a little table with different number of LOCRs and spill/reload instructions during experiments explained as follows:
Using just the getRegAllocationHints() implementation above, the number of locr type instructions increases by 171 on the SPEC, which means an increase from 97.4% to 99.1% (6333 -> 6504). This is the percentage of LOCRMux converted to an LOCR type instruction. (B)
As you can see, I have also done some further experiments that involves constraining the GRX32 reg class during isel if the other register class is high or low in emitSelect(). Using just this (and not giving any hints), gives an increase of 50 LOCRs (C). However, if all operands are GRX32, and they are constrained alternatingly between high and low (D), a similar result to (B) is achieved.
The most LOCRs I have gotten so far is with (E), although (F) is close with less spill.
This however turned out to be not quite true, because looking at the code size of loops, it is clear that LOCRXALTERNATE is making loops bigger. My guess is that somehow this lesser freedom forces suboptimal decisions somewhere else.
However, loops are getting better with LOCRCONSTRAIN (E), so looking at just the output, this looks valuable in addition to (B).
So, next is to remove the LOCRXALTERNATE, and then go for (B) or (E) I guess. Unless you have some input that might improve things further...?
Happy for any comments!
BTW, I don't quite understand the purpose of updateRegAllocHint(). It seems to be run during coalescing, but that's before getRegAllocationHints() has ever been called. So what is being updated?
/Jonas
Branch Number of LOCRs Number of "Spill|Reload" comments
A master 6333 164102
B just reg-alloc hints: 6504 164169
C no hints: LOCRCONSTRAIN 6383 164157
D no hints: LOCRCONSTRAIN + LOCRXALTERNATE 6506 164020
E hints and LOCRCONSTRAIN 6541 164224
F hints and LOCRCONSTRAIN + LOCRXALTERNATE 6534 164056
https://reviews.llvm.org/D36795
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