[PATCH] D36732: [ARM, Asm] Harden GNU LDRD/STRD aliases against invalid inputs

Renato Golin via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Aug 15 04:21:58 PDT 2017


rengolin added inline comments.


================
Comment at: lib/Target/ARM/AsmParser/ARMAsmParser.cpp:5791
+    return;
+  if (!Op3.isMem())
+    return;
----------------
These were asserts, now they're returns... I wonder if that's going to allow some weird cases. The assembler is not straight forward enough to not have weird matches going through behind our backs, and a future commit can mix this one up.


================
Comment at: test/MC/ARM/ldrd-strd-gnu-sp.s:11
+
+// V7: error: invalid instruction
+// V8: ldrd    r12, sp, [r0, #32]      @ encoding: [0xd0,0xc2,0xc0,0xe1]
----------------
No note that this is valid in v8?


================
Comment at: test/MC/ARM/ldrd-strd-gnu-thumb-bad-regs.s:5
 .thumb
-@ CHECK: error: operand must be a register in range [r0, r12] or r14
+@ CHECK: error: invalid instruction
 @ CHECK:         ldrd    r12, [r0, #512]
----------------
hum, I was expecting something a bit more explanatory here...


Repository:
  rL LLVM

https://reviews.llvm.org/D36732





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