[PATCH] D36654: [X86] Correct two places that seemed to be mishandling X86ISD::UMUL

[Phabricator via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL310846: [X86] Fix a place that was mishandling X86ISD::UMUL. (authored by ctopper).

Changed prior to commit:
  https://reviews.llvm.org/D36654?vs=110898&id=110979#toc

Repository:
  rL LLVM

https://reviews.llvm.org/D36654

Files:
  llvm/trunk/lib/Target/X86/X86ISelLowering.cpp


Index: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
===================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
@@ -17604,7 +17604,7 @@
     return true;
   if (Op.getResNo() == 1 &&
       (Opc == X86ISD::ADD || Opc == X86ISD::SUB || Opc == X86ISD::ADC ||
-       Opc == X86ISD::SBB || Opc == X86ISD::SMUL || Opc == X86ISD::UMUL ||
+       Opc == X86ISD::SBB || Opc == X86ISD::SMUL ||
        Opc == X86ISD::INC || Opc == X86ISD::DEC || Opc == X86ISD::OR ||
        Opc == X86ISD::XOR || Opc == X86ISD::AND))
     return true;


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