[llvm] r310794 - [AVX512] Correct isExtractSubvectorCheap so that it will return the correct answers for extracting 128-bits from a 512-bit vector and for mask registers.

[Sean Silva via llvm-commits]

On Sun, Aug 13, 2017 at 1:18 PM, Craig Topper <craig.topper at gmail.com>
wrote:

> Yes that was supposed to be Index == 0. I'll fix. Why doesn't clang have
> that warning?
>

No idea. Clang seems to be falling behind on warnings these days.

I've filed https://bugs.llvm.org/show_bug.cgi?id=34180

Though we seem to have a number of open -Wparentheses bugs, so I'm not
entirely confident that it will be fixed in a timely manner:
https://bugs.llvm.org/show_bug.cgi?id=18971
https://bugs.llvm.org/show_bug.cgi?id=25769
https://bugs.llvm.org/show_bug.cgi?id=22949

(I've gone ahead and marked PR34180 and PR18971 as `beginner` though so
maybe they can help some newbie get up to speed if nothing else)

-- Sean Silva


>
> ~Craig
>
> On Sun, Aug 13, 2017 at 1:11 PM, Sean Silva via llvm-commits <
> llvm-commits at lists.llvm.org> wrote:
>
>>
>>
>> On Sun, Aug 13, 2017 at 10:40 AM, Craig Topper via llvm-commits <
>> llvm-commits at lists.llvm.org> wrote:
>>
>>> Author: ctopper
>>> Date: Sun Aug 13 10:40:02 2017
>>> New Revision: 310794
>>>
>>> URL: http://llvm.org/viewvc/llvm-project?rev=310794&view=rev
>>> Log:
>>> [AVX512] Correct isExtractSubvectorCheap so that it will return the
>>> correct answers for extracting 128-bits from a 512-bit vector and for mask
>>> registers.
>>>
>>> Previously it would not return true for extracting either of the upper
>>> quarters of a 512-bit registers.
>>>
>>> For mask registers we support extracting anything from index 0. And
>>> otherwise we only support extracting the upper half of a register.
>>>
>>> Differential Revision: https://reviews.llvm.org/D36638
>>>
>>> Modified:
>>>     llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
>>>
>>> Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X8
>>> 6/X86ISelLowering.cpp?rev=310794&r1=310793&r2=310794&view=diff
>>> ============================================================
>>> ==================
>>> --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
>>> +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Sun Aug 13 10:40:02
>>> 2017
>>> @@ -4579,7 +4579,13 @@ bool X86TargetLowering::isExtractSubvect
>>>    if (!isOperationLegalOrCustom(ISD::EXTRACT_SUBVECTOR, ResVT))
>>>      return false;
>>>
>>> -  return (Index == 0 || Index == ResVT.getVectorNumElements());
>>> +  // Mask vectors support all subregister combinations and operations
>>> that
>>> +  // extract half of vector.
>>> +  if (ResVT.getVectorElementType() == MVT::i1)
>>> +    return Index = 0 || ((ResVT.getSizeInBits() ==
>>> SrcVT.getSizeInBits() * 2) &&
>>> +                         (Index == ResVT.getVectorNumElements()));
>>>
>>
>>
>> Is this supposed to be `Index == 0`?
>>
>> I'm getting this warning (`gcc version 5.4.0 20160609 (Ubuntu
>> 5.4.0-6ubuntu1~16.04.4) `):
>>
>> /home/sean/pg/llvm/llvm/lib/Target/X86/X86ISelLowering.cpp: In member
>> function ‘virtual bool llvm::X86TargetLowering::isExtractSubvectorCheap(llvm::EVT,
>> llvm::EVT, unsigned int) const’:
>> /home/sean/pg/llvm/llvm/lib/Target/X86/X86ISelLowering.cpp:4586:65:
>> warning: suggest parentheses around assignment used as truth value
>> [-Wparentheses]
>>                           (Index == ResVT.getVectorNumElements()));
>>                                                                  ^
>>
>>
>> -- Sean Silva
>>
>>
>>> +
>>> +  return (Index % ResVT.getVectorNumElements()) == 0;
>>>  }
>>>
>>>  bool X86TargetLowering::isCheapToSpeculateCttz() const {
>>>
>>>
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