[PATCH] D36502: [ARM] Tidy-up Cortex-A15 DPR-SPR optimizer implementation
Javed Absar via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun Aug 13 18:39:03 PDT 2017
This revision was automatically updated to reflect the committed changes.
Closed by commit rL310807: [ARM] Tidy-up Cortex-A15 DPR-SPR optimizer implementation (authored by javed.absar).
Changed prior to commit:
https://reviews.llvm.org/D36502?vs=110322&id=110902#toc
Repository:
rL LLVM
https://reviews.llvm.org/D36502
Files:
llvm/trunk/lib/Target/ARM/A15SDOptimizer.cpp
Index: llvm/trunk/lib/Target/ARM/A15SDOptimizer.cpp
===================================================================
--- llvm/trunk/lib/Target/ARM/A15SDOptimizer.cpp
+++ llvm/trunk/lib/Target/ARM/A15SDOptimizer.cpp
@@ -189,8 +189,7 @@
// MI is already known to be dead. We need to see
// if other instructions can also be removed.
- for (unsigned int i = 0; i < MI->getNumOperands(); ++i) {
- MachineOperand &MO = MI->getOperand(i);
+ for (MachineOperand &MO : MI->operands()) {
if ((!MO.isReg()) || (!MO.isUse()))
continue;
unsigned Reg = MO.getReg();
@@ -212,22 +211,19 @@
// dead. If so, we can also mark this instruction as being
// dead.
bool IsDead = true;
- for (unsigned int j = 0; j < Def->getNumOperands(); ++j) {
- MachineOperand &MODef = Def->getOperand(j);
+ for (MachineOperand &MODef : Def->operands()) {
if ((!MODef.isReg()) || (!MODef.isDef()))
continue;
unsigned DefReg = MODef.getReg();
if (!TRI->isVirtualRegister(DefReg)) {
IsDead = false;
break;
}
- for (MachineRegisterInfo::use_instr_iterator
- II = MRI->use_instr_begin(Reg), EE = MRI->use_instr_end();
- II != EE; ++II) {
+ for (MachineInstr &Use : MRI->use_instructions(Reg)) {
// We don't care about self references.
- if (&*II == Def)
+ if (&Use == Def)
continue;
- if (DeadInstr.find(&*II) == DeadInstr.end()) {
+ if (DeadInstr.find(&Use) == DeadInstr.end()) {
IsDead = false;
break;
}
@@ -405,9 +401,7 @@
return SmallVector<unsigned, 8>();
SmallVector<unsigned, 8> Defs;
- for (unsigned i = 0; i < MI->getNumOperands(); ++i) {
- MachineOperand &MO = MI->getOperand(i);
-
+ for (MachineOperand &MO : MI->operands()) {
if (!MO.isReg() || !MO.isUse())
continue;
if (!usesRegClass(MO, &ARM::DPRRegClass) &&
@@ -617,10 +611,7 @@
elideCopiesAndPHIs(Def, DefSrcs);
- for (SmallVectorImpl<MachineInstr *>::iterator II = DefSrcs.begin(),
- EE = DefSrcs.end(); II != EE; ++II) {
- MachineInstr *MI = *II;
-
+ for (MachineInstr *MI : DefSrcs) {
// If we've already analyzed and replaced this operand, don't do
// anything.
if (Replacements.find(MI) != Replacements.end())
@@ -682,20 +673,14 @@
DeadInstr.clear();
Replacements.clear();
- for (MachineFunction::iterator MFI = Fn.begin(), E = Fn.end(); MFI != E;
- ++MFI) {
-
- for (MachineBasicBlock::iterator MI = MFI->begin(), ME = MFI->end();
- MI != ME;) {
- Modified |= runOnInstruction(&*MI++);
+ for (MachineBasicBlock &MBB : Fn) {
+ for (MachineInstr &MI : MBB) {
+ Modified |= runOnInstruction(&MI);
}
-
}
- for (std::set<MachineInstr *>::iterator I = DeadInstr.begin(),
- E = DeadInstr.end();
- I != E; ++I) {
- (*I)->eraseFromParent();
+ for (MachineInstr *MI : DeadInstr) {
+ MI->eraseFromParent();
}
return Modified;
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