[PATCH] D36654: [X86] Correct two places that seemed to be mishandling X86ISD::UMUL

[Craig Topper via Phabricator via llvm-commits]

craig.topper updated this revision to Diff 110898.
craig.topper added a comment.

Removed the known bits part. I think we should just remove these nodes from known bits. I've done that in https://reviews.llvm.org/D36657


https://reviews.llvm.org/D36654

Files:
  lib/Target/X86/X86ISelLowering.cpp


Index: lib/Target/X86/X86ISelLowering.cpp
===================================================================
--- lib/Target/X86/X86ISelLowering.cpp
+++ lib/Target/X86/X86ISelLowering.cpp
@@ -17604,7 +17604,7 @@
     return true;
   if (Op.getResNo() == 1 &&
       (Opc == X86ISD::ADD || Opc == X86ISD::SUB || Opc == X86ISD::ADC ||
-       Opc == X86ISD::SBB || Opc == X86ISD::SMUL || Opc == X86ISD::UMUL ||
+       Opc == X86ISD::SBB || Opc == X86ISD::SMUL ||
        Opc == X86ISD::INC || Opc == X86ISD::DEC || Opc == X86ISD::OR ||
        Opc == X86ISD::XOR || Opc == X86ISD::AND))
     return true;


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