[PATCH] D36657: [X86] Remove flag setting ISD nodes from computeKnownBitsForTargetNode

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sun Aug 13 16:20:09 PDT 2017

craig.topper created this revision.

The flag result is an i32 type. But its only really used for connectivity. I don't think anything even assumes a particular format. We don't ever do any real operations on it. So known bits don't help us optimize anything.

My main motivation is that the UMUL behavior is actually wrong. I was going to fix this in https://reviews.llvm.org/D36654, but then realized there was just no reason for it to be here.



Index: lib/Target/X86/X86ISelLowering.cpp
--- lib/Target/X86/X86ISelLowering.cpp
+++ lib/Target/X86/X86ISelLowering.cpp
@@ -26915,21 +26915,6 @@
   switch (Opc) {
   default: break;
-  case X86ISD::ADD:
-  case X86ISD::SUB:
-  case X86ISD::ADC:
-  case X86ISD::SBB:
-  case X86ISD::SMUL:
-  case X86ISD::UMUL:
-  case X86ISD::INC:
-  case X86ISD::DEC:
-  case X86ISD::OR:
-  case X86ISD::XOR:
-  case X86ISD::AND:
-    // These nodes' second result is a boolean.
-    if (Op.getResNo() == 0)
-      break;
   case X86ISD::SETCC:

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