[PATCH] D36650: [X86] WIP support narrowing operations when only a subvector is demanded

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added a comment.

> We also need to support matching horizontal binops from target shuffles in order to convert the final operation to HADD.

For reference: PR34110 and PR34111 suggests the x86 horizontal binop code needs work


https://reviews.llvm.org/D36650