[llvm] r310786 - [X86] Early out of combineInsertSubvector for mask vectors.
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Sat Aug 12 15:33:59 PDT 2017
Author: ctopper
Date: Sat Aug 12 15:33:58 2017
New Revision: 310786
URL: http://llvm.org/viewvc/llvm-project?rev=310786&view=rev
Log:
[X86] Early out of combineInsertSubvector for mask vectors.
The combines here shouldn't be done for mask vectors, but it wasn't clear anything was preventing that.
Modified:
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=310786&r1=310785&r2=310786&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Sat Aug 12 15:33:58 2017
@@ -35504,13 +35504,18 @@ static SDValue combineInsertSubvector(SD
if (DCI.isBeforeLegalizeOps())
return SDValue();
+ MVT OpVT = N->getSimpleValueType(0);
+
+ // Early out for mask vectors.
+ if (OpVT.getVectorElementType() == MVT::i1)
+ return SDValue();
+
SDLoc dl(N);
SDValue Vec = N->getOperand(0);
SDValue SubVec = N->getOperand(1);
SDValue Idx = N->getOperand(2);
unsigned IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
- MVT OpVT = N->getSimpleValueType(0);
MVT SubVecVT = SubVec.getSimpleValueType();
// If this is an insert of an extract, combine to a shuffle. Don't do this
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