[PATCH] D36222: [MIPS] Add support to match more patterns for BBIT instruction.

[Simon Dardis via Phabricator via llvm-commits]

sdardis accepted this revision.
sdardis added a comment.
This revision is now accepted and ready to land.

LGTM with inline nits addressed.



================
Comment at: lib/Target/Mips/Mips64InstrInfo.td:64
+    uint64_t Imm = N->getZExtValue();
+    return isPowerOf2_32(Imm) && (Imm & 0xffffffff) == Imm;
+  }
----------------
Use isUInt<32>(Imm) here.


================
Comment at: test/CodeGen/Mips/octeon.ll:186
+entry:
+; OCTEON: bbit0 $1, 1, [[BB0:(\$|\.L)BB[0-9_]+]]
+; OCTEON-PIC-NOT: b  {{[[:space:]].*}}
----------------
This needs ALL-LABEL: bbit0i32:


================
Comment at: test/CodeGen/Mips/octeon.ll:204
+
+define void @bbit1i32() local_unnamed_addr {
+entry:
----------------
This needs ALL-LABEL: bbit0i32:


Repository:
  rL LLVM

https://reviews.llvm.org/D36222