[PATCH] D36414: [X86][X87] Ensure x87 instructions are tagged as altering the FPSW reg

[David Kreitzer via Phabricator via llvm-commits]

DavidKreitzer added a comment.

The change looks correct to me modulo Craig's comment, though I suspect he's right that there is a bug in the Intel documentation for FNOP.

Regarding testing, would it be possible to write MI tests that run through the MIScheduler in misched-bottomup mode? The idea would be to construct an MI sequence similar to this:

  ...
  fcom
  fxam ; or some other FPSW-defining instruction you want to test
  fstsw ax
  ...

I am not intimately familiar with the instruction scheduler, but if misched-bottomup behaves as its name implies, I would expect the fxam to be incorrectly hoisted above the fcom without your fix.


Repository:
  rL LLVM

https://reviews.llvm.org/D36414