[llvm] r310524 - [Hexagon] Ignore DBG_VALUEs when counting instructions in hexagon-early-if

Chad Rosier via llvm-commits llvm-commits at lists.llvm.org
Thu Aug 10 06:54:06 PDT 2017



On 8/9/2017 5:22 PM, Krzysztof Parzyszek via llvm-commits wrote:
> Author: kparzysz
> Date: Wed Aug  9 14:22:05 2017
> New Revision: 310524
>
> URL: http://llvm.org/viewvc/llvm-project?rev=310524&view=rev
> Log:
> [Hexagon] Ignore DBG_VALUEs when counting instructions in hexagon-early-if
>
> Added:
>      llvm/trunk/test/CodeGen/Hexagon/early-if-debug.mir
> Modified:
>      llvm/trunk/lib/Target/Hexagon/HexagonEarlyIfConv.cpp
>      llvm/trunk/lib/Target/Hexagon/HexagonTargetMachine.cpp
>
> Modified: llvm/trunk/lib/Target/Hexagon/HexagonEarlyIfConv.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonEarlyIfConv.cpp?rev=310524&r1=310523&r2=310524&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/Hexagon/HexagonEarlyIfConv.cpp (original)
> +++ llvm/trunk/lib/Target/Hexagon/HexagonEarlyIfConv.cpp Wed Aug  9 14:22:05 2017
> @@ -155,9 +155,7 @@ namespace {
>     public:
>       static char ID;
>   
> -    HexagonEarlyIfConversion() : MachineFunctionPass(ID) {
> -      initializeHexagonEarlyIfConversionPass(*PassRegistry::getPassRegistry());
> -    }
> +    HexagonEarlyIfConversion() : MachineFunctionPass(ID) {}
>   
>       StringRef getPassName() const override {
>         return "Hexagon early if conversion";
> @@ -227,7 +225,7 @@ namespace {
>   
>   char HexagonEarlyIfConversion::ID = 0;
>   
> -INITIALIZE_PASS(HexagonEarlyIfConversion, "hexagon-eif",
> +INITIALIZE_PASS(HexagonEarlyIfConversion, "hexagon-early-if",
>     "Hexagon early if conversion", false, false)
>   
>   bool HexagonEarlyIfConversion::isPreheader(const MachineBasicBlock *B) const {
> @@ -539,7 +537,10 @@ bool HexagonEarlyIfConversion::isProfita
>     auto TotalCount = [] (const MachineBasicBlock *B, unsigned &Spare) {
>       if (!B)
>         return 0u;
> -    unsigned T = std::distance(B->begin(), B->getFirstTerminator());
> +    unsigned T = std::count_if(B->begin(), B->getFirstTerminator(),
> +                               [](const MachineInstr &MI) {
> +                                 return !MI.isDebugValue();

No sure if this is useful here, but there's also the isTransient() 
function.  This function returns true if MI is a transient instruction 
that is either very likely to be eliminated during RA or if MI doesn't 
have an execution-time cost.

> +                               });
>       if (T < HEXAGON_PACKET_SIZE)
>         Spare += HEXAGON_PACKET_SIZE-T;
>       return T;
>
> Modified: llvm/trunk/lib/Target/Hexagon/HexagonTargetMachine.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonTargetMachine.cpp?rev=310524&r1=310523&r2=310524&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/Hexagon/HexagonTargetMachine.cpp (original)
> +++ llvm/trunk/lib/Target/Hexagon/HexagonTargetMachine.cpp Wed Aug  9 14:22:05 2017
> @@ -109,6 +109,7 @@ SchedCustomRegistry("hexagon", "Run Hexa
>   
>   namespace llvm {
>     extern char &HexagonExpandCondsetsID;
> +  void initializeHexagonEarlyIfConversionPass(PassRegistry&);
>     void initializeHexagonExpandCondsetsPass(PassRegistry&);
>     void initializeHexagonGenMuxPass(PassRegistry&);
>     void initializeHexagonLoopIdiomRecognizePass(PassRegistry&);
> @@ -163,6 +164,7 @@ extern "C" void LLVMInitializeHexagonTar
>     RegisterTargetMachine<HexagonTargetMachine> X(getTheHexagonTarget());
>   
>     PassRegistry &PR = *PassRegistry::getPassRegistry();
> +  initializeHexagonEarlyIfConversionPass(PR);
>     initializeHexagonGenMuxPass(PR);
>     initializeHexagonLoopIdiomRecognizePass(PR);
>     initializeHexagonNewValueJumpPass(PR);
>
> Added: llvm/trunk/test/CodeGen/Hexagon/early-if-debug.mir
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Hexagon/early-if-debug.mir?rev=310524&view=auto
> ==============================================================================
> --- llvm/trunk/test/CodeGen/Hexagon/early-if-debug.mir (added)
> +++ llvm/trunk/test/CodeGen/Hexagon/early-if-debug.mir Wed Aug  9 14:22:05 2017
> @@ -0,0 +1,53 @@
> +# RUN: llc -march=hexagon -eif-limit=4 -run-pass hexagon-early-if -o - %s | FileCheck %s
> +# Check that even with the limit of 4 instructions, the block bb.1 is
> +# if-converted.
> +
> +# CHECK-LABEL: bb.0:
> +# CHECK: %0 = COPY %r0
> +# CHECK: %1 = C2_cmpeqi %0, 0
> +# CHECK: %2 = A2_tfrsi 123
> +# CHECK: DBG_VALUE debug-use %0, debug-use _
> +# CHECK: DBG_VALUE debug-use %0, debug-use _
> +# CHECK: DBG_VALUE debug-use %0, debug-use _
> +# CHECK: DBG_VALUE debug-use %0, debug-use _
> +# CHECK: DBG_VALUE debug-use %0, debug-use _
> +# CHECK: %3 = A2_tfrsi 321
> +# CHECK: %5 = C2_mux %1, %2, %3
> +
> +--- |
> +  define void @foo() {
> +    ret void
> +  }
> +  !1 = !DIExpression()
> +...
> +---
> +name: foo
> +tracksRegLiveness: true
> +registers:
> +  - { id: 0, class: intregs }
> +  - { id: 1, class: predregs }
> +  - { id: 2, class: intregs }
> +  - { id: 3, class: intregs }
> +  - { id: 4, class: intregs }
> +body:             |
> +  bb.0:
> +    liveins: %r0
> +
> +    %0 = COPY %r0
> +    %1 = C2_cmpeqi %0, 0
> +    %2 = A2_tfrsi 123
> +    J2_jumpt %1, %bb.2, implicit-def dead %pc
> +    J2_jump %bb.1, implicit-def dead %pc
> +
> +  bb.1:
> +    DBG_VALUE debug-use %0, debug-use _, !1, !1
> +    DBG_VALUE debug-use %0, debug-use _, !1, !1
> +    DBG_VALUE debug-use %0, debug-use _, !1, !1
> +    DBG_VALUE debug-use %0, debug-use _, !1, !1
> +    DBG_VALUE debug-use %0, debug-use _, !1, !1
> +    %3 = A2_tfrsi 321
> +
> +  bb.2:
> +    %4 = PHI %2, %bb.0, %3, %bb.1
> +
> +...
>
>
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