[PATCH] D36507: [ARM] GlobalISel: Select globals in PIC mode

Rafael Avila de Espindola via llvm-commits llvm-commits at lists.llvm.org
Wed Aug 9 10:37:21 PDT 2017

Peter Smith via Phabricator via llvm-commits
<llvm-commits at lists.llvm.org> writes:

> peter.smith added a comment.
> A potential drawback of using MOVW and MOVT in ELF is that the maximum immediate that can be used is a signed 16-bit value due to the constraint in ARMELF Section
>> For relocations processing MOVW and MOVT instructions (in both ARM and Thumb state), the initial addend is formed by interpreting the 16-bit literal field of the instruction as a 16-bit signed value in the range -32768 <= A < 32768. The interpretation is the same whether the relocated place contains a MOVW instruction or a MOVT instruction.
> This is captured in https://bugs.llvm.org/show_bug.cgi?id=28229
> I'm not familiar enough with ARMExpandPseudoInsts.cpp to know if it guarantees the addend won't overflow this range, or if you can select MOVT/MOVW only when you know the addend won't overflow? I suspect that for an overflow to occur it would require more than one global in the same section and each one accessed via a common base pointer + offset. For what its worth ARM's proprietary compiler used a separate RELA relocation section for MOVT/MOVW so that the addend could be encoded in the relocation; I don't think that this will work for llvm as not all linker's can cope with RELA relocations for ARM.

For what is worth it, I would like one day to experiment with adding a
flag to MC to force using Elf_Rela in any architecture.

For now I agree that it is probably best to do what the existing code
generator does and just a constant pool.


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