[PATCH] D36522: [AArch64] Assembler support for v8.3 RCpc
Tim Northover via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Aug 9 07:29:22 PDT 2017
t.p.northover accepted this revision.
t.p.northover added a comment.
This revision is now accepted and ready to land.
LGTM with one nit.
Comment at: test/MC/AArch64/armv8.3a-rcpc.s:5-8
+ ldaprb w0, [x0, #0]
+ ldaprh w0, [x0, #0]
+ ldapr w0, [x0, #0]
+ ldapr x0, [x0, #0]
Can we sprinkle some plain `[x0]` addressing modes here? No need to duplicate them all, just make 1 or 2 have an implicit operand in case some massive, highly unlikely refactoring breaks parsing later.
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