[PATCH] D29933: [RISCV 11/n] Initial codegen support for ALU operations

[Alex Bradbury via Phabricator via llvm-commits]

asb updated this revision to Diff 110352.
asb added a comment.

This patch update:

- No longer marks X2 (the stack pointer) as a callee-saved register. It is manipulated directly in the prolog and epilog
- Adds a default SelectionDAGTargetInfo to RISCVSubtarget.
- Fixes several minor formatting issues


https://reviews.llvm.org/D29933

Files:
  lib/Target/RISCV/CMakeLists.txt
  lib/Target/RISCV/LLVMBuild.txt
  lib/Target/RISCV/RISCV.h
  lib/Target/RISCV/RISCV.td
  lib/Target/RISCV/RISCVAsmPrinter.cpp
  lib/Target/RISCV/RISCVCallingConv.td
  lib/Target/RISCV/RISCVFrameLowering.cpp
  lib/Target/RISCV/RISCVFrameLowering.h
  lib/Target/RISCV/RISCVISelDAGToDAG.cpp
  lib/Target/RISCV/RISCVISelLowering.cpp
  lib/Target/RISCV/RISCVISelLowering.h
  lib/Target/RISCV/RISCVInstrInfo.cpp
  lib/Target/RISCV/RISCVInstrInfo.h
  lib/Target/RISCV/RISCVInstrInfo.td
  lib/Target/RISCV/RISCVMCInstLower.cpp
  lib/Target/RISCV/RISCVRegisterInfo.cpp
  lib/Target/RISCV/RISCVRegisterInfo.h
  lib/Target/RISCV/RISCVRegisterInfo.td
  lib/Target/RISCV/RISCVSubtarget.cpp
  lib/Target/RISCV/RISCVSubtarget.h
  lib/Target/RISCV/RISCVTargetMachine.cpp
  lib/Target/RISCV/RISCVTargetMachine.h
  test/CodeGen/RISCV/alu.ll
  test/CodeGen/RISCV/lit.local.cfg

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