[PATCH] D36467: [ARM, FIX] ARMTargetLowering::isLegalAddressingMode can accept illegal addressing modes for Thumb1 target

Evgeny Astigeevich via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Aug 8 07:08:02 PDT 2017

eastig created this revision.
Herald added subscribers: kristof.beyls, javed.absar, aemerson.

Investigating Corext-M23/M0+ performance regressions caused by https://reviews.llvm.org/D34583 "[LSR] Narrow search space by filtering non-optimal formulae with the same ScaledReg and Scale." it was found that ARMTargetLowering::isLegalAddressingMode can accept illegal addressing modes for the Thumb1 target (See https://bugs.llvm.org/show_bug.cgi?id=34106 for details). Thumb1 addressing modes do not support scaling values: positive greater than 1; any negative. Such addressing modes are illegal for the Thumb1 target. This bug causes LSR to insert additional IR operations which are lowered to more instructions than it's actually needed.

The patch fixes the issue.

Testing shows the regressions are fixed. We even get additional 6% improvements on the benchmarks. We also get improvements on code size (-Oz) because less instructions are generated.



-------------- next part --------------
A non-text attachment was scrubbed...
Name: D36467.110187.patch
Type: text/x-patch
Size: 10257 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20170808/ae8ce8a4/attachment.bin>

More information about the llvm-commits mailing list