[PATCH] D36421: AMDGPU: Implement getMinimumNopSize

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Aug 7 11:33:25 PDT 2017

arsenm created this revision.
Herald added subscribers: t-tye, tpr, dstuttard, yaxunl, nhaehnle, wdng, kzhuravl.

Not sure what this really does



Index: lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp
--- lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp
+++ lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp
@@ -47,6 +47,8 @@
                         MCInst &Res) const override {
     llvm_unreachable("Not implemented");
+  unsigned getMinimumNopSize() const override;
   bool writeNopData(uint64_t Count, MCObjectWriter *OW) const override;
   const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override;
@@ -151,6 +153,10 @@
   return Infos[Kind - FirstTargetFixupKind];
+unsigned AMDGPUAsmBackend::getMinimumNopSize() const {
+  return 4;
 bool AMDGPUAsmBackend::writeNopData(uint64_t Count, MCObjectWriter *OW) const {
   // If the count is not 4-byte aligned, we must be writing data into the text
   // section (otherwise we have unaligned instructions, and thus have far

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D36421.110039.patch
Type: text/x-patch
Size: 943 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20170807/693b3774/attachment.bin>

More information about the llvm-commits mailing list