[llvm] r310268 - [X86][AVX] Add full test coverage of subvector_broadcasts from registers
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Mon Aug 7 09:49:10 PDT 2017
Author: rksimon
Date: Mon Aug 7 09:49:09 2017
New Revision: 310268
URL: http://llvm.org/viewvc/llvm-project?rev=310268&view=rev
Log:
[X86][AVX] Add full test coverage of subvector_broadcasts from registers
X86SubVBroadcast is for memory subvector broadcasts, but we must test that it handles all cases without the load as well just in case.
This was noticed while I was triaging the test cases from PR34041.
Modified:
llvm/trunk/test/CodeGen/X86/subvector-broadcast.ll
Modified: llvm/trunk/test/CodeGen/X86/subvector-broadcast.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/subvector-broadcast.ll?rev=310268&r1=310267&r2=310268&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/subvector-broadcast.ll (original)
+++ llvm/trunk/test/CodeGen/X86/subvector-broadcast.ll Mon Aug 7 09:49:09 2017
@@ -1280,3 +1280,651 @@ entry:
store <8 x double> %2, <8 x double>* @gb2, align 8
ret void
}
+
+;
+; Subvector Broadcast from register
+;
+
+define <4 x double> @reg_broadcast_2f64_4f64(<2 x double> %a0) nounwind {
+; X32-LABEL: reg_broadcast_2f64_4f64:
+; X32: # BB#0:
+; X32-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X32-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+; X32-NEXT: retl
+;
+; X64-LABEL: reg_broadcast_2f64_4f64:
+; X64: # BB#0:
+; X64-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X64-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+; X64-NEXT: retq
+ %1 = shufflevector <2 x double> %a0, <2 x double> undef, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
+ ret <4 x double> %1
+}
+
+define <8 x double> @reg_broadcast_2f64_8f64(<2 x double> %a0) nounwind {
+; X32-AVX-LABEL: reg_broadcast_2f64_8f64:
+; X32-AVX: # BB#0:
+; X32-AVX-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X32-AVX-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+; X32-AVX-NEXT: vmovaps %ymm0, %ymm1
+; X32-AVX-NEXT: retl
+;
+; X32-AVX512-LABEL: reg_broadcast_2f64_8f64:
+; X32-AVX512: # BB#0:
+; X32-AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X32-AVX512-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+; X32-AVX512-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
+; X32-AVX512-NEXT: retl
+;
+; X64-AVX-LABEL: reg_broadcast_2f64_8f64:
+; X64-AVX: # BB#0:
+; X64-AVX-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X64-AVX-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+; X64-AVX-NEXT: vmovaps %ymm0, %ymm1
+; X64-AVX-NEXT: retq
+;
+; X64-AVX512-LABEL: reg_broadcast_2f64_8f64:
+; X64-AVX512: # BB#0:
+; X64-AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X64-AVX512-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+; X64-AVX512-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
+; X64-AVX512-NEXT: retq
+ %1 = shufflevector <2 x double> %a0, <2 x double> undef, <8 x i32> <i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1>
+ ret <8 x double> %1
+}
+
+define <8 x double> @reg_broadcast_4f64_8f64(<4 x double> %a0) nounwind {
+; X32-AVX-LABEL: reg_broadcast_4f64_8f64:
+; X32-AVX: # BB#0:
+; X32-AVX-NEXT: vmovaps %ymm0, %ymm1
+; X32-AVX-NEXT: retl
+;
+; X32-AVX512-LABEL: reg_broadcast_4f64_8f64:
+; X32-AVX512: # BB#0:
+; X32-AVX512-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; X32-AVX512-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
+; X32-AVX512-NEXT: retl
+;
+; X64-AVX-LABEL: reg_broadcast_4f64_8f64:
+; X64-AVX: # BB#0:
+; X64-AVX-NEXT: vmovaps %ymm0, %ymm1
+; X64-AVX-NEXT: retq
+;
+; X64-AVX512-LABEL: reg_broadcast_4f64_8f64:
+; X64-AVX512: # BB#0:
+; X64-AVX512-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; X64-AVX512-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
+; X64-AVX512-NEXT: retq
+ %1 = shufflevector <4 x double> %a0, <4 x double> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>
+ ret <8 x double> %1
+}
+
+define <4 x i64> @reg_broadcast_2i64_4i64(<2 x i64> %a0) nounwind {
+; X32-LABEL: reg_broadcast_2i64_4i64:
+; X32: # BB#0:
+; X32-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X32-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+; X32-NEXT: retl
+;
+; X64-LABEL: reg_broadcast_2i64_4i64:
+; X64: # BB#0:
+; X64-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X64-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+; X64-NEXT: retq
+ %1 = shufflevector <2 x i64> %a0, <2 x i64> undef, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
+ ret <4 x i64> %1
+}
+
+define <8 x i64> @reg_broadcast_2i64_8i64(<2 x i64> %a0) nounwind {
+; X32-AVX-LABEL: reg_broadcast_2i64_8i64:
+; X32-AVX: # BB#0:
+; X32-AVX-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X32-AVX-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+; X32-AVX-NEXT: vmovaps %ymm0, %ymm1
+; X32-AVX-NEXT: retl
+;
+; X32-AVX512-LABEL: reg_broadcast_2i64_8i64:
+; X32-AVX512: # BB#0:
+; X32-AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X32-AVX512-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+; X32-AVX512-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
+; X32-AVX512-NEXT: retl
+;
+; X64-AVX-LABEL: reg_broadcast_2i64_8i64:
+; X64-AVX: # BB#0:
+; X64-AVX-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X64-AVX-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+; X64-AVX-NEXT: vmovaps %ymm0, %ymm1
+; X64-AVX-NEXT: retq
+;
+; X64-AVX512-LABEL: reg_broadcast_2i64_8i64:
+; X64-AVX512: # BB#0:
+; X64-AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X64-AVX512-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+; X64-AVX512-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
+; X64-AVX512-NEXT: retq
+ %1 = shufflevector <2 x i64> %a0, <2 x i64> undef, <8 x i32> <i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1>
+ ret <8 x i64> %1
+}
+
+define <8 x i64> @reg_broadcast_4i64_8i64(<4 x i64> %a0) nounwind {
+; X32-AVX-LABEL: reg_broadcast_4i64_8i64:
+; X32-AVX: # BB#0:
+; X32-AVX-NEXT: vmovaps %ymm0, %ymm1
+; X32-AVX-NEXT: retl
+;
+; X32-AVX512-LABEL: reg_broadcast_4i64_8i64:
+; X32-AVX512: # BB#0:
+; X32-AVX512-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; X32-AVX512-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
+; X32-AVX512-NEXT: retl
+;
+; X64-AVX-LABEL: reg_broadcast_4i64_8i64:
+; X64-AVX: # BB#0:
+; X64-AVX-NEXT: vmovaps %ymm0, %ymm1
+; X64-AVX-NEXT: retq
+;
+; X64-AVX512-LABEL: reg_broadcast_4i64_8i64:
+; X64-AVX512: # BB#0:
+; X64-AVX512-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; X64-AVX512-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
+; X64-AVX512-NEXT: retq
+ %1 = shufflevector <4 x i64> %a0, <4 x i64> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>
+ ret <8 x i64> %1
+}
+
+define <8 x float> @reg_broadcast_4f32_8f32(<4 x float> %a0) nounwind {
+; X32-LABEL: reg_broadcast_4f32_8f32:
+; X32: # BB#0:
+; X32-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X32-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+; X32-NEXT: retl
+;
+; X64-LABEL: reg_broadcast_4f32_8f32:
+; X64: # BB#0:
+; X64-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X64-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+; X64-NEXT: retq
+ %1 = shufflevector <4 x float> %a0, <4 x float> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>
+ ret <8 x float> %1
+}
+
+define <16 x float> @reg_broadcast_4f32_16f32(<4 x float> %a0) nounwind {
+; X32-AVX-LABEL: reg_broadcast_4f32_16f32:
+; X32-AVX: # BB#0:
+; X32-AVX-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X32-AVX-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+; X32-AVX-NEXT: vmovaps %ymm0, %ymm1
+; X32-AVX-NEXT: retl
+;
+; X32-AVX512F-LABEL: reg_broadcast_4f32_16f32:
+; X32-AVX512F: # BB#0:
+; X32-AVX512F-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X32-AVX512F-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+; X32-AVX512F-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
+; X32-AVX512F-NEXT: retl
+;
+; X32-AVX512BW-LABEL: reg_broadcast_4f32_16f32:
+; X32-AVX512BW: # BB#0:
+; X32-AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X32-AVX512BW-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+; X32-AVX512BW-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
+; X32-AVX512BW-NEXT: retl
+;
+; X32-AVX512DQ-LABEL: reg_broadcast_4f32_16f32:
+; X32-AVX512DQ: # BB#0:
+; X32-AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X32-AVX512DQ-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+; X32-AVX512DQ-NEXT: vinsertf32x8 $1, %ymm0, %zmm0, %zmm0
+; X32-AVX512DQ-NEXT: retl
+;
+; X64-AVX-LABEL: reg_broadcast_4f32_16f32:
+; X64-AVX: # BB#0:
+; X64-AVX-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X64-AVX-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+; X64-AVX-NEXT: vmovaps %ymm0, %ymm1
+; X64-AVX-NEXT: retq
+;
+; X64-AVX512F-LABEL: reg_broadcast_4f32_16f32:
+; X64-AVX512F: # BB#0:
+; X64-AVX512F-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X64-AVX512F-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+; X64-AVX512F-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
+; X64-AVX512F-NEXT: retq
+;
+; X64-AVX512BW-LABEL: reg_broadcast_4f32_16f32:
+; X64-AVX512BW: # BB#0:
+; X64-AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X64-AVX512BW-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+; X64-AVX512BW-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
+; X64-AVX512BW-NEXT: retq
+;
+; X64-AVX512DQ-LABEL: reg_broadcast_4f32_16f32:
+; X64-AVX512DQ: # BB#0:
+; X64-AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X64-AVX512DQ-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+; X64-AVX512DQ-NEXT: vinsertf32x8 $1, %ymm0, %zmm0, %zmm0
+; X64-AVX512DQ-NEXT: retq
+ %1 = shufflevector <4 x float> %a0, <4 x float> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>
+ ret <16 x float> %1
+}
+
+define <16 x float> @reg_broadcast_8f32_16f32(<8 x float> %a0) nounwind {
+; X32-AVX-LABEL: reg_broadcast_8f32_16f32:
+; X32-AVX: # BB#0:
+; X32-AVX-NEXT: vmovaps %ymm0, %ymm1
+; X32-AVX-NEXT: retl
+;
+; X32-AVX512F-LABEL: reg_broadcast_8f32_16f32:
+; X32-AVX512F: # BB#0:
+; X32-AVX512F-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; X32-AVX512F-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
+; X32-AVX512F-NEXT: retl
+;
+; X32-AVX512BW-LABEL: reg_broadcast_8f32_16f32:
+; X32-AVX512BW: # BB#0:
+; X32-AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; X32-AVX512BW-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
+; X32-AVX512BW-NEXT: retl
+;
+; X32-AVX512DQ-LABEL: reg_broadcast_8f32_16f32:
+; X32-AVX512DQ: # BB#0:
+; X32-AVX512DQ-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; X32-AVX512DQ-NEXT: vinsertf32x8 $1, %ymm0, %zmm0, %zmm0
+; X32-AVX512DQ-NEXT: retl
+;
+; X64-AVX-LABEL: reg_broadcast_8f32_16f32:
+; X64-AVX: # BB#0:
+; X64-AVX-NEXT: vmovaps %ymm0, %ymm1
+; X64-AVX-NEXT: retq
+;
+; X64-AVX512F-LABEL: reg_broadcast_8f32_16f32:
+; X64-AVX512F: # BB#0:
+; X64-AVX512F-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; X64-AVX512F-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
+; X64-AVX512F-NEXT: retq
+;
+; X64-AVX512BW-LABEL: reg_broadcast_8f32_16f32:
+; X64-AVX512BW: # BB#0:
+; X64-AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; X64-AVX512BW-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
+; X64-AVX512BW-NEXT: retq
+;
+; X64-AVX512DQ-LABEL: reg_broadcast_8f32_16f32:
+; X64-AVX512DQ: # BB#0:
+; X64-AVX512DQ-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; X64-AVX512DQ-NEXT: vinsertf32x8 $1, %ymm0, %zmm0, %zmm0
+; X64-AVX512DQ-NEXT: retq
+ %1 = shufflevector <8 x float> %a0, <8 x float> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
+ ret <16 x float> %1
+}
+
+define <8 x i32> @reg_broadcast_4i32_8i32(<4 x i32> %a0) nounwind {
+; X32-LABEL: reg_broadcast_4i32_8i32:
+; X32: # BB#0:
+; X32-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X32-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+; X32-NEXT: retl
+;
+; X64-LABEL: reg_broadcast_4i32_8i32:
+; X64: # BB#0:
+; X64-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X64-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+; X64-NEXT: retq
+ %1 = shufflevector <4 x i32> %a0, <4 x i32> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>
+ ret <8 x i32> %1
+}
+
+define <16 x i32> @reg_broadcast_4i32_16i32(<4 x i32> %a0) nounwind {
+; X32-AVX-LABEL: reg_broadcast_4i32_16i32:
+; X32-AVX: # BB#0:
+; X32-AVX-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X32-AVX-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+; X32-AVX-NEXT: vmovaps %ymm0, %ymm1
+; X32-AVX-NEXT: retl
+;
+; X32-AVX512F-LABEL: reg_broadcast_4i32_16i32:
+; X32-AVX512F: # BB#0:
+; X32-AVX512F-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X32-AVX512F-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+; X32-AVX512F-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
+; X32-AVX512F-NEXT: retl
+;
+; X32-AVX512BW-LABEL: reg_broadcast_4i32_16i32:
+; X32-AVX512BW: # BB#0:
+; X32-AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X32-AVX512BW-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+; X32-AVX512BW-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
+; X32-AVX512BW-NEXT: retl
+;
+; X32-AVX512DQ-LABEL: reg_broadcast_4i32_16i32:
+; X32-AVX512DQ: # BB#0:
+; X32-AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X32-AVX512DQ-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+; X32-AVX512DQ-NEXT: vinsertf32x8 $1, %ymm0, %zmm0, %zmm0
+; X32-AVX512DQ-NEXT: retl
+;
+; X64-AVX-LABEL: reg_broadcast_4i32_16i32:
+; X64-AVX: # BB#0:
+; X64-AVX-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X64-AVX-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+; X64-AVX-NEXT: vmovaps %ymm0, %ymm1
+; X64-AVX-NEXT: retq
+;
+; X64-AVX512F-LABEL: reg_broadcast_4i32_16i32:
+; X64-AVX512F: # BB#0:
+; X64-AVX512F-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X64-AVX512F-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+; X64-AVX512F-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
+; X64-AVX512F-NEXT: retq
+;
+; X64-AVX512BW-LABEL: reg_broadcast_4i32_16i32:
+; X64-AVX512BW: # BB#0:
+; X64-AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X64-AVX512BW-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+; X64-AVX512BW-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
+; X64-AVX512BW-NEXT: retq
+;
+; X64-AVX512DQ-LABEL: reg_broadcast_4i32_16i32:
+; X64-AVX512DQ: # BB#0:
+; X64-AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X64-AVX512DQ-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+; X64-AVX512DQ-NEXT: vinsertf32x8 $1, %ymm0, %zmm0, %zmm0
+; X64-AVX512DQ-NEXT: retq
+ %1 = shufflevector <4 x i32> %a0, <4 x i32> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>
+ ret <16 x i32> %1
+}
+
+define <16 x i32> @reg_broadcast_8i32_16i32(<8 x i32> %a0) nounwind {
+; X32-AVX-LABEL: reg_broadcast_8i32_16i32:
+; X32-AVX: # BB#0:
+; X32-AVX-NEXT: vmovaps %ymm0, %ymm1
+; X32-AVX-NEXT: retl
+;
+; X32-AVX512F-LABEL: reg_broadcast_8i32_16i32:
+; X32-AVX512F: # BB#0:
+; X32-AVX512F-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; X32-AVX512F-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
+; X32-AVX512F-NEXT: retl
+;
+; X32-AVX512BW-LABEL: reg_broadcast_8i32_16i32:
+; X32-AVX512BW: # BB#0:
+; X32-AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; X32-AVX512BW-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
+; X32-AVX512BW-NEXT: retl
+;
+; X32-AVX512DQ-LABEL: reg_broadcast_8i32_16i32:
+; X32-AVX512DQ: # BB#0:
+; X32-AVX512DQ-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; X32-AVX512DQ-NEXT: vinsertf32x8 $1, %ymm0, %zmm0, %zmm0
+; X32-AVX512DQ-NEXT: retl
+;
+; X64-AVX-LABEL: reg_broadcast_8i32_16i32:
+; X64-AVX: # BB#0:
+; X64-AVX-NEXT: vmovaps %ymm0, %ymm1
+; X64-AVX-NEXT: retq
+;
+; X64-AVX512F-LABEL: reg_broadcast_8i32_16i32:
+; X64-AVX512F: # BB#0:
+; X64-AVX512F-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; X64-AVX512F-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
+; X64-AVX512F-NEXT: retq
+;
+; X64-AVX512BW-LABEL: reg_broadcast_8i32_16i32:
+; X64-AVX512BW: # BB#0:
+; X64-AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; X64-AVX512BW-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
+; X64-AVX512BW-NEXT: retq
+;
+; X64-AVX512DQ-LABEL: reg_broadcast_8i32_16i32:
+; X64-AVX512DQ: # BB#0:
+; X64-AVX512DQ-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; X64-AVX512DQ-NEXT: vinsertf32x8 $1, %ymm0, %zmm0, %zmm0
+; X64-AVX512DQ-NEXT: retq
+ %1 = shufflevector <8 x i32> %a0, <8 x i32> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
+ ret <16 x i32> %1
+}
+
+define <16 x i16> @reg_broadcast_8i16_16i16(<8 x i16> %a0) nounwind {
+; X32-LABEL: reg_broadcast_8i16_16i16:
+; X32: # BB#0:
+; X32-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X32-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+; X32-NEXT: retl
+;
+; X64-LABEL: reg_broadcast_8i16_16i16:
+; X64: # BB#0:
+; X64-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X64-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+; X64-NEXT: retq
+ %1 = shufflevector <8 x i16> %a0, <8 x i16> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
+ ret <16 x i16> %1
+}
+
+define <32 x i16> @reg_broadcast_8i16_32i16(<8 x i16> %a0) nounwind {
+; X32-AVX-LABEL: reg_broadcast_8i16_32i16:
+; X32-AVX: # BB#0:
+; X32-AVX-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X32-AVX-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+; X32-AVX-NEXT: vmovaps %ymm0, %ymm1
+; X32-AVX-NEXT: retl
+;
+; X32-AVX512F-LABEL: reg_broadcast_8i16_32i16:
+; X32-AVX512F: # BB#0:
+; X32-AVX512F-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X32-AVX512F-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+; X32-AVX512F-NEXT: vmovaps %ymm0, %ymm1
+; X32-AVX512F-NEXT: retl
+;
+; X32-AVX512BW-LABEL: reg_broadcast_8i16_32i16:
+; X32-AVX512BW: # BB#0:
+; X32-AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X32-AVX512BW-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+; X32-AVX512BW-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
+; X32-AVX512BW-NEXT: retl
+;
+; X32-AVX512DQ-LABEL: reg_broadcast_8i16_32i16:
+; X32-AVX512DQ: # BB#0:
+; X32-AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X32-AVX512DQ-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+; X32-AVX512DQ-NEXT: vmovaps %ymm0, %ymm1
+; X32-AVX512DQ-NEXT: retl
+;
+; X64-AVX-LABEL: reg_broadcast_8i16_32i16:
+; X64-AVX: # BB#0:
+; X64-AVX-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X64-AVX-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+; X64-AVX-NEXT: vmovaps %ymm0, %ymm1
+; X64-AVX-NEXT: retq
+;
+; X64-AVX512F-LABEL: reg_broadcast_8i16_32i16:
+; X64-AVX512F: # BB#0:
+; X64-AVX512F-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X64-AVX512F-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+; X64-AVX512F-NEXT: vmovaps %ymm0, %ymm1
+; X64-AVX512F-NEXT: retq
+;
+; X64-AVX512BW-LABEL: reg_broadcast_8i16_32i16:
+; X64-AVX512BW: # BB#0:
+; X64-AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X64-AVX512BW-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+; X64-AVX512BW-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
+; X64-AVX512BW-NEXT: retq
+;
+; X64-AVX512DQ-LABEL: reg_broadcast_8i16_32i16:
+; X64-AVX512DQ: # BB#0:
+; X64-AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X64-AVX512DQ-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+; X64-AVX512DQ-NEXT: vmovaps %ymm0, %ymm1
+; X64-AVX512DQ-NEXT: retq
+ %1 = shufflevector <8 x i16> %a0, <8 x i16> undef, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
+ ret <32 x i16> %1
+}
+
+define <32 x i16> @reg_broadcast_16i16_32i16(<16 x i16> %a0) nounwind {
+; X32-AVX-LABEL: reg_broadcast_16i16_32i16:
+; X32-AVX: # BB#0:
+; X32-AVX-NEXT: vmovaps %ymm0, %ymm1
+; X32-AVX-NEXT: retl
+;
+; X32-AVX512F-LABEL: reg_broadcast_16i16_32i16:
+; X32-AVX512F: # BB#0:
+; X32-AVX512F-NEXT: vmovaps %ymm0, %ymm1
+; X32-AVX512F-NEXT: retl
+;
+; X32-AVX512BW-LABEL: reg_broadcast_16i16_32i16:
+; X32-AVX512BW: # BB#0:
+; X32-AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; X32-AVX512BW-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
+; X32-AVX512BW-NEXT: retl
+;
+; X32-AVX512DQ-LABEL: reg_broadcast_16i16_32i16:
+; X32-AVX512DQ: # BB#0:
+; X32-AVX512DQ-NEXT: vmovaps %ymm0, %ymm1
+; X32-AVX512DQ-NEXT: retl
+;
+; X64-AVX-LABEL: reg_broadcast_16i16_32i16:
+; X64-AVX: # BB#0:
+; X64-AVX-NEXT: vmovaps %ymm0, %ymm1
+; X64-AVX-NEXT: retq
+;
+; X64-AVX512F-LABEL: reg_broadcast_16i16_32i16:
+; X64-AVX512F: # BB#0:
+; X64-AVX512F-NEXT: vmovaps %ymm0, %ymm1
+; X64-AVX512F-NEXT: retq
+;
+; X64-AVX512BW-LABEL: reg_broadcast_16i16_32i16:
+; X64-AVX512BW: # BB#0:
+; X64-AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; X64-AVX512BW-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
+; X64-AVX512BW-NEXT: retq
+;
+; X64-AVX512DQ-LABEL: reg_broadcast_16i16_32i16:
+; X64-AVX512DQ: # BB#0:
+; X64-AVX512DQ-NEXT: vmovaps %ymm0, %ymm1
+; X64-AVX512DQ-NEXT: retq
+ %1 = shufflevector <16 x i16> %a0, <16 x i16> undef, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
+ ret <32 x i16> %1
+}
+
+define <32 x i8> @reg_broadcast_16i8_32i8(<16 x i8> %a0) nounwind {
+; X32-LABEL: reg_broadcast_16i8_32i8:
+; X32: # BB#0:
+; X32-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X32-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+; X32-NEXT: retl
+;
+; X64-LABEL: reg_broadcast_16i8_32i8:
+; X64: # BB#0:
+; X64-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X64-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+; X64-NEXT: retq
+ %1 = shufflevector <16 x i8> %a0, <16 x i8> undef, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
+ ret <32 x i8> %1
+}
+
+define <64 x i8> @reg_broadcast_16i8_64i8(<16 x i8> %a0) nounwind {
+; X32-AVX-LABEL: reg_broadcast_16i8_64i8:
+; X32-AVX: # BB#0:
+; X32-AVX-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X32-AVX-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+; X32-AVX-NEXT: vmovaps %ymm0, %ymm1
+; X32-AVX-NEXT: retl
+;
+; X32-AVX512F-LABEL: reg_broadcast_16i8_64i8:
+; X32-AVX512F: # BB#0:
+; X32-AVX512F-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X32-AVX512F-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+; X32-AVX512F-NEXT: vmovaps %ymm0, %ymm1
+; X32-AVX512F-NEXT: retl
+;
+; X32-AVX512BW-LABEL: reg_broadcast_16i8_64i8:
+; X32-AVX512BW: # BB#0:
+; X32-AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X32-AVX512BW-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+; X32-AVX512BW-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
+; X32-AVX512BW-NEXT: retl
+;
+; X32-AVX512DQ-LABEL: reg_broadcast_16i8_64i8:
+; X32-AVX512DQ: # BB#0:
+; X32-AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X32-AVX512DQ-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+; X32-AVX512DQ-NEXT: vmovaps %ymm0, %ymm1
+; X32-AVX512DQ-NEXT: retl
+;
+; X64-AVX-LABEL: reg_broadcast_16i8_64i8:
+; X64-AVX: # BB#0:
+; X64-AVX-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X64-AVX-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+; X64-AVX-NEXT: vmovaps %ymm0, %ymm1
+; X64-AVX-NEXT: retq
+;
+; X64-AVX512F-LABEL: reg_broadcast_16i8_64i8:
+; X64-AVX512F: # BB#0:
+; X64-AVX512F-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X64-AVX512F-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+; X64-AVX512F-NEXT: vmovaps %ymm0, %ymm1
+; X64-AVX512F-NEXT: retq
+;
+; X64-AVX512BW-LABEL: reg_broadcast_16i8_64i8:
+; X64-AVX512BW: # BB#0:
+; X64-AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X64-AVX512BW-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+; X64-AVX512BW-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
+; X64-AVX512BW-NEXT: retq
+;
+; X64-AVX512DQ-LABEL: reg_broadcast_16i8_64i8:
+; X64-AVX512DQ: # BB#0:
+; X64-AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
+; X64-AVX512DQ-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+; X64-AVX512DQ-NEXT: vmovaps %ymm0, %ymm1
+; X64-AVX512DQ-NEXT: retq
+ %1 = shufflevector <16 x i8> %a0, <16 x i8> undef, <64 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
+ ret <64 x i8> %1
+}
+
+define <64 x i8> @reg_broadcast_32i8_64i8(<32 x i8> %a0) nounwind {
+; X32-AVX-LABEL: reg_broadcast_32i8_64i8:
+; X32-AVX: # BB#0:
+; X32-AVX-NEXT: vmovaps %ymm0, %ymm1
+; X32-AVX-NEXT: retl
+;
+; X32-AVX512F-LABEL: reg_broadcast_32i8_64i8:
+; X32-AVX512F: # BB#0:
+; X32-AVX512F-NEXT: vmovaps %ymm0, %ymm1
+; X32-AVX512F-NEXT: retl
+;
+; X32-AVX512BW-LABEL: reg_broadcast_32i8_64i8:
+; X32-AVX512BW: # BB#0:
+; X32-AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; X32-AVX512BW-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
+; X32-AVX512BW-NEXT: retl
+;
+; X32-AVX512DQ-LABEL: reg_broadcast_32i8_64i8:
+; X32-AVX512DQ: # BB#0:
+; X32-AVX512DQ-NEXT: vmovaps %ymm0, %ymm1
+; X32-AVX512DQ-NEXT: retl
+;
+; X64-AVX-LABEL: reg_broadcast_32i8_64i8:
+; X64-AVX: # BB#0:
+; X64-AVX-NEXT: vmovaps %ymm0, %ymm1
+; X64-AVX-NEXT: retq
+;
+; X64-AVX512F-LABEL: reg_broadcast_32i8_64i8:
+; X64-AVX512F: # BB#0:
+; X64-AVX512F-NEXT: vmovaps %ymm0, %ymm1
+; X64-AVX512F-NEXT: retq
+;
+; X64-AVX512BW-LABEL: reg_broadcast_32i8_64i8:
+; X64-AVX512BW: # BB#0:
+; X64-AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; X64-AVX512BW-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
+; X64-AVX512BW-NEXT: retq
+;
+; X64-AVX512DQ-LABEL: reg_broadcast_32i8_64i8:
+; X64-AVX512DQ: # BB#0:
+; X64-AVX512DQ-NEXT: vmovaps %ymm0, %ymm1
+; X64-AVX512DQ-NEXT: retq
+ %1 = shufflevector <32 x i8> %a0, <32 x i8> undef, <64 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>
+ ret <64 x i8> %1
+}
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