[PATCH] D36345: AMDGPU: Cleanup subtarget features

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Aug 4 19:01:49 PDT 2017


arsenm updated this revision to Diff 109842.
arsenm added a comment.

Don't add movrel feature to default target


https://reviews.llvm.org/D36345

Files:
  lib/Target/AMDGPU/AMDGPU.td
  lib/Target/AMDGPU/AMDGPUSubtarget.cpp
  lib/Target/AMDGPU/AMDGPUSubtarget.h
  lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
  lib/Target/AMDGPU/FLATInstructions.td
  lib/Target/AMDGPU/Processors.td
  lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
  test/CodeGen/AMDGPU/addrspacecast.ll
  test/CodeGen/AMDGPU/array-ptr-calc-i32.ll
  test/CodeGen/AMDGPU/bitcast-vector-extract.ll
  test/CodeGen/AMDGPU/br_cc.f16.ll
  test/CodeGen/AMDGPU/branch-relaxation.ll
  test/CodeGen/AMDGPU/callee-special-input-sgprs.ll
  test/CodeGen/AMDGPU/callee-special-input-vgprs.ll
  test/CodeGen/AMDGPU/captured-frame-index.ll
  test/CodeGen/AMDGPU/collapse-endcf.ll
  test/CodeGen/AMDGPU/ctpop.ll
  test/CodeGen/AMDGPU/ctpop64.ll
  test/CodeGen/AMDGPU/cvt_f32_ubyte.ll
  test/CodeGen/AMDGPU/fabs.f16.ll
  test/CodeGen/AMDGPU/fadd.f16.ll
  test/CodeGen/AMDGPU/fcopysign.f16.ll
  test/CodeGen/AMDGPU/fence-amdgiz.ll
  test/CodeGen/AMDGPU/fmax3.f64.ll
  test/CodeGen/AMDGPU/fmul.f16.ll
  test/CodeGen/AMDGPU/fpext.f16.ll
  test/CodeGen/AMDGPU/fptosi.f16.ll
  test/CodeGen/AMDGPU/fptoui.f16.ll
  test/CodeGen/AMDGPU/frame-index-amdgiz.ll
  test/CodeGen/AMDGPU/frame-index-elimination.ll
  test/CodeGen/AMDGPU/fsub.f16.ll
  test/CodeGen/AMDGPU/half.ll
  test/CodeGen/AMDGPU/indirect-addressing-si-noopt.ll
  test/CodeGen/AMDGPU/indirect-addressing-si.ll
  test/CodeGen/AMDGPU/insert_vector_elt.ll
  test/CodeGen/AMDGPU/llvm.ceil.f16.ll
  test/CodeGen/AMDGPU/llvm.cos.f16.ll
  test/CodeGen/AMDGPU/llvm.exp2.f16.ll
  test/CodeGen/AMDGPU/llvm.floor.f16.ll
  test/CodeGen/AMDGPU/llvm.fma.f16.ll
  test/CodeGen/AMDGPU/llvm.fmuladd.f16.ll
  test/CodeGen/AMDGPU/llvm.log2.f16.ll
  test/CodeGen/AMDGPU/llvm.maxnum.f16.ll
  test/CodeGen/AMDGPU/llvm.memcpy.ll
  test/CodeGen/AMDGPU/llvm.minnum.f16.ll
  test/CodeGen/AMDGPU/llvm.rint.f16.ll
  test/CodeGen/AMDGPU/llvm.round.ll
  test/CodeGen/AMDGPU/llvm.sin.f16.ll
  test/CodeGen/AMDGPU/llvm.sqrt.f16.ll
  test/CodeGen/AMDGPU/llvm.trunc.f16.ll
  test/CodeGen/AMDGPU/macro-fusion-cluster-vcc-uses.mir
  test/CodeGen/AMDGPU/merge-stores.ll
  test/CodeGen/AMDGPU/promote-alloca-mem-intrinsics.ll
  test/CodeGen/AMDGPU/promote-alloca-no-opts.ll
  test/CodeGen/AMDGPU/promote-alloca-padding-size-estimate.ll
  test/CodeGen/AMDGPU/s_addk_i32.ll
  test/CodeGen/AMDGPU/s_mulk_i32.ll
  test/CodeGen/AMDGPU/sad.ll
  test/CodeGen/AMDGPU/schedule-kernel-arg-loads.ll
  test/CodeGen/AMDGPU/schedule-regpressure-limit2.ll
  test/CodeGen/AMDGPU/select-vectors.ll
  test/CodeGen/AMDGPU/select.f16.ll
  test/CodeGen/AMDGPU/setcc-fneg-constant.ll
  test/CodeGen/AMDGPU/shift-and-i128-ubfe.ll
  test/CodeGen/AMDGPU/shift-and-i64-ubfe.ll
  test/CodeGen/AMDGPU/shl_add_constant.ll
  test/CodeGen/AMDGPU/sitofp.f16.ll
  test/CodeGen/AMDGPU/trunc.ll
  test/CodeGen/AMDGPU/udivrem.ll
  test/CodeGen/AMDGPU/uitofp.f16.ll
  test/CodeGen/AMDGPU/v_mac_f16.ll
  test/CodeGen/AMDGPU/vector-extract-insert.ll

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