[PATCH] D33814: CodeGen: Fix ARM cmpxchg64 register fragmentation in fast-regalloc

[Matthias Braun via Phabricator via llvm-commits]

MatzeB added a reviewer: qcolombet.
MatzeB added a comment.

+ Quentin for register allocation

I'd prefer not to add additional logic into the main path of the fast register allocator. How about just reordering the operands of `CMP_SWAP_64` (or for all of the CMP_SWAP operations for consistency) instead?


https://reviews.llvm.org/D33814