[PATCH] D36158: [DAG] Allow merging of stores of vector loads
Nirav Dave via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Aug 3 08:52:20 PDT 2017
This revision was automatically updated to reflect the committed changes.
Closed by commit rL309951: [DAG] Allow merging of stores of vector loads (authored by niravd).
Changed prior to commit:
https://reviews.llvm.org/D36158?vs=109163&id=109572#toc
Repository:
rL LLVM
https://reviews.llvm.org/D36158
Files:
llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
llvm/trunk/test/CodeGen/X86/MergeConsecutiveStores.ll
Index: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
===================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -12719,12 +12719,6 @@
if (!IsConstantSrc && !IsLoadSrc && !IsExtractVecSrc)
return false;
- // Don't merge vectors into wider vectors if the source data comes from loads.
- // TODO: This restriction can be lifted by using logic similar to the
- // ExtractVecSrc case.
- if (MemVT.isVector() && IsLoadSrc)
- return false;
-
SmallVector<MemOpLink, 8> StoreNodes;
// Find potential store merge candidates by searching through chain sub-DAG
getStoreMergeCandidates(St, StoreNodes);
Index: llvm/trunk/test/CodeGen/X86/MergeConsecutiveStores.ll
===================================================================
--- llvm/trunk/test/CodeGen/X86/MergeConsecutiveStores.ll
+++ llvm/trunk/test/CodeGen/X86/MergeConsecutiveStores.ll
@@ -535,10 +535,9 @@
ret void
; CHECK-LABEL: merge_vec_stores_from_loads
-; CHECK: vmovaps
-; CHECK-NEXT: vmovaps
-; CHECK-NEXT: vmovaps
-; CHECK-NEXT: vmovaps
+; CHECK: vmovups (%rdi), %ymm0
+; CHECK-NEXT: vmovups %ymm0, (%rsi)
+; CHECK-NEXT: vzeroupper
; CHECK-NEXT: retq
}
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