[PATCH] D36222: [MIPS] Add support to match more patterns for BBIT instruction.

[Simon Dardis via Phabricator via llvm-commits]

sdardis added a comment.

The approach here is somewhat overly verbose and can be dramatically simplified:

  def : MipsPat<(brcond (i32 (seteq (and i32:$lhs, PowerOf2LO_i32:$mask), 0)),
                         bb:$dst),
                (BBIT0 (INSERT_SUBREG (i64 (IMPLICIT_DEF)), i32:$lhs, sub_32),
                       (Log2LO PowerOf2LO_i32:$mask), bb:$dst)>, ASE_MIPS64_CNMIPS;

achieves the same result without having to define new instructions and the relevant branch analysis. Can you use that approach rather than defining codegen only instructions?


Repository:
  rL LLVM

https://reviews.llvm.org/D36222