[llvm] r309806 - [MIR] Print target-specific constant pools

Diana Picus via llvm-commits llvm-commits at lists.llvm.org
Wed Aug 2 04:09:30 PDT 2017


Author: rovka
Date: Wed Aug  2 04:09:30 2017
New Revision: 309806

URL: http://llvm.org/viewvc/llvm-project?rev=309806&view=rev
Log:
[MIR] Print target-specific constant pools

This should enable us to test the generation of target-specific constant
pools, e.g. for ARM:

constants:
 - id:              0
   value:           'g(GOT_PREL)-(LPC0+8-.)'
   alignment:       4
   isTargetSpecific: true

I intend to use this to test PIC support in GlobalISel for ARM.

This is difficult to test outside of that context, since the existing
MIR tests usually rely on parser support as well, and that seems a bit
trickier to add. We could try to add a unit test, but the setup for that
seems rather convoluted and overkill.

We do test however that the parser reports a nice error when
encountering a target-specific constant pool.

Differential Revision: https://reviews.llvm.org/D36092

Added:
    llvm/trunk/test/CodeGen/MIR/ARM/target-constant-pools-error.mir
Modified:
    llvm/trunk/include/llvm/CodeGen/MIRYamlMapping.h
    llvm/trunk/lib/CodeGen/MIRParser/MIRParser.cpp
    llvm/trunk/lib/CodeGen/MIRPrinter.cpp
    llvm/trunk/test/CodeGen/MIR/X86/constant-pool.mir

Modified: llvm/trunk/include/llvm/CodeGen/MIRYamlMapping.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MIRYamlMapping.h?rev=309806&r1=309805&r2=309806&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/MIRYamlMapping.h (original)
+++ llvm/trunk/include/llvm/CodeGen/MIRYamlMapping.h Wed Aug  2 04:09:30 2017
@@ -310,9 +310,11 @@ struct MachineConstantPoolValue {
   UnsignedValue ID;
   StringValue Value;
   unsigned Alignment = 0;
+  bool IsTargetSpecific = false;
   bool operator==(const MachineConstantPoolValue &Other) const {
     return ID == Other.ID && Value == Other.Value &&
-           Alignment == Other.Alignment;
+           Alignment == Other.Alignment &&
+           IsTargetSpecific == Other.IsTargetSpecific;
   }
 };
 
@@ -321,6 +323,7 @@ template <> struct MappingTraits<Machine
     YamlIO.mapRequired("id", Constant.ID);
     YamlIO.mapOptional("value", Constant.Value, StringValue());
     YamlIO.mapOptional("alignment", Constant.Alignment, (unsigned)0);
+    YamlIO.mapOptional("isTargetSpecific", Constant.IsTargetSpecific, false);
   }
 };
 

Modified: llvm/trunk/lib/CodeGen/MIRParser/MIRParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MIRParser/MIRParser.cpp?rev=309806&r1=309805&r2=309806&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MIRParser/MIRParser.cpp (original)
+++ llvm/trunk/lib/CodeGen/MIRParser/MIRParser.cpp Wed Aug  2 04:09:30 2017
@@ -719,6 +719,10 @@ bool MIRParserImpl::initializeConstantPo
   const auto &M = *MF.getFunction()->getParent();
   SMDiagnostic Error;
   for (const auto &YamlConstant : YamlMF.Constants) {
+    if (YamlConstant.IsTargetSpecific)
+      // FIXME: Support target-specific constant pools
+      return error(YamlConstant.Value.SourceRange.Start,
+                   "Can't parse target-specific constant pool entries yet");
     const Constant *Value = dyn_cast_or_null<Constant>(
         parseConstantValue(YamlConstant.Value.Value, Error, M));
     if (!Value)

Modified: llvm/trunk/lib/CodeGen/MIRPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MIRPrinter.cpp?rev=309806&r1=309805&r2=309806&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MIRPrinter.cpp (original)
+++ llvm/trunk/lib/CodeGen/MIRPrinter.cpp Wed Aug  2 04:09:30 2017
@@ -458,17 +458,20 @@ void MIRPrinter::convert(yaml::MachineFu
                          const MachineConstantPool &ConstantPool) {
   unsigned ID = 0;
   for (const MachineConstantPoolEntry &Constant : ConstantPool.getConstants()) {
-    // TODO: Serialize target specific constant pool entries.
-    if (Constant.isMachineConstantPoolEntry())
-      llvm_unreachable("Can't print target specific constant pool entries yet");
-
-    yaml::MachineConstantPoolValue YamlConstant;
     std::string Str;
     raw_string_ostream StrOS(Str);
-    Constant.Val.ConstVal->printAsOperand(StrOS);
+    if (Constant.isMachineConstantPoolEntry()) {
+      Constant.Val.MachineCPVal->print(StrOS);
+    } else {
+      Constant.Val.ConstVal->printAsOperand(StrOS);
+    }
+
+    yaml::MachineConstantPoolValue YamlConstant;
     YamlConstant.ID = ID++;
     YamlConstant.Value = StrOS.str();
     YamlConstant.Alignment = Constant.getAlignment();
+    YamlConstant.IsTargetSpecific = Constant.isMachineConstantPoolEntry();
+
     MF.Constants.push_back(YamlConstant);
   }
 }

Added: llvm/trunk/test/CodeGen/MIR/ARM/target-constant-pools-error.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/ARM/target-constant-pools-error.mir?rev=309806&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/ARM/target-constant-pools-error.mir (added)
+++ llvm/trunk/test/CodeGen/MIR/ARM/target-constant-pools-error.mir Wed Aug  2 04:09:30 2017
@@ -0,0 +1,27 @@
+# RUN: not llc -mtriple arm-unknown -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
+--- |
+  target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
+
+  @g = private global i32 4
+  define void @target_constant_pool() { ret void }
+...
+---
+name:            target_constant_pool
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gpr, preferred-register: '' }
+  - { id: 1, class: gpr, preferred-register: '' }
+constants:
+  - id:              0
+  # CHECK: [[@LINE+1]]:22: Can't parse target-specific constant pool entries yet
+    value:           'g-(LPC0+8)'
+    alignment:       4
+    isTargetSpecific: true
+body:             |
+  bb.0.entry:
+    %0 = LDRi12 %const.0, 0, 14, _ :: (load 4 from constant-pool)
+    %1 = PICLDR killed %0, 0, 14, _ :: (dereferenceable load 4 from @g)
+    %r0 = COPY %1
+    BX_RET 14, _, implicit %r0
+
+...

Modified: llvm/trunk/test/CodeGen/MIR/X86/constant-pool.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/constant-pool.mir?rev=309806&r1=309805&r2=309806&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/constant-pool.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/X86/constant-pool.mir Wed Aug  2 04:09:30 2017
@@ -46,9 +46,11 @@
 # CHECK-NEXT: - id: 0
 # CHECK-NEXT:   value: 'double 3.250000e+00'
 # CHECK-NEXT:   alignment: 8
+# CHECK-NEXT:   isTargetSpecific: false
 # CHECK-NEXT: - id: 1
 # CHECK-NEXT:   value: 'float 6.250000e+00'
 # CHECK-NEXT:   alignment: 4
+# CHECK-NEXT:   isTargetSpecific: false
 name:            test
 constants:
   - id:          0
@@ -74,9 +76,11 @@ body: |
 # CHECK-NEXT: - id: 0
 # CHECK-NEXT:   value: 'double 3.250000e+00'
 # CHECK-NEXT:   alignment: 8
+# CHECK-NEXT:   isTargetSpecific: false
 # CHECK-NEXT: - id: 1
 # CHECK-NEXT:   value: 'float 6.250000e+00'
 # CHECK-NEXT:   alignment: 4
+# CHECK-NEXT:   isTargetSpecific: false
 name:            test2
 constants:
   - id:          0
@@ -98,9 +102,11 @@ body: |
 # CHECK-NEXT: - id: 0
 # CHECK-NEXT:   value: 'double 3.250000e+00'
 # CHECK-NEXT:   alignment: 128
+# CHECK-NEXT:   isTargetSpecific: false
 # CHECK-NEXT: - id: 1
 # CHECK-NEXT:   value: 'float 6.250000e+00'
 # CHECK-NEXT:   alignment: 1
+# CHECK-NEXT:   isTargetSpecific: false
 name:            test3
 constants:
   - id:          0




More information about the llvm-commits mailing list