[llvm] r309774 - X86: Do not use llc -march in tests.
Matthias Braun via llvm-commits
llvm-commits at lists.llvm.org
Tue Aug 1 17:28:13 PDT 2017
Author: matze
Date: Tue Aug 1 17:28:10 2017
New Revision: 309774
URL: http://llvm.org/viewvc/llvm-project?rev=309774&view=rev
Log:
X86: Do not use llc -march in tests.
`llc -march` is problematic because it only switches the target
architecture, but leaves the operating system unchanged. This
occasionally leads to indeterministic tests because the OS from
LLVM_DEFAULT_TARGET_TRIPLE is used.
However we can simply always use `llc -mtriple` instead. This changes
all the tests to do this to avoid people using -march when they copy and
paste parts of tests.
See also the discussion in https://reviews.llvm.org/D35287
Modified:
llvm/trunk/test/CodeGen/X86/2003-08-03-CallArgLiveRanges.ll
llvm/trunk/test/CodeGen/X86/2003-08-23-DeadBlockTest.ll
llvm/trunk/test/CodeGen/X86/2003-11-03-GlobalBool.ll
llvm/trunk/test/CodeGen/X86/2004-02-13-FrameReturnAddress.ll
llvm/trunk/test/CodeGen/X86/2004-02-14-InefficientStackPointer.ll
llvm/trunk/test/CodeGen/X86/2004-02-22-Casts.ll
llvm/trunk/test/CodeGen/X86/2004-03-30-Select-Max.ll
llvm/trunk/test/CodeGen/X86/2004-04-13-FPCMOV-Crash.ll
llvm/trunk/test/CodeGen/X86/2004-06-10-StackifierCrash.ll
llvm/trunk/test/CodeGen/X86/2004-10-08-SelectSetCCFold.ll
llvm/trunk/test/CodeGen/X86/2005-01-17-CycleInDAG.ll
llvm/trunk/test/CodeGen/X86/2005-02-14-IllegalAssembler.ll
llvm/trunk/test/CodeGen/X86/2005-05-08-FPStackifierPHI.ll
llvm/trunk/test/CodeGen/X86/2006-03-02-InstrSchedBug.ll
llvm/trunk/test/CodeGen/X86/2006-04-04-CrossBlockCrash.ll
llvm/trunk/test/CodeGen/X86/2006-04-27-ISelFoldingBug.ll
llvm/trunk/test/CodeGen/X86/2006-05-01-SchedCausingSpills.ll
llvm/trunk/test/CodeGen/X86/2006-05-02-InstrSched2.ll
llvm/trunk/test/CodeGen/X86/2006-05-08-CoalesceSubRegClass.ll
llvm/trunk/test/CodeGen/X86/2006-05-08-InstrSched.ll
llvm/trunk/test/CodeGen/X86/2006-05-11-InstrSched.ll
llvm/trunk/test/CodeGen/X86/2006-05-17-VectorArg.ll
llvm/trunk/test/CodeGen/X86/2006-05-22-FPSetEQ.ll
llvm/trunk/test/CodeGen/X86/2006-05-25-CycleInDAG.ll
llvm/trunk/test/CodeGen/X86/2006-07-10-InlineAsmAConstraint.ll
llvm/trunk/test/CodeGen/X86/2006-07-12-InlineAsmQConstraint.ll
llvm/trunk/test/CodeGen/X86/2006-07-20-InlineAsm.ll
llvm/trunk/test/CodeGen/X86/2006-07-28-AsmPrint-Long-As-Pointer.ll
llvm/trunk/test/CodeGen/X86/2006-07-31-SingleRegClass.ll
llvm/trunk/test/CodeGen/X86/2006-08-07-CycleInDAG.ll
llvm/trunk/test/CodeGen/X86/2006-08-16-CycleInDAG.ll
llvm/trunk/test/CodeGen/X86/2006-08-21-ExtraMovInst.ll
llvm/trunk/test/CodeGen/X86/2006-09-01-CycleInDAG.ll
llvm/trunk/test/CodeGen/X86/2006-10-09-CycleInDAG.ll
llvm/trunk/test/CodeGen/X86/2006-10-10-FindModifiedNodeSlotBug.ll
llvm/trunk/test/CodeGen/X86/2006-10-12-CycleInDAG.ll
llvm/trunk/test/CodeGen/X86/2006-10-13-CycleInDAG.ll
llvm/trunk/test/CodeGen/X86/2006-10-19-SwitchUnnecessaryBranching.ll
llvm/trunk/test/CodeGen/X86/2006-11-12-CSRetCC.ll
llvm/trunk/test/CodeGen/X86/2006-11-17-IllegalMove.ll
llvm/trunk/test/CodeGen/X86/2006-11-27-SelectLegalize.ll
llvm/trunk/test/CodeGen/X86/2006-12-16-InlineAsmCrash.ll
llvm/trunk/test/CodeGen/X86/2006-12-19-IntelSyntax.ll
llvm/trunk/test/CodeGen/X86/2007-01-13-StackPtrIndex.ll
llvm/trunk/test/CodeGen/X86/2007-01-29-InlineAsm-ir.ll
llvm/trunk/test/CodeGen/X86/2007-02-04-OrAddrMode.ll
llvm/trunk/test/CodeGen/X86/2007-02-19-LiveIntervalAssert.ll
llvm/trunk/test/CodeGen/X86/2007-02-23-DAGCombine-Miscompile.ll
llvm/trunk/test/CodeGen/X86/2007-02-25-FastCCStack.ll
llvm/trunk/test/CodeGen/X86/2007-03-15-GEP-Idx-Sink.ll
llvm/trunk/test/CodeGen/X86/2007-03-16-InlineAsm.ll
llvm/trunk/test/CodeGen/X86/2007-03-18-LiveIntervalAssert.ll
llvm/trunk/test/CodeGen/X86/2007-03-24-InlineAsmMultiRegConstraint.ll
llvm/trunk/test/CodeGen/X86/2007-03-24-InlineAsmPModifier.ll
llvm/trunk/test/CodeGen/X86/2007-03-24-InlineAsmVectorOp.ll
llvm/trunk/test/CodeGen/X86/2007-03-24-InlineAsmXConstraint.ll
llvm/trunk/test/CodeGen/X86/2007-03-26-CoalescerBug.ll
llvm/trunk/test/CodeGen/X86/2007-04-11-InlineAsmVectorResult.ll
llvm/trunk/test/CodeGen/X86/2007-04-24-Huge-Stack.ll
llvm/trunk/test/CodeGen/X86/2007-05-05-VecCastExpand.ll
llvm/trunk/test/CodeGen/X86/2007-05-14-LiveIntervalAssert.ll
llvm/trunk/test/CodeGen/X86/2007-05-17-ShuffleISelBug.ll
llvm/trunk/test/CodeGen/X86/2007-06-28-X86-64-isel.ll
llvm/trunk/test/CodeGen/X86/2007-06-29-DAGCombinerBug.ll
llvm/trunk/test/CodeGen/X86/2007-06-29-VecFPConstantCSEBug.ll
llvm/trunk/test/CodeGen/X86/2007-08-01-LiveVariablesBug.ll
llvm/trunk/test/CodeGen/X86/2007-08-10-SignExtSubreg.ll
llvm/trunk/test/CodeGen/X86/2007-10-04-AvoidEFLAGSCopy.ll
llvm/trunk/test/CodeGen/X86/2007-10-12-CoalesceExtSubReg.ll
llvm/trunk/test/CodeGen/X86/2007-10-12-SpillerUnfold1.ll
llvm/trunk/test/CodeGen/X86/2007-10-12-SpillerUnfold2.ll
llvm/trunk/test/CodeGen/X86/2007-10-19-SpillerUnfold.ll
llvm/trunk/test/CodeGen/X86/2007-10-29-ExtendSetCC.ll
llvm/trunk/test/CodeGen/X86/2007-10-30-LSRCrash.ll
llvm/trunk/test/CodeGen/X86/2007-10-31-extractelement-i64.ll
llvm/trunk/test/CodeGen/X86/2007-11-01-ISelCrash.ll
llvm/trunk/test/CodeGen/X86/2007-11-06-InstrSched.ll
llvm/trunk/test/CodeGen/X86/2007-11-07-MulBy4.ll
llvm/trunk/test/CodeGen/X86/2007-11-30-LoadFolding-Bug.ll
llvm/trunk/test/CodeGen/X86/2007-12-18-LoadCSEBug.ll
llvm/trunk/test/CodeGen/X86/2008-01-08-SchedulerCrash.ll
llvm/trunk/test/CodeGen/X86/2008-01-16-FPStackifierAssert.ll
llvm/trunk/test/CodeGen/X86/2008-01-16-InvalidDAGCombineXform.ll
llvm/trunk/test/CodeGen/X86/2008-02-05-ISelCrash.ll
llvm/trunk/test/CodeGen/X86/2008-02-06-LoadFoldingBug.ll
llvm/trunk/test/CodeGen/X86/2008-02-18-TailMergingBug.ll
llvm/trunk/test/CodeGen/X86/2008-02-22-LocalRegAllocBug.ll
llvm/trunk/test/CodeGen/X86/2008-02-25-X86-64-CoalescerBug.ll
llvm/trunk/test/CodeGen/X86/2008-02-26-AsmDirectMemOp.ll
llvm/trunk/test/CodeGen/X86/2008-02-27-DeadSlotElimBug.ll
llvm/trunk/test/CodeGen/X86/2008-02-27-PEICrash.ll
llvm/trunk/test/CodeGen/X86/2008-03-06-frem-fpstack.ll
llvm/trunk/test/CodeGen/X86/2008-03-07-APIntBug.ll
llvm/trunk/test/CodeGen/X86/2008-03-13-TwoAddrPassCrash.ll
llvm/trunk/test/CodeGen/X86/2008-03-19-DAGCombinerBug.ll
llvm/trunk/test/CodeGen/X86/2008-03-25-TwoAddrPassBug.ll
llvm/trunk/test/CodeGen/X86/2008-04-09-BranchFolding.ll
llvm/trunk/test/CodeGen/X86/2008-04-16-CoalescerBug.ll
llvm/trunk/test/CodeGen/X86/2008-04-24-MemCpyBug.ll
llvm/trunk/test/CodeGen/X86/2008-04-28-CyclicSchedUnit.ll
llvm/trunk/test/CodeGen/X86/2008-05-01-InvalidOrdCompare.ll
llvm/trunk/test/CodeGen/X86/2008-05-09-PHIElimBug.ll
llvm/trunk/test/CodeGen/X86/2008-05-09-ShuffleLoweringBug.ll
llvm/trunk/test/CodeGen/X86/2008-05-21-CoalescerBug.ll
llvm/trunk/test/CodeGen/X86/2008-05-22-FoldUnalignedLoad.ll
llvm/trunk/test/CodeGen/X86/2008-06-13-NotVolatileLoadStore.ll
llvm/trunk/test/CodeGen/X86/2008-06-25-VecISelBug.ll
llvm/trunk/test/CodeGen/X86/2008-07-11-SHLBy1.ll
llvm/trunk/test/CodeGen/X86/2008-07-22-CombinerCrash.ll
llvm/trunk/test/CodeGen/X86/2008-07-23-VSetCC.ll
llvm/trunk/test/CodeGen/X86/2008-08-06-CmpStride.ll
llvm/trunk/test/CodeGen/X86/2008-08-06-RewriterBug.ll
llvm/trunk/test/CodeGen/X86/2008-08-23-64Bit-maskmovq.ll
llvm/trunk/test/CodeGen/X86/2008-09-05-sinttofp-2xi32.ll
llvm/trunk/test/CodeGen/X86/2008-09-11-CoalescerBug.ll
llvm/trunk/test/CodeGen/X86/2008-09-11-CoalescerBug2.ll
llvm/trunk/test/CodeGen/X86/2008-09-17-inline-asm-1.ll
llvm/trunk/test/CodeGen/X86/2008-09-18-inline-asm-2.ll
llvm/trunk/test/CodeGen/X86/2008-09-25-sseregparm-1.ll
llvm/trunk/test/CodeGen/X86/2008-09-29-VolatileBug.ll
llvm/trunk/test/CodeGen/X86/2008-10-06-x87ld-nan-1.ll
llvm/trunk/test/CodeGen/X86/2008-10-06-x87ld-nan-2.ll
llvm/trunk/test/CodeGen/X86/2008-10-07-SSEISelBug.ll
llvm/trunk/test/CodeGen/X86/2008-10-13-CoalescerBug.ll
llvm/trunk/test/CodeGen/X86/2008-10-16-VecUnaryOp.ll
llvm/trunk/test/CodeGen/X86/2008-10-17-Asm64bitRConstraint.ll
llvm/trunk/test/CodeGen/X86/2008-10-20-AsmDoubleInI32.ll
llvm/trunk/test/CodeGen/X86/2008-10-24-FlippedCompare.ll
llvm/trunk/test/CodeGen/X86/2008-10-29-ExpandVAARG.ll
llvm/trunk/test/CodeGen/X86/2008-11-03-F80VAARG.ll
llvm/trunk/test/CodeGen/X86/2008-12-02-dagcombine-1.ll
llvm/trunk/test/CodeGen/X86/2008-12-02-dagcombine-2.ll
llvm/trunk/test/CodeGen/X86/2008-12-02-dagcombine-3.ll
llvm/trunk/test/CodeGen/X86/2008-12-16-dagcombine-4.ll
llvm/trunk/test/CodeGen/X86/2008-12-22-dagcombine-5.ll
llvm/trunk/test/CodeGen/X86/2008-12-23-crazy-address.ll
llvm/trunk/test/CodeGen/X86/2008-12-23-dagcombine-6.ll
llvm/trunk/test/CodeGen/X86/2009-01-13-DoubleUpdate.ll
llvm/trunk/test/CodeGen/X86/2009-01-16-UIntToFP.ll
llvm/trunk/test/CodeGen/X86/2009-01-25-NoSSE.ll
llvm/trunk/test/CodeGen/X86/2009-01-26-WrongCheck.ll
llvm/trunk/test/CodeGen/X86/2009-01-31-BigShift.ll
llvm/trunk/test/CodeGen/X86/2009-01-31-BigShift2.ll
llvm/trunk/test/CodeGen/X86/2009-01-31-BigShift3.ll
llvm/trunk/test/CodeGen/X86/2009-02-01-LargeMask.ll
llvm/trunk/test/CodeGen/X86/2009-02-03-AnalyzedTwice.ll
llvm/trunk/test/CodeGen/X86/2009-02-08-CoalescerBug.ll
llvm/trunk/test/CodeGen/X86/2009-02-12-DebugInfoVLA.ll
llvm/trunk/test/CodeGen/X86/2009-02-12-InlineAsm-nieZ-constraints.ll
llvm/trunk/test/CodeGen/X86/2009-02-12-SpillerBug.ll
llvm/trunk/test/CodeGen/X86/2009-02-25-CommuteBug.ll
llvm/trunk/test/CodeGen/X86/2009-02-26-MachineLICMBug.ll
llvm/trunk/test/CodeGen/X86/2009-03-03-BTHang.ll
llvm/trunk/test/CodeGen/X86/2009-03-03-BitcastLongDouble.ll
llvm/trunk/test/CodeGen/X86/2009-03-07-FPConstSelect.ll
llvm/trunk/test/CodeGen/X86/2009-03-09-APIntCrash.ll
llvm/trunk/test/CodeGen/X86/2009-03-25-TestBug.ll
llvm/trunk/test/CodeGen/X86/2009-03-26-NoImplicitFPBug.ll
llvm/trunk/test/CodeGen/X86/2009-04-12-picrel.ll
llvm/trunk/test/CodeGen/X86/2009-04-24.ll
llvm/trunk/test/CodeGen/X86/2009-04-25-CoalescerBug.ll
llvm/trunk/test/CodeGen/X86/2009-04-scale.ll
llvm/trunk/test/CodeGen/X86/2009-05-11-tailmerge-crash.ll
llvm/trunk/test/CodeGen/X86/2009-05-19-SingleElementExtractElement.ll
llvm/trunk/test/CodeGen/X86/2009-05-28-DAGCombineCrash.ll
llvm/trunk/test/CodeGen/X86/2009-05-30-ISelBug.ll
llvm/trunk/test/CodeGen/X86/2009-06-04-VirtualLiveIn.ll
llvm/trunk/test/CodeGen/X86/2009-06-05-VZextByteShort.ll
llvm/trunk/test/CodeGen/X86/2009-06-05-sitofpCrash.ll
llvm/trunk/test/CodeGen/X86/2009-06-12-x86_64-tail-call-conv-out-of-sync-bug.ll
llvm/trunk/test/CodeGen/X86/2009-06-15-not-a-tail-call.ll
llvm/trunk/test/CodeGen/X86/2009-06-18-movlp-shuffle-register.ll
llvm/trunk/test/CodeGen/X86/2009-07-06-TwoAddrAssert.ll
llvm/trunk/test/CodeGen/X86/2009-07-07-SplitICmp.ll
llvm/trunk/test/CodeGen/X86/2009-07-09-ExtractBoolFromVector.ll
llvm/trunk/test/CodeGen/X86/2009-07-19-AsmExtraOperands.ll
llvm/trunk/test/CodeGen/X86/2009-07-20-DAGCombineBug.ll
llvm/trunk/test/CodeGen/X86/2009-08-19-LoadNarrowingMiscompile.ll
llvm/trunk/test/CodeGen/X86/2009-08-23-SubRegReuseUndo.ll
llvm/trunk/test/CodeGen/X86/20090313-signext.ll
llvm/trunk/test/CodeGen/X86/2010-01-05-ZExt-Shl.ll
llvm/trunk/test/CodeGen/X86/2010-01-15-SelectionDAGCycle.ll
llvm/trunk/test/CodeGen/X86/2010-01-18-DbgValue.ll
llvm/trunk/test/CodeGen/X86/2010-02-03-DualUndef.ll
llvm/trunk/test/CodeGen/X86/2010-02-11-NonTemporal.ll
llvm/trunk/test/CodeGen/X86/2010-02-23-DAGCombineBug.ll
llvm/trunk/test/CodeGen/X86/2010-06-14-fast-isel-fs-load.ll
llvm/trunk/test/CodeGen/X86/2010-06-28-FastAllocTiedOperand.ll
llvm/trunk/test/CodeGen/X86/2010-09-17-SideEffectsInChain.ll
llvm/trunk/test/CodeGen/X86/2010-10-08-cmpxchg8b.ll
llvm/trunk/test/CodeGen/X86/2010-11-09-MOVLPS.ll
llvm/trunk/test/CodeGen/X86/2010-11-18-SelectOfExtload.ll
llvm/trunk/test/CodeGen/X86/2011-02-21-VirtRegRewriter-KillSubReg.ll
llvm/trunk/test/CodeGen/X86/2011-03-02-DAGCombiner.ll
llvm/trunk/test/CodeGen/X86/2011-03-30-CreateFixedObjCrash.ll
llvm/trunk/test/CodeGen/X86/2011-05-09-loaduse.ll
llvm/trunk/test/CodeGen/X86/2011-06-01-fildll.ll
llvm/trunk/test/CodeGen/X86/2011-06-03-x87chain.ll
llvm/trunk/test/CodeGen/X86/2011-06-06-fgetsign80bit.ll
llvm/trunk/test/CodeGen/X86/2011-06-14-PreschedRegalias.ll
llvm/trunk/test/CodeGen/X86/2011-07-13-BadFrameIndexDisplacement.ll
llvm/trunk/test/CodeGen/X86/2011-08-23-PerformSubCombine128.ll
llvm/trunk/test/CodeGen/X86/2011-08-23-Trampoline.ll
llvm/trunk/test/CodeGen/X86/2011-08-29-BlockConstant.ll
llvm/trunk/test/CodeGen/X86/2011-09-14-valcoalesce.ll
llvm/trunk/test/CodeGen/X86/2011-09-18-sse2cmp.ll
llvm/trunk/test/CodeGen/X86/2011-09-21-setcc-bug.ll
llvm/trunk/test/CodeGen/X86/2011-10-18-FastISel-VectorParams.ll
llvm/trunk/test/CodeGen/X86/2011-10-19-LegelizeLoad.ll
llvm/trunk/test/CodeGen/X86/2011-10-27-tstore.ll
llvm/trunk/test/CodeGen/X86/2011-10-30-padd.ll
llvm/trunk/test/CodeGen/X86/2011-11-07-LegalizeBuildVector.ll
llvm/trunk/test/CodeGen/X86/2011-11-30-or.ll
llvm/trunk/test/CodeGen/X86/2011-12-06-BitcastVectorGlobal.ll
llvm/trunk/test/CodeGen/X86/2011-12-08-AVXISelBugs.ll
llvm/trunk/test/CodeGen/X86/2011-12-15-vec_shift.ll
llvm/trunk/test/CodeGen/X86/2012-01-18-vbitcast.ll
llvm/trunk/test/CodeGen/X86/2012-02-23-mmx-inlineasm.ll
llvm/trunk/test/CodeGen/X86/2012-07-10-shufnorm.ll
llvm/trunk/test/CodeGen/X86/2012-07-15-BuildVectorPromote.ll
llvm/trunk/test/CodeGen/X86/2012-07-15-broadcastfold.ll
llvm/trunk/test/CodeGen/X86/2012-07-15-tconst_shl.ll
llvm/trunk/test/CodeGen/X86/2012-07-15-vshl.ll
llvm/trunk/test/CodeGen/X86/2012-07-16-LeaUndef.ll
llvm/trunk/test/CodeGen/X86/2012-07-16-fp2ui-i1.ll
llvm/trunk/test/CodeGen/X86/2012-07-17-vtrunc.ll
llvm/trunk/test/CodeGen/X86/2012-07-23-select_cc.ll
llvm/trunk/test/CodeGen/X86/2012-09-13-dagco-fneg.ll
llvm/trunk/test/CodeGen/X86/2012-10-18-crash-dagco.ll
llvm/trunk/test/CodeGen/X86/2012-11-28-merge-store-alias.ll
llvm/trunk/test/CodeGen/X86/2012-12-1-merge-multiple.ll
llvm/trunk/test/CodeGen/X86/2012-12-12-DAGCombineCrash.ll
llvm/trunk/test/CodeGen/X86/2012-12-14-v8fp80-crash.ll
llvm/trunk/test/CodeGen/X86/2013-05-06-ConactVectorCrash.ll
llvm/trunk/test/CodeGen/X86/2014-05-29-factorial.ll
llvm/trunk/test/CodeGen/X86/3dnow-intrinsics.ll
llvm/trunk/test/CodeGen/X86/4char-promote.ll
llvm/trunk/test/CodeGen/X86/AppendingLinkage.ll
llvm/trunk/test/CodeGen/X86/Atomics-64.ll
llvm/trunk/test/CodeGen/X86/DbgValueOtherTargets.test
llvm/trunk/test/CodeGen/X86/SwitchLowering.ll
llvm/trunk/test/CodeGen/X86/TruncAssertZext.ll
llvm/trunk/test/CodeGen/X86/abi-isel.ll
llvm/trunk/test/CodeGen/X86/add.ll
llvm/trunk/test/CodeGen/X86/add_shl_constant.ll
llvm/trunk/test/CodeGen/X86/addr-of-ret-addr.ll
llvm/trunk/test/CodeGen/X86/aligned-comm.ll
llvm/trunk/test/CodeGen/X86/alloca-align-rounding-32.ll
llvm/trunk/test/CodeGen/X86/alloca-align-rounding.ll
llvm/trunk/test/CodeGen/X86/and-su.ll
llvm/trunk/test/CodeGen/X86/andimm8.ll
llvm/trunk/test/CodeGen/X86/asm-global-imm.ll
llvm/trunk/test/CodeGen/X86/asm-modifier-P.ll
llvm/trunk/test/CodeGen/X86/atom-cmpb.ll
llvm/trunk/test/CodeGen/X86/atom-sched.ll
llvm/trunk/test/CodeGen/X86/atomic-dagsched.ll
llvm/trunk/test/CodeGen/X86/atomic-load-store-wide.ll
llvm/trunk/test/CodeGen/X86/atomic-minmax-i6432.ll
llvm/trunk/test/CodeGen/X86/atomic-or.ll
llvm/trunk/test/CodeGen/X86/atomic32.ll
llvm/trunk/test/CodeGen/X86/atomic64.ll
llvm/trunk/test/CodeGen/X86/atomic6432.ll
llvm/trunk/test/CodeGen/X86/atomic8.ll
llvm/trunk/test/CodeGen/X86/atomic_add.ll
llvm/trunk/test/CodeGen/X86/atomic_idempotent.ll
llvm/trunk/test/CodeGen/X86/atomic_op.ll
llvm/trunk/test/CodeGen/X86/avoid-loop-align-2.ll
llvm/trunk/test/CodeGen/X86/avx-minmax.ll
llvm/trunk/test/CodeGen/X86/avx512-bugfix-23634.ll
llvm/trunk/test/CodeGen/X86/avx512-build-vector.ll
llvm/trunk/test/CodeGen/X86/avx512-inc-dec.ll
llvm/trunk/test/CodeGen/X86/avx512-insert-extract.ll
llvm/trunk/test/CodeGen/X86/avx512-insert-extract_i1.ll
llvm/trunk/test/CodeGen/X86/avx512-mask-op.ll
llvm/trunk/test/CodeGen/X86/avx512-mov.ll
llvm/trunk/test/CodeGen/X86/avx512-nontemporal.ll
llvm/trunk/test/CodeGen/X86/avx512bw-mov.ll
llvm/trunk/test/CodeGen/X86/avx512bwvl-mov.ll
llvm/trunk/test/CodeGen/X86/avx512vl-mov.ll
llvm/trunk/test/CodeGen/X86/avx512vl-nontemporal.ll
llvm/trunk/test/CodeGen/X86/barrier.ll
llvm/trunk/test/CodeGen/X86/basic-promote-integers.ll
llvm/trunk/test/CodeGen/X86/bigstructret2.ll
llvm/trunk/test/CodeGen/X86/bit-test-shift.ll
llvm/trunk/test/CodeGen/X86/bitcast-int-to-vector.ll
llvm/trunk/test/CodeGen/X86/bitcast.ll
llvm/trunk/test/CodeGen/X86/bitcast2.ll
llvm/trunk/test/CodeGen/X86/branchfolding-undef.mir
llvm/trunk/test/CodeGen/X86/break-anti-dependencies.ll
llvm/trunk/test/CodeGen/X86/bss_pagealigned.ll
llvm/trunk/test/CodeGen/X86/bswap.ll
llvm/trunk/test/CodeGen/X86/byval.ll
llvm/trunk/test/CodeGen/X86/byval2.ll
llvm/trunk/test/CodeGen/X86/byval3.ll
llvm/trunk/test/CodeGen/X86/byval4.ll
llvm/trunk/test/CodeGen/X86/byval5.ll
llvm/trunk/test/CodeGen/X86/byval6.ll
llvm/trunk/test/CodeGen/X86/byval7.ll
llvm/trunk/test/CodeGen/X86/call-imm.ll
llvm/trunk/test/CodeGen/X86/catchpad-weight.ll
llvm/trunk/test/CodeGen/X86/change-compare-stride-1.ll
llvm/trunk/test/CodeGen/X86/change-compare-stride-trickiness-1.ll
llvm/trunk/test/CodeGen/X86/cmov-fp.ll
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llvm/trunk/test/CodeGen/X86/switch-zextload.ll
llvm/trunk/test/CodeGen/X86/tail-call-legality.ll
llvm/trunk/test/CodeGen/X86/tail-dup-debugloc.ll
llvm/trunk/test/CodeGen/X86/tail-opts.ll
llvm/trunk/test/CodeGen/X86/tailcall-calleesave.ll
llvm/trunk/test/CodeGen/X86/tailcall-returndup-void.ll
llvm/trunk/test/CodeGen/X86/tailcall.ll
llvm/trunk/test/CodeGen/X86/tailcallfp.ll
llvm/trunk/test/CodeGen/X86/tailcallfp2.ll
llvm/trunk/test/CodeGen/X86/tbm-intrinsics-x86_64.ll
llvm/trunk/test/CodeGen/X86/test-nofold.ll
llvm/trunk/test/CodeGen/X86/test-shrink.ll
llvm/trunk/test/CodeGen/X86/testb-je-fusion.ll
llvm/trunk/test/CodeGen/X86/tls-android-negative.ll
llvm/trunk/test/CodeGen/X86/tls-android.ll
llvm/trunk/test/CodeGen/X86/tls-local-dynamic.ll
llvm/trunk/test/CodeGen/X86/tls-models.ll
llvm/trunk/test/CodeGen/X86/tls-pic.ll
llvm/trunk/test/CodeGen/X86/tls-pie.ll
llvm/trunk/test/CodeGen/X86/tls.ll
llvm/trunk/test/CodeGen/X86/token_landingpad.ll
llvm/trunk/test/CodeGen/X86/twoaddr-coalesce-2.ll
llvm/trunk/test/CodeGen/X86/twoaddr-coalesce-3.ll
llvm/trunk/test/CodeGen/X86/twoaddr-coalesce.ll
llvm/trunk/test/CodeGen/X86/twoaddr-pass-sink.ll
llvm/trunk/test/CodeGen/X86/uint_to_fp-2.ll
llvm/trunk/test/CodeGen/X86/umul-with-carry.ll
llvm/trunk/test/CodeGen/X86/update-terminator-debugloc.ll
llvm/trunk/test/CodeGen/X86/update-terminator.mir
llvm/trunk/test/CodeGen/X86/utf8.ll
llvm/trunk/test/CodeGen/X86/v2f32.ll
llvm/trunk/test/CodeGen/X86/v4i32load-crash.ll
llvm/trunk/test/CodeGen/X86/variable-sized-darwin-bzero.ll
llvm/trunk/test/CodeGen/X86/vec_add.ll
llvm/trunk/test/CodeGen/X86/vec_anyext.ll
llvm/trunk/test/CodeGen/X86/vec_call.ll
llvm/trunk/test/CodeGen/X86/vec_compare.ll
llvm/trunk/test/CodeGen/X86/vec_ins_extract.ll
llvm/trunk/test/CodeGen/X86/vec_split.ll
llvm/trunk/test/CodeGen/X86/vec_zero-2.ll
llvm/trunk/test/CodeGen/X86/vec_zero.ll
llvm/trunk/test/CodeGen/X86/vector-intrinsics.ll
llvm/trunk/test/CodeGen/X86/vector-variable-idx.ll
llvm/trunk/test/CodeGen/X86/vector-variable-idx2.ll
llvm/trunk/test/CodeGen/X86/vector.ll
llvm/trunk/test/CodeGen/X86/vfcmp.ll
llvm/trunk/test/CodeGen/X86/volatile.ll
llvm/trunk/test/CodeGen/X86/vortex-bug.ll
llvm/trunk/test/CodeGen/X86/vshift_split.ll
llvm/trunk/test/CodeGen/X86/vshift_split2.ll
llvm/trunk/test/CodeGen/X86/weak.ll
llvm/trunk/test/CodeGen/X86/wide-fma-contraction.ll
llvm/trunk/test/CodeGen/X86/wide-integer-fold.ll
llvm/trunk/test/CodeGen/X86/widen_load-1.ll
llvm/trunk/test/CodeGen/X86/x86-64-disp.ll
llvm/trunk/test/CodeGen/X86/x86-64-double-shifts-Oz-Os-O2.ll
llvm/trunk/test/CodeGen/X86/x86-64-double-shifts-var.ll
llvm/trunk/test/CodeGen/X86/x86-64-ret0.ll
llvm/trunk/test/CodeGen/X86/x86-fold-pshufb.ll
llvm/trunk/test/CodeGen/X86/x87.ll
llvm/trunk/test/CodeGen/X86/xmm-r64.ll
llvm/trunk/test/CodeGen/X86/xtest.ll
llvm/trunk/test/CodeGen/X86/zero-remat.ll
llvm/trunk/test/CodeGen/X86/zext-inreg-0.ll
llvm/trunk/test/CodeGen/X86/zext-inreg-1.ll
llvm/trunk/test/CodeGen/X86/zlib-longest-match.ll
Modified: llvm/trunk/test/CodeGen/X86/2003-08-03-CallArgLiveRanges.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2003-08-03-CallArgLiveRanges.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2003-08-03-CallArgLiveRanges.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2003-08-03-CallArgLiveRanges.ll Tue Aug 1 17:28:10 2017
@@ -4,7 +4,7 @@
; it makes a ton of annoying overlapping live ranges. This code should not
; cause spills!
;
-; RUN: llc < %s -march=x86 -stats 2>&1 | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- -stats 2>&1 | FileCheck %s
; CHECK-NOT: spilled
Modified: llvm/trunk/test/CodeGen/X86/2003-08-23-DeadBlockTest.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2003-08-23-DeadBlockTest.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2003-08-23-DeadBlockTest.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2003-08-23-DeadBlockTest.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86
+; RUN: llc < %s -mtriple=i686--
define i32 @test() {
entry:
Modified: llvm/trunk/test/CodeGen/X86/2003-11-03-GlobalBool.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2003-11-03-GlobalBool.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2003-11-03-GlobalBool.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2003-11-03-GlobalBool.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- | FileCheck %s
@X = global i1 true
; CHECK-NOT: .byte true
Modified: llvm/trunk/test/CodeGen/X86/2004-02-13-FrameReturnAddress.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2004-02-13-FrameReturnAddress.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2004-02-13-FrameReturnAddress.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2004-02-13-FrameReturnAddress.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- | FileCheck %s
declare i8* @llvm.returnaddress(i32)
Modified: llvm/trunk/test/CodeGen/X86/2004-02-14-InefficientStackPointer.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2004-02-14-InefficientStackPointer.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2004-02-14-InefficientStackPointer.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2004-02-14-InefficientStackPointer.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | FileCheck %s
+; RUN: llc < %s | FileCheck %s
target triple = "i686-unknown-unknown"
Modified: llvm/trunk/test/CodeGen/X86/2004-02-22-Casts.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2004-02-22-Casts.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2004-02-22-Casts.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2004-02-22-Casts.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86
+; RUN: llc < %s -mtriple=i686--
define i1 @test1(double %X) {
%V = fcmp one double %X, 0.000000e+00 ; <i1> [#uses=1]
ret i1 %V
Modified: llvm/trunk/test/CodeGen/X86/2004-03-30-Select-Max.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2004-03-30-Select-Max.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2004-03-30-Select-Max.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2004-03-30-Select-Max.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mcpu=yonah | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- -mcpu=yonah | FileCheck %s
; CHECK-NOT: {{j[lgbe]}}
define i32 @max(i32 %A, i32 %B) nounwind {
Modified: llvm/trunk/test/CodeGen/X86/2004-04-13-FPCMOV-Crash.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2004-04-13-FPCMOV-Crash.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2004-04-13-FPCMOV-Crash.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2004-04-13-FPCMOV-Crash.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86
+; RUN: llc < %s -mtriple=i686--
define double @test(double %d) {
%X = select i1 false, double %d, double %d ; <double> [#uses=1]
Modified: llvm/trunk/test/CodeGen/X86/2004-06-10-StackifierCrash.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2004-06-10-StackifierCrash.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2004-06-10-StackifierCrash.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2004-06-10-StackifierCrash.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86
+; RUN: llc < %s -mtriple=i686--
define i1 @T(double %X) {
%V = fcmp oeq double %X, %X ; <i1> [#uses=1]
Modified: llvm/trunk/test/CodeGen/X86/2004-10-08-SelectSetCCFold.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2004-10-08-SelectSetCCFold.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2004-10-08-SelectSetCCFold.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2004-10-08-SelectSetCCFold.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86
+; RUN: llc < %s -mtriple=i686--
define i1 @test(i1 %C, i1 %D, i32 %X, i32 %Y) {
%E = icmp slt i32 %X, %Y ; <i1> [#uses=1]
Modified: llvm/trunk/test/CodeGen/X86/2005-01-17-CycleInDAG.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2005-01-17-CycleInDAG.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2005-01-17-CycleInDAG.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2005-01-17-CycleInDAG.ll Tue Aug 1 17:28:10 2017
@@ -3,7 +3,7 @@
; is invalid code (there is no correct way to order the instruction). Check
; that we do not fold the load into the sub.
-; RUN: llc < %s -march=x86 | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- | FileCheck %s
@GLOBAL = external global i32
Modified: llvm/trunk/test/CodeGen/X86/2005-02-14-IllegalAssembler.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2005-02-14-IllegalAssembler.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2005-02-14-IllegalAssembler.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2005-02-14-IllegalAssembler.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- | FileCheck %s
@A = external global i32 ; <i32*> [#uses=1]
@Y = global i32* getelementptr (i32, i32* @A, i32 -1) ; <i32**> [#uses=0]
Modified: llvm/trunk/test/CodeGen/X86/2005-05-08-FPStackifierPHI.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2005-05-08-FPStackifierPHI.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2005-05-08-FPStackifierPHI.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2005-05-08-FPStackifierPHI.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mcpu=generic
+; RUN: llc < %s -mtriple=i686-- -mcpu=generic
; Make sure LLC doesn't crash in the stackifier due to FP PHI nodes.
define void @radfg_() {
Modified: llvm/trunk/test/CodeGen/X86/2006-03-02-InstrSchedBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2006-03-02-InstrSchedBug.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2006-03-02-InstrSchedBug.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2006-03-02-InstrSchedBug.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
; REQUIRES: asserts
-; RUN: llc < %s -march=x86 -stats 2>&1 | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- -stats 2>&1 | FileCheck %s
; CHECK: 7 asm-printer
define i32 @g(i32 %a, i32 %b) nounwind {
Modified: llvm/trunk/test/CodeGen/X86/2006-04-04-CrossBlockCrash.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2006-04-04-CrossBlockCrash.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2006-04-04-CrossBlockCrash.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2006-04-04-CrossBlockCrash.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mcpu=yonah
+; RUN: llc < %s -mcpu=yonah
; END.
target datalayout = "e-p:32:32"
Modified: llvm/trunk/test/CodeGen/X86/2006-04-27-ISelFoldingBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2006-04-27-ISelFoldingBug.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2006-04-27-ISelFoldingBug.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2006-04-27-ISelFoldingBug.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mtriple=i686-apple-darwin8 -relocation-model=static > %t
+; RUN: llc < %s -mtriple=i686-apple-darwin8 -relocation-model=static > %t
; RUN: grep "movl _last" %t | count 1
; RUN: grep "cmpl.*_last" %t | count 1
Modified: llvm/trunk/test/CodeGen/X86/2006-05-01-SchedCausingSpills.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2006-05-01-SchedCausingSpills.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2006-05-01-SchedCausingSpills.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2006-05-01-SchedCausingSpills.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
; REQUIRES: asserts
-; RUN: llc < %s -march=x86 -mcpu=yonah -stats 2>&1 | \
+; RUN: llc < %s -mtriple=i686-- -mcpu=yonah -stats 2>&1 | \
; RUN: not grep "Number of register spills"
; END.
Modified: llvm/trunk/test/CodeGen/X86/2006-05-02-InstrSched2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2006-05-02-InstrSched2.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2006-05-02-InstrSched2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2006-05-02-InstrSched2.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
; REQUIRES: asserts
-; RUN: llc < %s -march=x86 -stats 2>&1 | \
+; RUN: llc < %s -mtriple=i686-- -stats 2>&1 | \
; RUN: grep asm-printer | grep 13
define void @_ZN9__gnu_cxx9hashtableISt4pairIKPKciES3_NS_4hashIS3_EESt10_Select1stIS5_E5eqstrSaIiEE14find_or_insertERKS5__cond_true456.i(i8* %tmp435.i, i32* %tmp449.i.out) nounwind {
Modified: llvm/trunk/test/CodeGen/X86/2006-05-08-CoalesceSubRegClass.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2006-05-08-CoalesceSubRegClass.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2006-05-08-CoalesceSubRegClass.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2006-05-08-CoalesceSubRegClass.ll Tue Aug 1 17:28:10 2017
@@ -1,7 +1,7 @@
; Coalescing from R32 to a subset R32_. Once another register coalescer bug is
; fixed, the movb should go away as well.
-; RUN: llc < %s -march=x86 -relocation-model=static | \
+; RUN: llc < %s -mtriple=i686-- -relocation-model=static | \
; RUN: grep movl
@B = external global i32 ; <i32*> [#uses=2]
Modified: llvm/trunk/test/CodeGen/X86/2006-05-08-InstrSched.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2006-05-08-InstrSched.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2006-05-08-InstrSched.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2006-05-08-InstrSched.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -relocation-model=static | not grep "subl.*%esp"
+; RUN: llc < %s -mtriple=i686-- -relocation-model=static | not grep "subl.*%esp"
@A = external global i16* ; <i16**> [#uses=1]
@B = external global i32 ; <i32*> [#uses=1]
Modified: llvm/trunk/test/CodeGen/X86/2006-05-11-InstrSched.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2006-05-11-InstrSched.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2006-05-11-InstrSched.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2006-05-11-InstrSched.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
; REQUIRES: asserts
-; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu -mcpu=penryn -mattr=+sse2 -stats 2>&1 | \
+; RUN: llc < %s -mtriple=i386-linux-gnu -mcpu=penryn -mattr=+sse2 -stats 2>&1 | \
; RUN: grep "asm-printer" | grep 35
target datalayout = "e-p:32:32"
Modified: llvm/trunk/test/CodeGen/X86/2006-05-17-VectorArg.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2006-05-17-VectorArg.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2006-05-17-VectorArg.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2006-05-17-VectorArg.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mattr=+sse2
+; RUN: llc < %s -mtriple=i686-- -mattr=+sse2
define <4 x float> @opRSQ(<4 x float> %a) nounwind {
entry:
Modified: llvm/trunk/test/CodeGen/X86/2006-05-22-FPSetEQ.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2006-05-22-FPSetEQ.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2006-05-22-FPSetEQ.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2006-05-22-FPSetEQ.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=x86 -mattr=-sse | FileCheck %s -check-prefix=WITHNANS
-; RUN: llc < %s -march=x86 -mattr=-sse -enable-unsafe-fp-math -enable-no-nans-fp-math | FileCheck %s -check-prefix=NONANS
+; RUN: llc < %s -mtriple=i686-- -mattr=-sse | FileCheck %s -check-prefix=WITHNANS
+; RUN: llc < %s -mtriple=i686-- -mattr=-sse -enable-unsafe-fp-math -enable-no-nans-fp-math | FileCheck %s -check-prefix=NONANS
; WITHNANS-LABEL: test:
; WITHNANS: setnp
Modified: llvm/trunk/test/CodeGen/X86/2006-05-25-CycleInDAG.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2006-05-25-CycleInDAG.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2006-05-25-CycleInDAG.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2006-05-25-CycleInDAG.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86
+; RUN: llc < %s -mtriple=i686--
define i32 @test() {
br i1 false, label %cond_next33, label %cond_true12
Modified: llvm/trunk/test/CodeGen/X86/2006-07-10-InlineAsmAConstraint.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2006-07-10-InlineAsmAConstraint.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2006-07-10-InlineAsmAConstraint.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2006-07-10-InlineAsmAConstraint.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86
+; RUN: llc < %s -mtriple=i686--
; PR825
define i64 @test() {
Modified: llvm/trunk/test/CodeGen/X86/2006-07-12-InlineAsmQConstraint.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2006-07-12-InlineAsmQConstraint.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2006-07-12-InlineAsmQConstraint.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2006-07-12-InlineAsmQConstraint.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86
+; RUN: llc < %s
; PR828
target datalayout = "e-p:32:32"
Modified: llvm/trunk/test/CodeGen/X86/2006-07-20-InlineAsm.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2006-07-20-InlineAsm.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2006-07-20-InlineAsm.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2006-07-20-InlineAsm.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -no-integrated-as
+; RUN: llc < %s -mtriple=i686-- -no-integrated-as
; PR833
@G = weak global i32 0 ; <i32*> [#uses=3]
Modified: llvm/trunk/test/CodeGen/X86/2006-07-28-AsmPrint-Long-As-Pointer.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2006-07-28-AsmPrint-Long-As-Pointer.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2006-07-28-AsmPrint-Long-As-Pointer.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2006-07-28-AsmPrint-Long-As-Pointer.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | grep -- 4294967240
+; RUN: llc < %s -mtriple=i686-- | grep -- 4294967240
; PR853
@X = global i32* inttoptr (i64 -56 to i32*) ; <i32**> [#uses=0]
Modified: llvm/trunk/test/CodeGen/X86/2006-07-31-SingleRegClass.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2006-07-31-SingleRegClass.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2006-07-31-SingleRegClass.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2006-07-31-SingleRegClass.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
; PR850
-; RUN: llc < %s -march=x86 -x86-asm-syntax=att -no-integrated-as | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- -x86-asm-syntax=att -no-integrated-as | FileCheck %s
; CHECK: {{movl 4[(]%eax[)],%ebp}}
; CHECK: {{movl 0[(]%eax[)], %ebx}}
Modified: llvm/trunk/test/CodeGen/X86/2006-08-07-CycleInDAG.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2006-08-07-CycleInDAG.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2006-08-07-CycleInDAG.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2006-08-07-CycleInDAG.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mattr=+sse2
+; RUN: llc < %s -mtriple=i686-- -mattr=+sse2
%struct.foo = type opaque
define fastcc i32 @test(%struct.foo* %v, %struct.foo* %vi) {
Modified: llvm/trunk/test/CodeGen/X86/2006-08-16-CycleInDAG.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2006-08-16-CycleInDAG.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2006-08-16-CycleInDAG.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2006-08-16-CycleInDAG.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86
+; RUN: llc < %s -mtriple=i686--
%struct.expr = type { %struct.rtx_def*, i32, %struct.expr*, %struct.occr*, %struct.occr*, %struct.rtx_def* }
%struct.hash_table = type { %struct.expr**, i32, i32, i32 }
%struct.occr = type { %struct.occr*, %struct.rtx_def*, i8, i8 }
Modified: llvm/trunk/test/CodeGen/X86/2006-08-21-ExtraMovInst.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2006-08-21-ExtraMovInst.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2006-08-21-ExtraMovInst.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2006-08-21-ExtraMovInst.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mcpu=i386 | \
+; RUN: llc < %s -mtriple=i686-- -mcpu=i386 | \
; RUN: not grep "movl %eax, %edx"
define i32 @foo(i32 %t, i32 %C) {
Modified: llvm/trunk/test/CodeGen/X86/2006-09-01-CycleInDAG.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2006-09-01-CycleInDAG.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2006-09-01-CycleInDAG.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2006-09-01-CycleInDAG.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86
+; RUN: llc < %s
target datalayout = "e-p:32:32"
target triple = "i686-apple-darwin8"
%struct.CUMULATIVE_ARGS = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
Modified: llvm/trunk/test/CodeGen/X86/2006-10-09-CycleInDAG.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2006-10-09-CycleInDAG.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2006-10-09-CycleInDAG.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2006-10-09-CycleInDAG.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86
+; RUN: llc < %s -mtriple=i686--
define void @_ZN13QFSFileEngine4readEPcx() {
%tmp201 = load i32, i32* null ; <i32> [#uses=1]
Modified: llvm/trunk/test/CodeGen/X86/2006-10-10-FindModifiedNodeSlotBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2006-10-10-FindModifiedNodeSlotBug.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2006-10-10-FindModifiedNodeSlotBug.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2006-10-10-FindModifiedNodeSlotBug.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | grep shrl
+; RUN: llc < %s -mtriple=i686-- | grep shrl
; Bug in FindModifiedNodeSlot cause tmp14 load to become a zextload and shr 31
; is then optimized away.
@tree_code_type = external global [0 x i32] ; <[0 x i32]*> [#uses=1]
Modified: llvm/trunk/test/CodeGen/X86/2006-10-12-CycleInDAG.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2006-10-12-CycleInDAG.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2006-10-12-CycleInDAG.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2006-10-12-CycleInDAG.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86
+; RUN: llc < %s -mtriple=i686--
%struct.function = type opaque
%struct.lang_decl = type opaque
%struct.location_t = type { i8*, i32 }
Modified: llvm/trunk/test/CodeGen/X86/2006-10-13-CycleInDAG.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2006-10-13-CycleInDAG.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2006-10-13-CycleInDAG.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2006-10-13-CycleInDAG.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86
+; RUN: llc < %s -mtriple=i686--
@str = external global [18 x i8] ; <[18 x i8]*> [#uses=1]
define void @test() {
Modified: llvm/trunk/test/CodeGen/X86/2006-10-19-SwitchUnnecessaryBranching.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2006-10-19-SwitchUnnecessaryBranching.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2006-10-19-SwitchUnnecessaryBranching.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2006-10-19-SwitchUnnecessaryBranching.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -asm-verbose | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- -asm-verbose | FileCheck %s
@str = internal constant [14 x i8] c"Hello world!\0A\00" ; <[14 x i8]*> [#uses=1]
@str.upgrd.1 = internal constant [13 x i8] c"Blah world!\0A\00" ; <[13 x i8]*> [#uses=1]
Modified: llvm/trunk/test/CodeGen/X86/2006-11-12-CSRetCC.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2006-11-12-CSRetCC.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2006-11-12-CSRetCC.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2006-11-12-CSRetCC.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | FileCheck %s
+; RUN: llc < %s | FileCheck %s
target triple = "i686-pc-linux-gnu"
@str = internal constant [9 x i8] c"%f+%f*i\0A\00" ; <[9 x i8]*> [#uses=1]
Modified: llvm/trunk/test/CodeGen/X86/2006-11-17-IllegalMove.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2006-11-17-IllegalMove.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2006-11-17-IllegalMove.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2006-11-17-IllegalMove.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 > %t
+; RUN: llc < %s -mtriple=x86_64-- > %t
; RUN: grep movb %t | count 1
; RUN: grep "movzb[wl]" %t
Modified: llvm/trunk/test/CodeGen/X86/2006-11-27-SelectLegalize.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2006-11-27-SelectLegalize.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2006-11-27-SelectLegalize.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2006-11-27-SelectLegalize.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- | FileCheck %s
; PR1016
; CHECK: {{test.*1}}
Modified: llvm/trunk/test/CodeGen/X86/2006-12-16-InlineAsmCrash.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2006-12-16-InlineAsmCrash.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2006-12-16-InlineAsmCrash.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2006-12-16-InlineAsmCrash.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86
+; RUN: llc < %s
; PR1049
target datalayout = "e-p:32:32"
target triple = "i686-pc-linux-gnu"
Modified: llvm/trunk/test/CodeGen/X86/2006-12-19-IntelSyntax.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2006-12-19-IntelSyntax.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2006-12-19-IntelSyntax.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2006-12-19-IntelSyntax.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -x86-asm-syntax=intel
+; RUN: llc < %s -x86-asm-syntax=intel
; PR1061
target datalayout = "e-p:32:32"
target triple = "i686-pc-linux-gnu"
Modified: llvm/trunk/test/CodeGen/X86/2007-01-13-StackPtrIndex.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2007-01-13-StackPtrIndex.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2007-01-13-StackPtrIndex.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2007-01-13-StackPtrIndex.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 > %t
+; RUN: llc < %s -mtriple=x86_64-- > %t
; RUN: not grep ",%rsp)" %t
; PR1103
Modified: llvm/trunk/test/CodeGen/X86/2007-01-29-InlineAsm-ir.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2007-01-29-InlineAsm-ir.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2007-01-29-InlineAsm-ir.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2007-01-29-InlineAsm-ir.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86
+; RUN: llc < %s -mtriple=i686--
; Test 'ri' constraint.
define void @run_init_process() {
Modified: llvm/trunk/test/CodeGen/X86/2007-02-04-OrAddrMode.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2007-02-04-OrAddrMode.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2007-02-04-OrAddrMode.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2007-02-04-OrAddrMode.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- | FileCheck %s
;; This example can't fold the or into an LEA.
define i32 @test(float ** %tmp2, i32 %tmp12) nounwind {
Modified: llvm/trunk/test/CodeGen/X86/2007-02-19-LiveIntervalAssert.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2007-02-19-LiveIntervalAssert.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2007-02-19-LiveIntervalAssert.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2007-02-19-LiveIntervalAssert.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mtriple=i686-pc-linux-gnu -relocation-model=pic
+; RUN: llc < %s -mtriple=i686-pc-linux-gnu -relocation-model=pic
; PR1027
%struct._IO_FILE = type { i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, %struct._IO_marker*, %struct._IO_FILE*, i32, i32, i32, i16, i8, [1 x i8], i8*, i64, i8*, i8*, i8*, i8*, i32, i32, [40 x i8] }
Modified: llvm/trunk/test/CodeGen/X86/2007-02-23-DAGCombine-Miscompile.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2007-02-23-DAGCombine-Miscompile.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2007-02-23-DAGCombine-Miscompile.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2007-02-23-DAGCombine-Miscompile.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
; PR1219
-; RUN: llc < %s -march=x86 | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- | FileCheck %s
define i32 @test(i1 %X) {
; CHECK-LABEL: test:
Modified: llvm/trunk/test/CodeGen/X86/2007-02-25-FastCCStack.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2007-02-25-FastCCStack.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2007-02-25-FastCCStack.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2007-02-25-FastCCStack.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mcpu=pentium3
+; RUN: llc < %s -mtriple=i686-- -mcpu=pentium3
define internal fastcc double @ggc_rlimit_bound(double %limit) {
ret double %limit
Modified: llvm/trunk/test/CodeGen/X86/2007-03-15-GEP-Idx-Sink.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2007-03-15-GEP-Idx-Sink.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2007-03-15-GEP-Idx-Sink.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2007-03-15-GEP-Idx-Sink.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mtriple=i686-darwin | FileCheck %s
+; RUN: llc < %s -mtriple=i686-darwin | FileCheck %s
define void @foo(i8** %buf, i32 %size, i32 %col, i8* %p) nounwind {
entry:
Modified: llvm/trunk/test/CodeGen/X86/2007-03-16-InlineAsm.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2007-03-16-InlineAsm.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2007-03-16-InlineAsm.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2007-03-16-InlineAsm.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86
+; RUN: llc < %s -mtriple=i686--
; ModuleID = 'a.bc'
Modified: llvm/trunk/test/CodeGen/X86/2007-03-18-LiveIntervalAssert.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2007-03-18-LiveIntervalAssert.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2007-03-18-LiveIntervalAssert.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2007-03-18-LiveIntervalAssert.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86
+; RUN: llc < %s -mtriple=i686--
; PR1259
define void @test() {
Modified: llvm/trunk/test/CodeGen/X86/2007-03-24-InlineAsmMultiRegConstraint.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2007-03-24-InlineAsmMultiRegConstraint.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2007-03-24-InlineAsmMultiRegConstraint.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2007-03-24-InlineAsmMultiRegConstraint.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86
+; RUN: llc < %s -mtriple=i686--
define i32 @test(i16 %tmp40414244) {
%tmp48 = call i32 asm sideeffect "inl ${1:w}, $0", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"( i16 %tmp40414244 )
Modified: llvm/trunk/test/CodeGen/X86/2007-03-24-InlineAsmPModifier.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2007-03-24-InlineAsmPModifier.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2007-03-24-InlineAsmPModifier.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2007-03-24-InlineAsmPModifier.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -no-integrated-as | grep "mov %gs:72, %eax"
+; RUN: llc < %s -no-integrated-as | grep "mov %gs:72, %eax"
target datalayout = "e-p:32:32"
target triple = "i686-apple-darwin9"
Modified: llvm/trunk/test/CodeGen/X86/2007-03-24-InlineAsmVectorOp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2007-03-24-InlineAsmVectorOp.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2007-03-24-InlineAsmVectorOp.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2007-03-24-InlineAsmVectorOp.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mcpu=yonah -march=x86 -no-integrated-as | FileCheck %s
+; RUN: llc < %s -mcpu=yonah -no-integrated-as | FileCheck %s
target datalayout = "e-p:32:32"
target triple = "i686-apple-darwin9"
Modified: llvm/trunk/test/CodeGen/X86/2007-03-24-InlineAsmXConstraint.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2007-03-24-InlineAsmXConstraint.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2007-03-24-InlineAsmXConstraint.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2007-03-24-InlineAsmXConstraint.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | FileCheck %s
+; RUN: llc < %s | FileCheck %s
target datalayout = "e-p:32:32"
target triple = "i686-apple-darwin9"
Modified: llvm/trunk/test/CodeGen/X86/2007-03-26-CoalescerBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2007-03-26-CoalescerBug.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2007-03-26-CoalescerBug.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2007-03-26-CoalescerBug.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86
+; RUN: llc < %s -mtriple=i686--
@data = external global [339 x i64]
Modified: llvm/trunk/test/CodeGen/X86/2007-04-11-InlineAsmVectorResult.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2007-04-11-InlineAsmVectorResult.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2007-04-11-InlineAsmVectorResult.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2007-04-11-InlineAsmVectorResult.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mcpu=yonah
+; RUN: llc < %s -mcpu=yonah
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
target triple = "i686-apple-darwin8"
Modified: llvm/trunk/test/CodeGen/X86/2007-04-24-Huge-Stack.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2007-04-24-Huge-Stack.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2007-04-24-Huge-Stack.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2007-04-24-Huge-Stack.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
; PR1348
; CHECK-NOT: 4294967112
Modified: llvm/trunk/test/CodeGen/X86/2007-05-05-VecCastExpand.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2007-05-05-VecCastExpand.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2007-05-05-VecCastExpand.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2007-05-05-VecCastExpand.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mcpu=i386 -mattr=+sse
+; RUN: llc < %s -mtriple=i686-- -mcpu=i386 -mattr=+sse
; PR1371
@str = external global [18 x i8] ; <[18 x i8]*> [#uses=1]
Modified: llvm/trunk/test/CodeGen/X86/2007-05-14-LiveIntervalAssert.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2007-05-14-LiveIntervalAssert.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2007-05-14-LiveIntervalAssert.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2007-05-14-LiveIntervalAssert.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64
+; RUN: llc < %s -mtriple=x86_64--
%struct.XDesc = type <{ i32, %struct.OpaqueXDataStorageType** }>
%struct.OpaqueXDataStorageType = type opaque
Modified: llvm/trunk/test/CodeGen/X86/2007-05-17-ShuffleISelBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2007-05-17-ShuffleISelBug.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2007-05-17-ShuffleISelBug.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2007-05-17-ShuffleISelBug.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 | FileCheck %s
; CHECK-NOT: punpckhwd
Modified: llvm/trunk/test/CodeGen/X86/2007-06-28-X86-64-isel.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2007-06-28-X86-64-isel.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2007-06-28-X86-64-isel.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2007-06-28-X86-64-isel.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -mattr=+sse2
+; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2
define void @test() {
%tmp1 = call <8 x i16> @llvm.x86.sse2.pmins.w( <8 x i16> zeroinitializer, <8 x i16> bitcast (<4 x i32> < i32 7, i32 7, i32 7, i32 7 > to <8 x i16>) )
Modified: llvm/trunk/test/CodeGen/X86/2007-06-29-DAGCombinerBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2007-06-29-DAGCombinerBug.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2007-06-29-DAGCombinerBug.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2007-06-29-DAGCombinerBug.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mattr=+sse2
+; RUN: llc < %s -mtriple=i686-- -mattr=+sse2
define void @test() {
entry:
Modified: llvm/trunk/test/CodeGen/X86/2007-06-29-VecFPConstantCSEBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2007-06-29-VecFPConstantCSEBug.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2007-06-29-VecFPConstantCSEBug.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2007-06-29-VecFPConstantCSEBug.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mattr=+sse2
+; RUN: llc < %s -mtriple=i686-- -mattr=+sse2
define void @test(<4 x float>* %arg) {
%tmp89 = getelementptr <4 x float>, <4 x float>* %arg, i64 3
Modified: llvm/trunk/test/CodeGen/X86/2007-08-01-LiveVariablesBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2007-08-01-LiveVariablesBug.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2007-08-01-LiveVariablesBug.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2007-08-01-LiveVariablesBug.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- | FileCheck %s
; CHECK-NOT: movl
Modified: llvm/trunk/test/CodeGen/X86/2007-08-10-SignExtSubreg.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2007-08-10-SignExtSubreg.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2007-08-10-SignExtSubreg.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2007-08-10-SignExtSubreg.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | grep "movsbl"
+; RUN: llc < %s -mtriple=i686-- | grep "movsbl"
@X = global i32 0 ; <i32*> [#uses=1]
Modified: llvm/trunk/test/CodeGen/X86/2007-10-04-AvoidEFLAGSCopy.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2007-10-04-AvoidEFLAGSCopy.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2007-10-04-AvoidEFLAGSCopy.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2007-10-04-AvoidEFLAGSCopy.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | not grep pushf
+; RUN: llc < %s -mtriple=i686-- | not grep pushf
%struct.gl_texture_image = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8*, i8* }
%struct.gl_texture_object = type { i32, i32, i32, float, [4 x i32], i32, i32, i32, i32, i32, float, [11 x %struct.gl_texture_image*], [1024 x i8], i32, i32, i32, i8, i8*, i8, void (%struct.gl_texture_object*, i32, float*, float*, float*, float*, i8*, i8*, i8*, i8*)*, %struct.gl_texture_object* }
Modified: llvm/trunk/test/CodeGen/X86/2007-10-12-CoalesceExtSubReg.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2007-10-12-CoalesceExtSubReg.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2007-10-12-CoalesceExtSubReg.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2007-10-12-CoalesceExtSubReg.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | not grep movb
+; RUN: llc < %s -mtriple=i686-- | not grep movb
define signext i16 @f(i32* %bp, i32* %ss) {
entry:
Modified: llvm/trunk/test/CodeGen/X86/2007-10-12-SpillerUnfold1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2007-10-12-SpillerUnfold1.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2007-10-12-SpillerUnfold1.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2007-10-12-SpillerUnfold1.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mattr=+sse2 | grep addss | not grep esp
+; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 | grep addss | not grep esp
define fastcc void @fht(float* %fz, i16 signext %n) {
entry:
Modified: llvm/trunk/test/CodeGen/X86/2007-10-12-SpillerUnfold2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2007-10-12-SpillerUnfold2.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2007-10-12-SpillerUnfold2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2007-10-12-SpillerUnfold2.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mcpu=corei7 | grep sarl | not grep esp
+; RUN: llc < %s -mtriple=i686-- -mcpu=corei7 | grep sarl | not grep esp
define signext i16 @t(i16* %qmatrix, i16* %dct, i16* %acBaseTable, i16* %acExtTable, i16 signext %acBaseRes, i16 signext %acMaskRes, i16 signext %acExtRes, i32* %bitptr, i32* %source, i32 %markerPrefix, i8** %byteptr, i32 %scale, i32 %round, i32 %bits) {
entry:
Modified: llvm/trunk/test/CodeGen/X86/2007-10-19-SpillerUnfold.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2007-10-19-SpillerUnfold.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2007-10-19-SpillerUnfold.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2007-10-19-SpillerUnfold.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- -x86-asm-syntax=intel | FileCheck %s
; CHECK: inc
; CHECK-NOT: PTR
Modified: llvm/trunk/test/CodeGen/X86/2007-10-29-ExtendSetCC.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2007-10-29-ExtendSetCC.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2007-10-29-ExtendSetCC.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2007-10-29-ExtendSetCC.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | grep mov | count 1
+; RUN: llc < %s -mtriple=i686-- | grep mov | count 1
define signext i16 @t() {
entry:
Modified: llvm/trunk/test/CodeGen/X86/2007-10-30-LSRCrash.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2007-10-30-LSRCrash.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2007-10-30-LSRCrash.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2007-10-30-LSRCrash.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86
+; RUN: llc < %s -mtriple=i686--
define i32 @unique(i8* %full, i32 %p, i32 %len, i32 %mode, i32 %verbos, i32 %flags) {
entry:
Modified: llvm/trunk/test/CodeGen/X86/2007-10-31-extractelement-i64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2007-10-31-extractelement-i64.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2007-10-31-extractelement-i64.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2007-10-31-extractelement-i64.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mattr=sse2
+; RUN: llc < %s -mattr=sse2
; ModuleID = 'yyy.c'
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i686-apple-darwin8"
Modified: llvm/trunk/test/CodeGen/X86/2007-11-01-ISelCrash.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2007-11-01-ISelCrash.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2007-11-01-ISelCrash.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2007-11-01-ISelCrash.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86
+; RUN: llc < %s -mtriple=i686--
%"struct.K::JL" = type <{ i8 }>
%struct.jv = type { i64 }
Modified: llvm/trunk/test/CodeGen/X86/2007-11-06-InstrSched.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2007-11-06-InstrSched.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2007-11-06-InstrSched.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2007-11-06-InstrSched.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mcpu=generic -mattr=+sse2 | not grep lea
+; RUN: llc < %s -mtriple=i686-- -mcpu=generic -mattr=+sse2 | not grep lea
define float @foo(i32* %x, float* %y, i32 %c) nounwind {
entry:
Modified: llvm/trunk/test/CodeGen/X86/2007-11-07-MulBy4.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2007-11-07-MulBy4.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2007-11-07-MulBy4.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2007-11-07-MulBy4.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | not grep imul
+; RUN: llc < %s -mtriple=i686-- | not grep imul
%struct.eebb = type { %struct.eebb*, i16* }
%struct.hf = type { %struct.hf*, i16*, i8*, i32, i32, %struct.eebb*, i32, i32, i8*, i8*, i8*, i8*, i16*, i8*, i16*, %struct.ri, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [30 x i32], %struct.eebb, i32, i8* }
Modified: llvm/trunk/test/CodeGen/X86/2007-11-30-LoadFolding-Bug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2007-11-30-LoadFolding-Bug.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2007-11-30-LoadFolding-Bug.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2007-11-30-LoadFolding-Bug.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 | FileCheck %s
; Increment in loop bb.i28.i adjusted to 2, to prevent loop reversal from
; kicking in.
Modified: llvm/trunk/test/CodeGen/X86/2007-12-18-LoadCSEBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2007-12-18-LoadCSEBug.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2007-12-18-LoadCSEBug.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2007-12-18-LoadCSEBug.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mcpu=generic | grep "(%esp)" | count 2
+; RUN: llc < %s -mtriple=i686-- -mcpu=generic | grep "(%esp)" | count 2
; PR1872
%struct.c34007g__designated___XUB = type { i32, i32, i32, i32 }
Modified: llvm/trunk/test/CodeGen/X86/2008-01-08-SchedulerCrash.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-01-08-SchedulerCrash.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-01-08-SchedulerCrash.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-01-08-SchedulerCrash.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mattr=+cmov -x86-cmov-converter=false | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- -mattr=+cmov -x86-cmov-converter=false | FileCheck %s
;
; Test scheduling a multi-use compare. We should neither spill flags
; nor clone the compare.
Modified: llvm/trunk/test/CodeGen/X86/2008-01-16-FPStackifierAssert.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-01-16-FPStackifierAssert.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-01-16-FPStackifierAssert.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-01-16-FPStackifierAssert.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mattr=+sse2 -regalloc=fast -optimize-regalloc=0
+; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 -regalloc=fast -optimize-regalloc=0
define void @SolveCubic(double %a, double %b, double %c, double %d, i32* %solutions, double* %x) {
entry:
Modified: llvm/trunk/test/CodeGen/X86/2008-01-16-InvalidDAGCombineXform.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-01-16-InvalidDAGCombineXform.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-01-16-InvalidDAGCombineXform.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-01-16-InvalidDAGCombineXform.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | not grep IMPLICIT_DEF
+; RUN: llc < %s -mtriple=i686-- | not grep IMPLICIT_DEF
%struct.node_t = type { double*, %struct.node_t*, %struct.node_t**, double**, double*, i32, i32 }
Modified: llvm/trunk/test/CodeGen/X86/2008-02-05-ISelCrash.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-02-05-ISelCrash.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-02-05-ISelCrash.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-02-05-ISelCrash.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86
+; RUN: llc < %s -mtriple=i686--
; PR1975
@nodes = external global i64 ; <i64*> [#uses=2]
Modified: llvm/trunk/test/CodeGen/X86/2008-02-06-LoadFoldingBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-02-06-LoadFoldingBug.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-02-06-LoadFoldingBug.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-02-06-LoadFoldingBug.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 | FileCheck %s
; CHECK: xorps {{.*}}{{LCPI0_0|__xmm@}}
define void @casin({ double, double }* sret %agg.result, double %z.0, double %z.1) nounwind {
Modified: llvm/trunk/test/CodeGen/X86/2008-02-18-TailMergingBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-02-18-TailMergingBug.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-02-18-TailMergingBug.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-02-18-TailMergingBug.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
; REQUIRES: asserts
-; RUN: llc < %s -march=x86 -mcpu=yonah -stats 2>&1 | grep "Number of block tails merged" | grep 16
+; RUN: llc < %s -mtriple=i686-- -mcpu=yonah -stats 2>&1 | grep "Number of block tails merged" | grep 16
; PR1909
@.str = internal constant [48 x i8] c"transformed bounds: (%.2f, %.2f), (%.2f, %.2f)\0A\00" ; <[48 x i8]*> [#uses=1]
Modified: llvm/trunk/test/CodeGen/X86/2008-02-22-LocalRegAllocBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-02-22-LocalRegAllocBug.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-02-22-LocalRegAllocBug.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-02-22-LocalRegAllocBug.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -regalloc=fast -optimize-regalloc=0 -march=x86 -mattr=+mmx | grep esi
+; RUN: llc < %s -regalloc=fast -optimize-regalloc=0 -mtriple=i686-- -mattr=+mmx | grep esi
; PR2082
; Local register allocator was refusing to use ESI, EDI, and EBP so it ran out of
; registers.
Modified: llvm/trunk/test/CodeGen/X86/2008-02-25-X86-64-CoalescerBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-02-25-X86-64-CoalescerBug.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-02-25-X86-64-CoalescerBug.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-02-25-X86-64-CoalescerBug.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64
+; RUN: llc < %s -mtriple=x86_64--
%struct.XX = type <{ i8 }>
%struct.YY = type { i64 }
Modified: llvm/trunk/test/CodeGen/X86/2008-02-26-AsmDirectMemOp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-02-26-AsmDirectMemOp.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-02-26-AsmDirectMemOp.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-02-26-AsmDirectMemOp.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -no-integrated-as
+; RUN: llc < %s -no-integrated-as
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
target triple = "i386-pc-linux-gnu"
Modified: llvm/trunk/test/CodeGen/X86/2008-02-27-DeadSlotElimBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-02-27-DeadSlotElimBug.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-02-27-DeadSlotElimBug.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-02-27-DeadSlotElimBug.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86
+; RUN: llc < %s -mtriple=i686--
%struct.CompAtom = type <{ %struct.Position, float, i32 }>
%struct.Lattice = type { %struct.Position, %struct.Position, %struct.Position, %struct.Position, %struct.Position, %struct.Position, %struct.Position, i32, i32, i32 }
Modified: llvm/trunk/test/CodeGen/X86/2008-02-27-PEICrash.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-02-27-PEICrash.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-02-27-PEICrash.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-02-27-PEICrash.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mattr=+sse2
+; RUN: llc < %s -mtriple=i686-- -mattr=+sse2
define i64 @__divsc3(float %a, float %b, float %c, float %d) nounwind readnone {
entry:
Modified: llvm/trunk/test/CodeGen/X86/2008-03-06-frem-fpstack.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-03-06-frem-fpstack.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-03-06-frem-fpstack.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-03-06-frem-fpstack.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mcpu=i386
+; RUN: llc < %s -mtriple=i686-- -mcpu=i386
; PR2122
define float @func(float %a, float %b) nounwind {
entry:
Modified: llvm/trunk/test/CodeGen/X86/2008-03-07-APIntBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-03-07-APIntBug.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-03-07-APIntBug.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-03-07-APIntBug.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mcpu=i386 | not grep 255
+; RUN: llc < %s -mtriple=i686-- -mcpu=i386 | not grep 255
%struct.CONSTRAINT = type { i32, i32, i32, i32 }
%struct.FIRST_UNION = type { %struct.anon }
Modified: llvm/trunk/test/CodeGen/X86/2008-03-13-TwoAddrPassCrash.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-03-13-TwoAddrPassCrash.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-03-13-TwoAddrPassCrash.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-03-13-TwoAddrPassCrash.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86
+; RUN: llc < %s -mtriple=i686--
define signext i16 @t(i32 %depth) nounwind {
entry:
Modified: llvm/trunk/test/CodeGen/X86/2008-03-19-DAGCombinerBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-03-19-DAGCombinerBug.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-03-19-DAGCombinerBug.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-03-19-DAGCombinerBug.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86
+; RUN: llc < %s -mtriple=i686--
define i32 @t() nounwind {
entry:
Modified: llvm/trunk/test/CodeGen/X86/2008-03-25-TwoAddrPassBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-03-25-TwoAddrPassBug.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-03-25-TwoAddrPassBug.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-03-25-TwoAddrPassBug.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mattr=+sse2
+; RUN: llc < %s -mtriple=i686-- -mattr=+sse2
define void @t() {
entry:
Modified: llvm/trunk/test/CodeGen/X86/2008-04-09-BranchFolding.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-04-09-BranchFolding.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-04-09-BranchFolding.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-04-09-BranchFolding.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | not grep jmp
+; RUN: llc < %s -mtriple=i686-- | not grep jmp
%struct..0anon = type { i32 }
%struct.binding_level = type { %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.binding_level*, i8, i8, i8, i8, i8, i32, %struct.tree_node* }
Modified: llvm/trunk/test/CodeGen/X86/2008-04-16-CoalescerBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-04-16-CoalescerBug.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-04-16-CoalescerBug.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-04-16-CoalescerBug.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86
+; RUN: llc < %s -mtriple=i686--
define void @Hubba(i8* %saveunder, i32 %firstBlob, i32 %select) nounwind {
entry:
Modified: llvm/trunk/test/CodeGen/X86/2008-04-24-MemCpyBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-04-24-MemCpyBug.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-04-24-MemCpyBug.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-04-24-MemCpyBug.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | not grep 120
+; RUN: llc < %s -mtriple=i686-- | not grep 120
; Don't accidentally add the offset twice for trailing bytes.
%struct.S63 = type { [63 x i8] }
Modified: llvm/trunk/test/CodeGen/X86/2008-04-28-CyclicSchedUnit.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-04-28-CyclicSchedUnit.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-04-28-CyclicSchedUnit.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-04-28-CyclicSchedUnit.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86
+; RUN: llc < %s -mtriple=i686--
define i64 @t(i64 %maxIdleDuration) nounwind {
call void asm sideeffect "wrmsr", "{cx},A,~{dirflag},~{fpsr},~{flags}"( i32 416, i64 0 ) nounwind
Modified: llvm/trunk/test/CodeGen/X86/2008-05-01-InvalidOrdCompare.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-05-01-InvalidOrdCompare.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-05-01-InvalidOrdCompare.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-05-01-InvalidOrdCompare.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -enable-unsafe-fp-math -march=x86 | grep jp
+; RUN: llc < %s -enable-unsafe-fp-math -mtriple=i686-- | grep jp
; rdar://5902801
declare void @test2()
Modified: llvm/trunk/test/CodeGen/X86/2008-05-09-PHIElimBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-05-09-PHIElimBug.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-05-09-PHIElimBug.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-05-09-PHIElimBug.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86
+; RUN: llc < %s -mtriple=i686--
%struct.V = type { <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x i32>, float*, float*, float*, float*, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, i32, i32, i32, i32, i32, i32, i32, i32 }
Modified: llvm/trunk/test/CodeGen/X86/2008-05-09-ShuffleLoweringBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-05-09-ShuffleLoweringBug.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-05-09-ShuffleLoweringBug.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-05-09-ShuffleLoweringBug.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mattr=+sse2
+; RUN: llc < %s -mtriple=i686-- -mattr=+sse2
define fastcc void @glgVectorFloatConversion() nounwind {
%tmp12745 = load <4 x float>, <4 x float>* null, align 16 ; <<4 x float>> [#uses=1]
Modified: llvm/trunk/test/CodeGen/X86/2008-05-21-CoalescerBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-05-21-CoalescerBug.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-05-21-CoalescerBug.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-05-21-CoalescerBug.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -O0 -fast-isel=false -optimize-regalloc -regalloc=basic | grep mov | count 5
+; RUN: llc < %s -mtriple=i686-- -O0 -fast-isel=false -optimize-regalloc -regalloc=basic | grep mov | count 5
; PR2343
%llvm.dbg.anchor.type = type { i32, i32 }
Modified: llvm/trunk/test/CodeGen/X86/2008-05-22-FoldUnalignedLoad.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-05-22-FoldUnalignedLoad.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-05-22-FoldUnalignedLoad.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-05-22-FoldUnalignedLoad.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mcpu=penryn | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- -mcpu=penryn | FileCheck %s
define void @a(<4 x float>* %x) nounwind {
entry:
Modified: llvm/trunk/test/CodeGen/X86/2008-06-13-NotVolatileLoadStore.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-06-13-NotVolatileLoadStore.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-06-13-NotVolatileLoadStore.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-06-13-NotVolatileLoadStore.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=x86 -fixup-byte-word-insts=0 | FileCheck %s -check-prefix=CHECK -check-prefix=BWOFF
-; RUN: llc < %s -march=x86 -fixup-byte-word-insts=1 | FileCheck %s -check-prefix=CHECK -check-prefix=BWON
+; RUN: llc < %s -mtriple=i686-- -fixup-byte-word-insts=0 | FileCheck %s -check-prefix=CHECK -check-prefix=BWOFF
+; RUN: llc < %s -mtriple=i686-- -fixup-byte-word-insts=1 | FileCheck %s -check-prefix=CHECK -check-prefix=BWON
; These transforms are turned off for load volatiles and stores.
; Check that they weren't turned off for all loads and stores!
; CHECK-LABEL: f:
Modified: llvm/trunk/test/CodeGen/X86/2008-06-25-VecISelBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-06-25-VecISelBug.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-06-25-VecISelBug.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-06-25-VecISelBug.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep pslldq
+; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 | not grep pslldq
define void @t() nounwind {
entry:
Modified: llvm/trunk/test/CodeGen/X86/2008-07-11-SHLBy1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-07-11-SHLBy1.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-07-11-SHLBy1.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-07-11-SHLBy1.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -o - | not grep shr
+; RUN: llc < %s -mtriple=x86_64-- -o - | not grep shr
define i128 @sl(i128 %x) {
%t = shl i128 %x, 1
ret i128 %t
Modified: llvm/trunk/test/CodeGen/X86/2008-07-22-CombinerCrash.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-07-22-CombinerCrash.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-07-22-CombinerCrash.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-07-22-CombinerCrash.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mattr=+sse2
+; RUN: llc < %s -mtriple=i686-- -mattr=+sse2
; PR2566
@0 = external global i16 ; <i16*>:0 [#uses=1]
Modified: llvm/trunk/test/CodeGen/X86/2008-07-23-VSetCC.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-07-23-VSetCC.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-07-23-VSetCC.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-07-23-VSetCC.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mcpu=pentium
+; RUN: llc < %s -mtriple=i686-- -mcpu=pentium
; PR2575
define void @entry(i32 %m_task_id, i32 %start_x, i32 %end_x) nounwind {
Modified: llvm/trunk/test/CodeGen/X86/2008-08-06-CmpStride.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-08-06-CmpStride.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-08-06-CmpStride.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-08-06-CmpStride.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc -march=x86-64 < %s -o - | grep "cmpl \$[1], %"
+; RUN: llc -mtriple=x86_64-- < %s -o - | grep "cmpl \$[1], %"
@.str = internal constant [4 x i8] c"%d\0A\00"
Modified: llvm/trunk/test/CodeGen/X86/2008-08-06-RewriterBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-08-06-RewriterBug.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-08-06-RewriterBug.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-08-06-RewriterBug.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86
+; RUN: llc < %s -mtriple=i686--
; PR2596
@data = external global [400 x i64] ; <[400 x i64]*> [#uses=5]
Modified: llvm/trunk/test/CodeGen/X86/2008-08-23-64Bit-maskmovq.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-08-23-64Bit-maskmovq.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-08-23-64Bit-maskmovq.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-08-23-64Bit-maskmovq.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64
+; RUN: llc < %s -mtriple=x86_64--
%struct.DrawHelper = type { void (i32, %struct.QT_FT_Span*, i8*)*, void (i32, %struct.QT_FT_Span*, i8*)*, void (%struct.QRasterBuffer*, i32, i32, i32, i8*, i32, i32, i32)*, void (%struct.QRasterBuffer*, i32, i32, i32, i8*, i32, i32, i32)*, void (%struct.QRasterBuffer*, i32, i32, i32, i32, i32)* }
%struct.QBasicAtomic = type { i32 }
Modified: llvm/trunk/test/CodeGen/X86/2008-09-05-sinttofp-2xi32.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-09-05-sinttofp-2xi32.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-09-05-sinttofp-2xi32.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-09-05-sinttofp-2xi32.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mattr=+sse2,+mmx | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- -mattr=+sse2,+mmx | FileCheck %s
; originally from PR2687, but things don't work that way any more.
; there are no MMX instructions here; we use XMM.
Modified: llvm/trunk/test/CodeGen/X86/2008-09-11-CoalescerBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-09-11-CoalescerBug.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-09-11-CoalescerBug.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-09-11-CoalescerBug.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86
+; RUN: llc < %s -mtriple=i686--
; PR2783
@g_15 = external global i16 ; <i16*> [#uses=2]
Modified: llvm/trunk/test/CodeGen/X86/2008-09-11-CoalescerBug2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-09-11-CoalescerBug2.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-09-11-CoalescerBug2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-09-11-CoalescerBug2.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86
+; RUN: llc < %s -mtriple=i686--
; RUN: llc -pre-RA-sched=source < %s -mtriple=i686-unknown-linux -mcpu=corei7 | FileCheck %s --check-prefix=SOURCE-SCHED
; PR2748
Modified: llvm/trunk/test/CodeGen/X86/2008-09-17-inline-asm-1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-09-17-inline-asm-1.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-09-17-inline-asm-1.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-09-17-inline-asm-1.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=x86 | FileCheck %s
-; RUN: llc < %s -march=x86 -regalloc=fast -optimize-regalloc=0 | FileCheck %s
+; RUN: llc < %s | FileCheck %s
+; RUN: llc < %s -regalloc=fast -optimize-regalloc=0 | FileCheck %s
; %0 must not be put in EAX or EDX.
; In the first asm, $0 and $2 must not be put in EAX.
Modified: llvm/trunk/test/CodeGen/X86/2008-09-18-inline-asm-2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-09-18-inline-asm-2.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-09-18-inline-asm-2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-09-18-inline-asm-2.ll Tue Aug 1 17:28:10 2017
@@ -1,6 +1,6 @@
-; RUN: llc < %s -march=x86 -regalloc=fast -optimize-regalloc=0 -no-integrated-as | FileCheck %s
-; RUN: llc < %s -march=x86 -regalloc=basic -no-integrated-as | FileCheck %s
-; RUN: llc < %s -march=x86 -regalloc=greedy -no-integrated-as | FileCheck %s
+; RUN: llc < %s -regalloc=fast -optimize-regalloc=0 -no-integrated-as | FileCheck %s
+; RUN: llc < %s -regalloc=basic -no-integrated-as | FileCheck %s
+; RUN: llc < %s -regalloc=greedy -no-integrated-as | FileCheck %s
; The 1st, 2nd, 3rd and 5th registers must all be different. The registers
; referenced in the 4th and 6th operands must not be the same as the 1st or 5th
Modified: llvm/trunk/test/CodeGen/X86/2008-09-25-sseregparm-1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-09-25-sseregparm-1.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-09-25-sseregparm-1.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-09-25-sseregparm-1.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movs | count 2
-; RUN: llc < %s -march=x86 -mattr=+sse2 | grep fld | count 2
+; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 | grep movs | count 2
+; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 | grep fld | count 2
; check 'inreg' attribute for sse_regparm
define inreg double @foo1() nounwind {
Modified: llvm/trunk/test/CodeGen/X86/2008-09-29-VolatileBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-09-29-VolatileBug.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-09-29-VolatileBug.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-09-29-VolatileBug.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | not grep movz
+; RUN: llc < %s -mtriple=i686-- | not grep movz
; PR2835
@g_407 = internal global i32 0 ; <i32*> [#uses=1]
Modified: llvm/trunk/test/CodeGen/X86/2008-10-06-x87ld-nan-1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-10-06-x87ld-nan-1.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-10-06-x87ld-nan-1.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-10-06-x87ld-nan-1.ll Tue Aug 1 17:28:10 2017
@@ -1,7 +1,7 @@
; ModuleID = 'nan.bc'
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-f80:32:32-v64:64:64-v128:128:128-a0:0:64"
target triple = "i686-apple-darwin8"
-; RUN: llc < %s -march=x86 -mattr=-sse2,-sse3,-sse | grep fldl
+; RUN: llc < %s -mattr=-sse2,-sse3,-sse | grep fldl
; This NaN should be shortened to a double (not a float).
declare x86_stdcallcc void @_D3nan5printFeZv(x86_fp80 %f)
Modified: llvm/trunk/test/CodeGen/X86/2008-10-06-x87ld-nan-2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-10-06-x87ld-nan-2.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-10-06-x87ld-nan-2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-10-06-x87ld-nan-2.ll Tue Aug 1 17:28:10 2017
@@ -1,7 +1,7 @@
; ModuleID = 'nan.bc'
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-f80:32:32-v64:64:64-v128:128:128-a0:0:64"
target triple = "i686-apple-darwin8"
-; RUN: llc < %s -march=x86 -mattr=-sse2,-sse3,-sse | grep fldt | count 3
+; RUN: llc < %s -mattr=-sse2,-sse3,-sse | grep fldt | count 3
; it is not safe to shorten any of these NaNs.
declare x86_stdcallcc void @_D3nan5printFeZv(x86_fp80 %f)
Modified: llvm/trunk/test/CodeGen/X86/2008-10-07-SSEISelBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-10-07-SSEISelBug.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-10-07-SSEISelBug.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-10-07-SSEISelBug.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mattr=+sse,-sse2
+; RUN: llc < %s -mtriple=i686-- -mattr=+sse,-sse2
define <4 x float> @f(float %w) nounwind {
entry:
Modified: llvm/trunk/test/CodeGen/X86/2008-10-13-CoalescerBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-10-13-CoalescerBug.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-10-13-CoalescerBug.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-10-13-CoalescerBug.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86
+; RUN: llc < %s -mtriple=i686--
; PR2775
define i32 @func_77(i8 zeroext %p_79) nounwind {
Modified: llvm/trunk/test/CodeGen/X86/2008-10-16-VecUnaryOp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-10-16-VecUnaryOp.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-10-16-VecUnaryOp.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-10-16-VecUnaryOp.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mattr=+sse2
+; RUN: llc < %s -mtriple=i686-- -mattr=+sse2
; PR2762
define void @foo(<4 x i32>* %p, <4 x double>* %q) {
%n = load <4 x i32>, <4 x i32>* %p
Modified: llvm/trunk/test/CodeGen/X86/2008-10-17-Asm64bitRConstraint.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-10-17-Asm64bitRConstraint.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-10-17-Asm64bitRConstraint.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-10-17-Asm64bitRConstraint.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=x86 -no-integrated-as
-; RUN: llc < %s -march=x86-64 -no-integrated-as
+; RUN: llc < %s -mtriple=i686-- -no-integrated-as
+; RUN: llc < %s -mtriple=x86_64-- -no-integrated-as
define void @test(i64 %x) nounwind {
entry:
Modified: llvm/trunk/test/CodeGen/X86/2008-10-20-AsmDoubleInI32.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-10-20-AsmDoubleInI32.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-10-20-AsmDoubleInI32.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-10-20-AsmDoubleInI32.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=x86 -no-integrated-as
-; RUN: llc < %s -march=x86-64 -no-integrated-as
+; RUN: llc < %s -mtriple=i686-- -no-integrated-as
+; RUN: llc < %s -mtriple=x86_64-- -no-integrated-as
; from gcc.c-torture/compile/920520-1.c
Modified: llvm/trunk/test/CodeGen/X86/2008-10-24-FlippedCompare.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-10-24-FlippedCompare.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-10-24-FlippedCompare.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-10-24-FlippedCompare.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mattr=+sse2 -o - | not grep "ucomiss[^,]*esp"
+; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 -o - | not grep "ucomiss[^,]*esp"
define void @f(float %wt) {
entry:
Modified: llvm/trunk/test/CodeGen/X86/2008-10-29-ExpandVAARG.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-10-29-ExpandVAARG.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-10-29-ExpandVAARG.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-10-29-ExpandVAARG.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86
+; RUN: llc < %s -mtriple=i686--
; PR2977
define i8* @ap_php_conv_p2(){
entry:
Modified: llvm/trunk/test/CodeGen/X86/2008-11-03-F80VAARG.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-11-03-F80VAARG.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-11-03-F80VAARG.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-11-03-F80VAARG.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -o - | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- -o - | FileCheck %s
declare void @llvm.va_start(i8*) nounwind
Modified: llvm/trunk/test/CodeGen/X86/2008-12-02-dagcombine-1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-12-02-dagcombine-1.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-12-02-dagcombine-1.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-12-02-dagcombine-1.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | grep "(%esp)" | count 2
+; RUN: llc < %s | grep "(%esp)" | count 2
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i386-apple-darwin9.5"
; a - a should be found and removed, leaving refs to only L and P
Modified: llvm/trunk/test/CodeGen/X86/2008-12-02-dagcombine-2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-12-02-dagcombine-2.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-12-02-dagcombine-2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-12-02-dagcombine-2.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | grep "(%esp)" | count 2
+; RUN: llc < %s | grep "(%esp)" | count 2
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i386-apple-darwin9.5"
; a - a should be found and removed, leaving refs to only L and P
Modified: llvm/trunk/test/CodeGen/X86/2008-12-02-dagcombine-3.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-12-02-dagcombine-3.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-12-02-dagcombine-3.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-12-02-dagcombine-3.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=x86 | grep add | count 2
-; RUN: llc < %s -march=x86 | grep sub | grep -v subsections | count 1
+; RUN: llc < %s | grep add | count 2
+; RUN: llc < %s | grep sub | grep -v subsections | count 1
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i386-apple-darwin9.5"
; this should be rearranged to have two +s and one -
Modified: llvm/trunk/test/CodeGen/X86/2008-12-16-dagcombine-4.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-12-16-dagcombine-4.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-12-16-dagcombine-4.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-12-16-dagcombine-4.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | grep "(%esp)" | count 2
+; RUN: llc < %s | grep "(%esp)" | count 2
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i386-apple-darwin9.5"
; a - a should be found and removed, leaving refs to only L and P
Modified: llvm/trunk/test/CodeGen/X86/2008-12-22-dagcombine-5.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-12-22-dagcombine-5.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-12-22-dagcombine-5.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-12-22-dagcombine-5.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | grep "(%esp)" | count 2
+; RUN: llc < %s | grep "(%esp)" | count 2
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i386-apple-darwin9.5"
; -(-a) - a should be found and removed, leaving refs to only L and P
Modified: llvm/trunk/test/CodeGen/X86/2008-12-23-crazy-address.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-12-23-crazy-address.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-12-23-crazy-address.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-12-23-crazy-address.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -relocation-model=static | grep "lea.*X.*esp" | count 2
+; RUN: llc < %s -mtriple=i686-- -relocation-model=static | grep "lea.*X.*esp" | count 2
@X = external global [0 x i32]
Modified: llvm/trunk/test/CodeGen/X86/2008-12-23-dagcombine-6.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-12-23-dagcombine-6.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-12-23-dagcombine-6.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-12-23-dagcombine-6.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | grep "(%esp)" | count 4
+; RUN: llc < %s | grep "(%esp)" | count 4
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i386-apple-darwin9.5"
; a - a should be found and removed, leaving refs to only L and P
Modified: llvm/trunk/test/CodeGen/X86/2009-01-13-DoubleUpdate.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-01-13-DoubleUpdate.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2009-01-13-DoubleUpdate.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2009-01-13-DoubleUpdate.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mattr=+sse2 -enable-legalize-types-checking
+; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 -enable-legalize-types-checking
declare <2 x double> @llvm.x86.sse2.min.pd(<2 x double>, <2 x double>) nounwind readnone
Modified: llvm/trunk/test/CodeGen/X86/2009-01-16-UIntToFP.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-01-16-UIntToFP.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2009-01-16-UIntToFP.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2009-01-16-UIntToFP.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86
+; RUN: llc < %s
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i386-apple-darwin8"
Modified: llvm/trunk/test/CodeGen/X86/2009-01-25-NoSSE.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-01-25-NoSSE.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2009-01-25-NoSSE.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2009-01-25-NoSSE.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -mattr=-sse,-sse2 | FileCheck %s
+; RUN: llc < %s -mattr=-sse,-sse2 | FileCheck %s
; PR3402
target datalayout =
"e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
Modified: llvm/trunk/test/CodeGen/X86/2009-01-26-WrongCheck.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-01-26-WrongCheck.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2009-01-26-WrongCheck.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2009-01-26-WrongCheck.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -enable-legalize-types-checking
+; RUN: llc < %s -mtriple=i686-- -enable-legalize-types-checking
; PR3393
define void @foo(i32 inreg %x) {
Modified: llvm/trunk/test/CodeGen/X86/2009-01-31-BigShift.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-01-31-BigShift.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2009-01-31-BigShift.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2009-01-31-BigShift.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | not grep and
+; RUN: llc < %s -mtriple=i686-- | not grep and
; PR3401
define void @x(i288 %i) nounwind {
Modified: llvm/trunk/test/CodeGen/X86/2009-01-31-BigShift2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-01-31-BigShift2.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2009-01-31-BigShift2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2009-01-31-BigShift2.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | grep "mov.*56"
+; RUN: llc < %s -mtriple=i686-- | grep "mov.*56"
; PR3449
define void @test(<8 x double>* %P, i64* %Q) nounwind {
Modified: llvm/trunk/test/CodeGen/X86/2009-01-31-BigShift3.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-01-31-BigShift3.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2009-01-31-BigShift3.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2009-01-31-BigShift3.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86
+; RUN: llc < %s
; PR3450
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
Modified: llvm/trunk/test/CodeGen/X86/2009-02-01-LargeMask.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-02-01-LargeMask.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2009-02-01-LargeMask.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2009-02-01-LargeMask.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86
+; RUN: llc < %s
; PR3453
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
Modified: llvm/trunk/test/CodeGen/X86/2009-02-03-AnalyzedTwice.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-02-03-AnalyzedTwice.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2009-02-03-AnalyzedTwice.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2009-02-03-AnalyzedTwice.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86
+; RUN: llc < %s
; PR3411
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
Modified: llvm/trunk/test/CodeGen/X86/2009-02-08-CoalescerBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-02-08-CoalescerBug.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2009-02-08-CoalescerBug.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2009-02-08-CoalescerBug.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86
+; RUN: llc < %s -mtriple=i686--
; PR3486
define i32 @foo(i8 signext %p_26) nounwind {
Modified: llvm/trunk/test/CodeGen/X86/2009-02-12-DebugInfoVLA.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-02-12-DebugInfoVLA.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2009-02-12-DebugInfoVLA.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2009-02-12-DebugInfoVLA.ll Tue Aug 1 17:28:10 2017
@@ -1,8 +1,7 @@
-; RUN: llc < %s
-; RUN: llc < %s -stack-symbol-ordering=0 -march=x86-64 -verify-machineinstrs | FileCheck %s
+; RUN: llc < %s -mtriple=i386-apple-darwin9
+; RUN: llc < %s -mtriple=x86_64-apple-darwin9 -stack-symbol-ordering=0 -verify-machineinstrs | FileCheck %s
; PR3538
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
-target triple = "i386-apple-darwin9"
define signext i8 @foo(i8* %s1) nounwind ssp {
; Make sure we generate:
Modified: llvm/trunk/test/CodeGen/X86/2009-02-12-InlineAsm-nieZ-constraints.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-02-12-InlineAsm-nieZ-constraints.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2009-02-12-InlineAsm-nieZ-constraints.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2009-02-12-InlineAsm-nieZ-constraints.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -no-integrated-as | FileCheck %s
+; RUN: llc < %s -no-integrated-as | FileCheck %s
; ModuleID = 'shant.c'
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
Modified: llvm/trunk/test/CodeGen/X86/2009-02-12-SpillerBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-02-12-SpillerBug.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2009-02-12-SpillerBug.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2009-02-12-SpillerBug.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mtriple=i386-apple-darwin8
+; RUN: llc < %s -mtriple=i386-apple-darwin8
; PR3561
define hidden void @__mulxc3({ x86_fp80, x86_fp80 }* noalias nocapture sret %agg.result, x86_fp80 %a, x86_fp80 %b, x86_fp80 %c, x86_fp80 %d) nounwind {
Modified: llvm/trunk/test/CodeGen/X86/2009-02-25-CommuteBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-02-25-CommuteBug.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2009-02-25-CommuteBug.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2009-02-25-CommuteBug.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
; REQUIRES: asserts
-; RUN: llc < %s -march=x86 -mattr=+sse2 -stats 2>&1 | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 -stats 2>&1 | FileCheck %s
; rdar://6608609
; CHECK-NOT: commuted
Modified: llvm/trunk/test/CodeGen/X86/2009-02-26-MachineLICMBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-02-26-MachineLICMBug.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2009-02-26-MachineLICMBug.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2009-02-26-MachineLICMBug.ll Tue Aug 1 17:28:10 2017
@@ -1,6 +1,6 @@
; REQUIRES: asserts
-; RUN: llc < %s -march=x86-64 -mattr=+sse3,+sse4.1 -mcpu=penryn -stats 2>&1 | grep "9 machinelicm"
-; RUN: llc < %s -march=x86-64 -mattr=+sse3,+sse4.1 -mcpu=penryn | FileCheck %s
+; RUN: llc < %s -mattr=+sse3,+sse4.1 -mcpu=penryn -stats 2>&1 | grep "9 machinelicm"
+; RUN: llc < %s -mattr=+sse3,+sse4.1 -mcpu=penryn | FileCheck %s
; rdar://6627786
; rdar://7792037
Modified: llvm/trunk/test/CodeGen/X86/2009-03-03-BTHang.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-03-03-BTHang.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2009-03-03-BTHang.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2009-03-03-BTHang.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86
+; RUN: llc < %s -mtriple=i686--
; rdar://6642541
%struct.HandleBlock = type { [30 x i32], [990 x i8*], %struct.HandleBlockTrailer }
Modified: llvm/trunk/test/CodeGen/X86/2009-03-03-BitcastLongDouble.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-03-03-BitcastLongDouble.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2009-03-03-BitcastLongDouble.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2009-03-03-BitcastLongDouble.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86
+; RUN: llc < %s -mtriple=i686--
; PR3686
; rdar://6661799
Modified: llvm/trunk/test/CodeGen/X86/2009-03-07-FPConstSelect.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-03-07-FPConstSelect.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2009-03-07-FPConstSelect.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2009-03-07-FPConstSelect.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mcpu=yonah | not grep xmm
+; RUN: llc < %s -mcpu=yonah | not grep xmm
; This should do a single load into the fp stack for the return, not diddle with xmm registers.
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
Modified: llvm/trunk/test/CodeGen/X86/2009-03-09-APIntCrash.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-03-09-APIntCrash.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2009-03-09-APIntCrash.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2009-03-09-APIntCrash.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64
+; RUN: llc < %s -mtriple=x86_64--
; PR3763
%struct.__block_descriptor = type { i64, i64 }
Modified: llvm/trunk/test/CodeGen/X86/2009-03-25-TestBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-03-25-TestBug.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2009-03-25-TestBug.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2009-03-25-TestBug.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- | FileCheck %s
; rdar://6661955
; CHECK-NOT: and
Modified: llvm/trunk/test/CodeGen/X86/2009-03-26-NoImplicitFPBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-03-26-NoImplicitFPBug.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2009-03-26-NoImplicitFPBug.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2009-03-26-NoImplicitFPBug.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mattr=+sse2
+; RUN: llc < %s -mtriple=i686-- -mattr=+sse2
define double @t(double %x) nounwind ssp noimplicitfloat {
entry:
Modified: llvm/trunk/test/CodeGen/X86/2009-04-12-picrel.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-04-12-picrel.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2009-04-12-picrel.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2009-04-12-picrel.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -march=x86-64 -relocation-model=static -code-model=small > %t
+; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -relocation-model=static -code-model=small > %t
; RUN: grep leaq %t | count 1
@dst = external global [131072 x i32]
Modified: llvm/trunk/test/CodeGen/X86/2009-04-24.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-04-24.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2009-04-24.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2009-04-24.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu -regalloc=fast -optimize-regalloc=0 -relocation-model=pic | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-linux-gnu -regalloc=fast -optimize-regalloc=0 -relocation-model=pic | FileCheck %s
; PR4004
; CHECK: {{leaq.*TLSGD}}
Modified: llvm/trunk/test/CodeGen/X86/2009-04-25-CoalescerBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-04-25-CoalescerBug.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2009-04-25-CoalescerBug.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2009-04-25-CoalescerBug.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 | grep mov | count 1
+; RUN: llc < %s -mtriple=x86_64-- | grep mov | count 1
; rdar://6806252
define i64 @test(i32* %tmp13) nounwind {
Modified: llvm/trunk/test/CodeGen/X86/2009-04-scale.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-04-scale.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2009-04-scale.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2009-04-scale.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mtriple=i386-unknown-linux-gnu
+; RUN: llc < %s -mtriple=i386-unknown-linux-gnu
; PR3995
%struct.vtable = type { i32 (...)** }
Modified: llvm/trunk/test/CodeGen/X86/2009-05-11-tailmerge-crash.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-05-11-tailmerge-crash.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2009-05-11-tailmerge-crash.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2009-05-11-tailmerge-crash.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86
+; RUN: llc < %s
; PR4188
; ModuleID = '<stdin>'
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
Modified: llvm/trunk/test/CodeGen/X86/2009-05-19-SingleElementExtractElement.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-05-19-SingleElementExtractElement.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2009-05-19-SingleElementExtractElement.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2009-05-19-SingleElementExtractElement.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64
+; RUN: llc < %s -mtriple=x86_64--
; PR3886
define i32 @main(i32 %argc, i8** nocapture %argv) nounwind {
Modified: llvm/trunk/test/CodeGen/X86/2009-05-28-DAGCombineCrash.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-05-28-DAGCombineCrash.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2009-05-28-DAGCombineCrash.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2009-05-28-DAGCombineCrash.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64
+; RUN: llc < %s -mtriple=x86_64--
define fastcc void @S_next_symbol(i448* %P) nounwind ssp {
entry:
Modified: llvm/trunk/test/CodeGen/X86/2009-05-30-ISelBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-05-30-ISelBug.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2009-05-30-ISelBug.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2009-05-30-ISelBug.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 | not grep "movzbl %[abcd]h,"
+; RUN: llc < %s -mtriple=x86_64-- | not grep "movzbl %[abcd]h,"
define void @BZ2_bzDecompress_bb5_2E_outer_bb35_2E_i_bb54_2E_i(i32*, i32 %c_nblock_used.2.i, i32 %.reload51, i32* %.out, i32* %.out1, i32* %.out2, i32* %.out3) nounwind {
newFuncRoot:
Modified: llvm/trunk/test/CodeGen/X86/2009-06-04-VirtualLiveIn.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-06-04-VirtualLiveIn.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2009-06-04-VirtualLiveIn.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2009-06-04-VirtualLiveIn.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86
+; RUN: llc < %s -mtriple=i686--
%0 = type { %struct.GAP } ; type %0
%1 = type { i16, i8, i8 } ; type %1
Modified: llvm/trunk/test/CodeGen/X86/2009-06-05-VZextByteShort.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-06-05-VZextByteShort.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2009-06-05-VZextByteShort.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2009-06-05-VZextByteShort.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mcpu=core2 | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- -mcpu=core2 | FileCheck %s
define <4 x i16> @a(i32* %x1) nounwind {
; CHECK-LABEL: a:
Modified: llvm/trunk/test/CodeGen/X86/2009-06-05-sitofpCrash.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-06-05-sitofpCrash.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2009-06-05-sitofpCrash.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2009-06-05-sitofpCrash.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mattr=+sse
+; RUN: llc < %s -mtriple=i686-- -mattr=+sse
; PR2598
define <2 x float> @a(<2 x i32> %i) nounwind {
Modified: llvm/trunk/test/CodeGen/X86/2009-06-12-x86_64-tail-call-conv-out-of-sync-bug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-06-12-x86_64-tail-call-conv-out-of-sync-bug.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2009-06-12-x86_64-tail-call-conv-out-of-sync-bug.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2009-06-12-x86_64-tail-call-conv-out-of-sync-bug.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
-; RUN: llc < %s -tailcallopt -march=x86-64 -mattr=+sse2 -mtriple=x86_64-apple-darwin | grep fstpt
-; RUN: llc < %s -tailcallopt -march=x86-64 -mattr=+sse2 -mtriple=x86_64-apple-darwin | grep xmm
+; RUN: llc < %s -tailcallopt -mattr=+sse2 -mtriple=x86_64-apple-darwin | grep fstpt
+; RUN: llc < %s -tailcallopt -mattr=+sse2 -mtriple=x86_64-apple-darwin | grep xmm
; Check that x86-64 tail calls support x86_fp80 and v2f32 types. (Tail call
; calling convention out of sync with standard c calling convention on x86_64)
Modified: llvm/trunk/test/CodeGen/X86/2009-06-15-not-a-tail-call.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-06-15-not-a-tail-call.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2009-06-15-not-a-tail-call.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2009-06-15-not-a-tail-call.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -tailcallopt | not grep TAILCALL
+; RUN: llc < %s -mtriple=i686-- -tailcallopt | not grep TAILCALL
; Bug 4396. This tail call can NOT be optimized.
Modified: llvm/trunk/test/CodeGen/X86/2009-06-18-movlp-shuffle-register.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-06-18-movlp-shuffle-register.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2009-06-18-movlp-shuffle-register.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2009-06-18-movlp-shuffle-register.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mattr=+sse,-sse2 | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- -mattr=+sse,-sse2 | FileCheck %s
; PR2484
define <4 x float> @f4523(<4 x float> %a,<4 x float> %b) nounwind {
Modified: llvm/trunk/test/CodeGen/X86/2009-07-06-TwoAddrAssert.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-07-06-TwoAddrAssert.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2009-07-06-TwoAddrAssert.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2009-07-06-TwoAddrAssert.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mtriple=x86_64-unknown-freebsd7.2
+; RUN: llc < %s -mtriple=x86_64-unknown-freebsd7.2
; PR4478
%struct.sockaddr = type <{ i8, i8, [14 x i8] }>
Modified: llvm/trunk/test/CodeGen/X86/2009-07-07-SplitICmp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-07-07-SplitICmp.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2009-07-07-SplitICmp.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2009-07-07-SplitICmp.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86
+; RUN: llc < %s -mtriple=i686--
define void @test2(<2 x i32> %A, <2 x i32> %B, <2 x i32>* %C) nounwind {
%D = icmp sgt <2 x i32> %A, %B
Modified: llvm/trunk/test/CodeGen/X86/2009-07-09-ExtractBoolFromVector.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-07-09-ExtractBoolFromVector.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2009-07-09-ExtractBoolFromVector.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2009-07-09-ExtractBoolFromVector.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86
+; RUN: llc < %s -mtriple=i686--
; PR3037
define void @entry(<4 x i8>* %dest) {
Modified: llvm/trunk/test/CodeGen/X86/2009-07-19-AsmExtraOperands.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-07-19-AsmExtraOperands.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2009-07-19-AsmExtraOperands.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2009-07-19-AsmExtraOperands.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64
+; RUN: llc < %s -mtriple=x86_64--
; PR4583
define i32 @atomic_cmpset_long(i64* %dst, i64 %exp, i64 %src) nounwind ssp noredzone noimplicitfloat {
Modified: llvm/trunk/test/CodeGen/X86/2009-07-20-DAGCombineBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-07-20-DAGCombineBug.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2009-07-20-DAGCombineBug.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2009-07-20-DAGCombineBug.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86
+; RUN: llc < %s -mtriple=i686--
@bsBuff = internal global i32 0 ; <i32*> [#uses=1]
@llvm.used = appending global [1 x i8*] [i8* bitcast (i32 ()* @bsGetUInt32 to i8*)], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
Modified: llvm/trunk/test/CodeGen/X86/2009-08-19-LoadNarrowingMiscompile.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-08-19-LoadNarrowingMiscompile.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2009-08-19-LoadNarrowingMiscompile.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2009-08-19-LoadNarrowingMiscompile.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mtriple=i386-pc-linux | FileCheck %s
+; RUN: llc < %s -mtriple=i386-pc-linux | FileCheck %s
@a = external global i96, align 4
@b = external global i64, align 8
Modified: llvm/trunk/test/CodeGen/X86/2009-08-23-SubRegReuseUndo.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-08-23-SubRegReuseUndo.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2009-08-23-SubRegReuseUndo.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2009-08-23-SubRegReuseUndo.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86
+; RUN: llc < %s -mtriple=i686--
; PR4753
; This function has a sub-register reuse undone.
Modified: llvm/trunk/test/CodeGen/X86/20090313-signext.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/20090313-signext.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/20090313-signext.ll (original)
+++ llvm/trunk/test/CodeGen/X86/20090313-signext.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -relocation-model=pic > %t
+; RUN: llc < %s -mtriple=x86_64-- -relocation-model=pic > %t
; RUN: grep "movswl %ax, %edi" %t
; RUN: grep "movw (%rax), %ax" %t
; XFAIL: *
Modified: llvm/trunk/test/CodeGen/X86/2010-01-05-ZExt-Shl.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2010-01-05-ZExt-Shl.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2010-01-05-ZExt-Shl.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2010-01-05-ZExt-Shl.ll Tue Aug 1 17:28:10 2017
@@ -1,6 +1,6 @@
-; RUN: llc < %s -march=x86-64
+; RUN: llc < %s
; <rdar://problem/7499313>
-target triple = "i686-apple-darwin8"
+target triple = "x86_64-apple-darwin8"
declare void @func2(i16 zeroext)
Modified: llvm/trunk/test/CodeGen/X86/2010-01-15-SelectionDAGCycle.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2010-01-15-SelectionDAGCycle.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2010-01-15-SelectionDAGCycle.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2010-01-15-SelectionDAGCycle.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64
+; RUN: llc < %s
; ModuleID = 'bugpoint-reduced-simplified.bc'
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
target triple = "x86_64-unknown-linux-gnu"
Modified: llvm/trunk/test/CodeGen/X86/2010-01-18-DbgValue.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2010-01-18-DbgValue.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2010-01-18-DbgValue.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2010-01-18-DbgValue.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc -march=x86 -O0 < %s -filetype=obj | llvm-dwarfdump - | FileCheck %s
+; RUN: llc -mtriple=i686-- -O0 < %s -filetype=obj | llvm-dwarfdump - | FileCheck %s
; CHECK-LABEL: .debug_info contents:
Modified: llvm/trunk/test/CodeGen/X86/2010-02-03-DualUndef.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2010-02-03-DualUndef.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2010-02-03-DualUndef.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2010-02-03-DualUndef.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64
+; RUN: llc < %s -mtriple=x86_64--
; PR6086
define fastcc void @prepOutput() nounwind {
bb: ; preds = %output.exit
Modified: llvm/trunk/test/CodeGen/X86/2010-02-11-NonTemporal.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2010-02-11-NonTemporal.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2010-02-11-NonTemporal.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2010-02-11-NonTemporal.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 | FileCheck %s
+; RUN: llc < %s | FileCheck %s
; CHECK: movnt
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
target triple = "x86_64-unknown-linux-gnu"
Modified: llvm/trunk/test/CodeGen/X86/2010-02-23-DAGCombineBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2010-02-23-DAGCombineBug.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2010-02-23-DAGCombineBug.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2010-02-23-DAGCombineBug.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- | FileCheck %s
define i32* @t() nounwind optsize ssp {
entry:
Modified: llvm/trunk/test/CodeGen/X86/2010-06-14-fast-isel-fs-load.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2010-06-14-fast-isel-fs-load.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2010-06-14-fast-isel-fs-load.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2010-06-14-fast-isel-fs-load.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc -fast-isel -march=x86 < %s | FileCheck %s
+; RUN: llc -fast-isel -mtriple=i686-- < %s | FileCheck %s
; CHECK: %fs:
define i32 @test1(i32 addrspace(257)* %arg) nounwind {
Modified: llvm/trunk/test/CodeGen/X86/2010-06-28-FastAllocTiedOperand.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2010-06-28-FastAllocTiedOperand.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2010-06-28-FastAllocTiedOperand.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2010-06-28-FastAllocTiedOperand.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -O0 -no-integrated-as | FileCheck %s
+; RUN: llc < %s -O0 -no-integrated-as | FileCheck %s
; PR7509
target triple = "i386-apple-darwin10"
%asmtype = type { i32, i8*, i32, i32 }
Modified: llvm/trunk/test/CodeGen/X86/2010-09-17-SideEffectsInChain.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2010-09-17-SideEffectsInChain.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2010-09-17-SideEffectsInChain.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2010-09-17-SideEffectsInChain.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -mcpu=core2 | FileCheck %s
+; RUN: llc < %s -mcpu=core2 | FileCheck %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64-apple-darwin10.4"
Modified: llvm/trunk/test/CodeGen/X86/2010-10-08-cmpxchg8b.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2010-10-08-cmpxchg8b.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2010-10-08-cmpxchg8b.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2010-10-08-cmpxchg8b.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mtriple=i386-apple-darwin | FileCheck %s
+; RUN: llc < %s -mtriple=i386-apple-darwin | FileCheck %s
; PR8297
;
; On i386, i64 cmpxchg is lowered during legalize types to extract the
Modified: llvm/trunk/test/CodeGen/X86/2010-11-09-MOVLPS.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2010-11-09-MOVLPS.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2010-11-09-MOVLPS.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2010-11-09-MOVLPS.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -O0
+; RUN: llc < %s -O0
; PR8211
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64-unknown-linux-gnu"
Modified: llvm/trunk/test/CodeGen/X86/2010-11-18-SelectOfExtload.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2010-11-18-SelectOfExtload.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2010-11-18-SelectOfExtload.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2010-11-18-SelectOfExtload.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mattr=+cmov | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- -mattr=+cmov | FileCheck %s
; Both values were being zero extended.
@u = external global i8
@s = external global i8
Modified: llvm/trunk/test/CodeGen/X86/2011-02-21-VirtRegRewriter-KillSubReg.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2011-02-21-VirtRegRewriter-KillSubReg.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2011-02-21-VirtRegRewriter-KillSubReg.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2011-02-21-VirtRegRewriter-KillSubReg.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -O2 -march=x86 -mtriple=i386-pc-linux-gnu -relocation-model=pic | FileCheck %s
+; RUN: llc < %s -O2 -mtriple=i386-pc-linux-gnu -relocation-model=pic | FileCheck %s
; PR9237: Assertion in VirtRegRewriter.cpp, ResurrectConfirmedKill
; `KillOps[*SR] == KillOp && "invalid subreg kill flags"'
Modified: llvm/trunk/test/CodeGen/X86/2011-03-02-DAGCombiner.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2011-03-02-DAGCombiner.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2011-03-02-DAGCombiner.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2011-03-02-DAGCombiner.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64
+; RUN: llc < %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64-apple-darwin11.0.0"
Modified: llvm/trunk/test/CodeGen/X86/2011-03-30-CreateFixedObjCrash.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2011-03-30-CreateFixedObjCrash.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2011-03-30-CreateFixedObjCrash.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2011-03-30-CreateFixedObjCrash.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86
+; RUN: llc < %s -mtriple=i686--
; rdar://7983260
Modified: llvm/trunk/test/CodeGen/X86/2011-05-09-loaduse.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2011-05-09-loaduse.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2011-05-09-loaduse.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2011-05-09-loaduse.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mcpu=corei7 | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- -mcpu=corei7 | FileCheck %s
;CHECK-LABEL: test:
;CHECK-NOT: pshufd
Modified: llvm/trunk/test/CodeGen/X86/2011-06-01-fildll.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2011-06-01-fildll.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2011-06-01-fildll.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2011-06-01-fildll.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | FileCheck %s
+; RUN: llc < %s | FileCheck %s
; ModuleID = '<stdin>'
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32"
target triple = "i386-apple-macosx10.6.6"
Modified: llvm/trunk/test/CodeGen/X86/2011-06-03-x87chain.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2011-06-03-x87chain.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2011-06-03-x87chain.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2011-06-03-x87chain.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mcpu=generic -march=x86 -mattr=+sse | FileCheck %s
+; RUN: llc < %s -mcpu=generic -mtriple=i686-- -mattr=+sse | FileCheck %s
define float @chainfail1(i64* nocapture %a, i64* nocapture %b, i32 %x, i32 %y, float* nocapture %f) nounwind uwtable noinline ssp {
entry:
Modified: llvm/trunk/test/CodeGen/X86/2011-06-06-fgetsign80bit.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2011-06-06-fgetsign80bit.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2011-06-06-fgetsign80bit.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2011-06-06-fgetsign80bit.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc -march=x86-64 < %s
+; RUN: llc -mtriple=x86_64-- < %s
define i32 @signbitl(x86_fp80 %x) nounwind uwtable readnone {
entry:
%tmp4 = bitcast x86_fp80 %x to i80
Modified: llvm/trunk/test/CodeGen/X86/2011-06-14-PreschedRegalias.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2011-06-14-PreschedRegalias.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2011-06-14-PreschedRegalias.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2011-06-14-PreschedRegalias.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -stress-sched | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- -stress-sched | FileCheck %s
; REQUIRES: asserts
; Test interference between physreg aliases during preRAsched.
; mul wants an operand in AL, but call clobbers it.
Modified: llvm/trunk/test/CodeGen/X86/2011-07-13-BadFrameIndexDisplacement.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2011-07-13-BadFrameIndexDisplacement.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2011-07-13-BadFrameIndexDisplacement.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2011-07-13-BadFrameIndexDisplacement.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc -march=x86-64 < %s -disable-fp-elim | FileCheck %s
+; RUN: llc -mtriple=x86_64-- < %s -disable-fp-elim | FileCheck %s
; This test is checking that we don't crash and we don't incorrectly fold
; a large displacement and a frame index into a single lea.
Modified: llvm/trunk/test/CodeGen/X86/2011-08-23-PerformSubCombine128.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2011-08-23-PerformSubCombine128.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2011-08-23-PerformSubCombine128.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2011-08-23-PerformSubCombine128.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc -march=x86-64 -O2 < %s
+; RUN: llc -mtriple=x86_64-- -O2 < %s
define void @test(i64 %add127.tr.i2686) {
entry:
Modified: llvm/trunk/test/CodeGen/X86/2011-08-23-Trampoline.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2011-08-23-Trampoline.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2011-08-23-Trampoline.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2011-08-23-Trampoline.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=x86
-; RUN: llc < %s -march=x86-64
+; RUN: llc < %s -mtriple=i686--
+; RUN: llc < %s -mtriple=x86_64--
%struct.FRAME.gnat__perfect_hash_generators__select_char_position__build_identical_keys_sets = type { i32, i32, void (i32, i32)*, i8 (i32, i32)* }
Modified: llvm/trunk/test/CodeGen/X86/2011-08-29-BlockConstant.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2011-08-29-BlockConstant.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2011-08-29-BlockConstant.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2011-08-29-BlockConstant.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc -march=x86-64 < %s | FileCheck %s
+; RUN: llc < %s | FileCheck %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64-unknown-linux-gnu"
Modified: llvm/trunk/test/CodeGen/X86/2011-09-14-valcoalesce.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2011-09-14-valcoalesce.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2011-09-14-valcoalesce.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2011-09-14-valcoalesce.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -disable-block-placement | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- -disable-block-placement | FileCheck %s
;
; Test RegistersDefinedFromSameValue. We have multiple copies of the same vreg:
; while.body85.i:
Modified: llvm/trunk/test/CodeGen/X86/2011-09-18-sse2cmp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2011-09-18-sse2cmp.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2011-09-18-sse2cmp.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2011-09-18-sse2cmp.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-;RUN: llc < %s -march=x86 -mcpu=yonah -mattr=+sse2,-sse4.1 | FileCheck %s
+;RUN: llc < %s -mtriple=i686-- -mcpu=yonah -mattr=+sse2,-sse4.1 | FileCheck %s
;CHECK: @max
;CHECK: cmplepd
Modified: llvm/trunk/test/CodeGen/X86/2011-09-21-setcc-bug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2011-09-21-setcc-bug.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2011-09-21-setcc-bug.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2011-09-21-setcc-bug.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -mcpu=corei7 -mattr=+sse4.1
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=corei7 -mattr=+sse4.1
; Make sure we are not crashing on this code.
Modified: llvm/trunk/test/CodeGen/X86/2011-10-18-FastISel-VectorParams.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2011-10-18-FastISel-VectorParams.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2011-10-18-FastISel-VectorParams.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2011-10-18-FastISel-VectorParams.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc -march=x86 -fast-isel -mattr=+sse < %s | FileCheck %s
+; RUN: llc -fast-isel -mattr=+sse < %s | FileCheck %s
; <rdar://problem/10215997>
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32-S128"
target triple = "i386-apple-macosx10.7"
Modified: llvm/trunk/test/CodeGen/X86/2011-10-19-LegelizeLoad.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2011-10-19-LegelizeLoad.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2011-10-19-LegelizeLoad.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2011-10-19-LegelizeLoad.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -mcpu=corei7 | FileCheck %s
+; RUN: llc < %s -mcpu=corei7 | FileCheck %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i8:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
Modified: llvm/trunk/test/CodeGen/X86/2011-10-27-tstore.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2011-10-27-tstore.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2011-10-27-tstore.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2011-10-27-tstore.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -mcpu=corei7 | FileCheck %s
+; RUN: llc < %s -mcpu=corei7 | FileCheck %s
target triple = "x86_64-unknown-linux-gnu"
Modified: llvm/trunk/test/CodeGen/X86/2011-10-30-padd.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2011-10-30-padd.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2011-10-30-padd.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2011-10-30-padd.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mcpu=corei7 | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- -mcpu=corei7 | FileCheck %s
;CHECK-LABEL: addXX_test:
;CHECK: padd
Modified: llvm/trunk/test/CodeGen/X86/2011-11-07-LegalizeBuildVector.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2011-11-07-LegalizeBuildVector.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2011-11-07-LegalizeBuildVector.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2011-11-07-LegalizeBuildVector.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mattr=+avx | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- -mattr=+avx | FileCheck %s
; We don't really care what this outputs; just make sure it's somewhat sane.
; CHECK: legalize_test
Modified: llvm/trunk/test/CodeGen/X86/2011-11-30-or.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2011-11-30-or.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2011-11-30-or.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2011-11-30-or.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -mcpu=corei7 | FileCheck %s
+; RUN: llc < %s -mcpu=corei7 | FileCheck %s
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32"
target triple = "x86_64-apple-macosx10.6.6"
Modified: llvm/trunk/test/CodeGen/X86/2011-12-06-BitcastVectorGlobal.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2011-12-06-BitcastVectorGlobal.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2011-12-06-BitcastVectorGlobal.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2011-12-06-BitcastVectorGlobal.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
; PR11495
; CHECK: 1311768467463790320
Modified: llvm/trunk/test/CodeGen/X86/2011-12-08-AVXISelBugs.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2011-12-08-AVXISelBugs.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2011-12-08-AVXISelBugs.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2011-12-08-AVXISelBugs.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -mcpu=corei7-avx -mattr=+avx
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=corei7-avx -mattr=+avx
; Various missing patterns causing crashes.
; rdar://10538793
Modified: llvm/trunk/test/CodeGen/X86/2011-12-15-vec_shift.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2011-12-15-vec_shift.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2011-12-15-vec_shift.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2011-12-15-vec_shift.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
-; RUN: llc -march=x86-64 -mattr=+sse4.1 -mcpu=penryn < %s | FileCheck %s -check-prefix=CHECK-W-SSE4
-; RUN: llc -march=x86-64 -mattr=-sse4.1 -mcpu=penryn < %s | FileCheck %s -check-prefix=CHECK-WO-SSE4
+; RUN: llc -mattr=+sse4.1 -mcpu=penryn < %s | FileCheck %s -check-prefix=CHECK-W-SSE4
+; RUN: llc -mattr=-sse4.1 -mcpu=penryn < %s | FileCheck %s -check-prefix=CHECK-WO-SSE4
; Test case for r146671
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
target triple = "x86_64-apple-macosx10.7"
Modified: llvm/trunk/test/CodeGen/X86/2012-01-18-vbitcast.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2012-01-18-vbitcast.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2012-01-18-vbitcast.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2012-01-18-vbitcast.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -mcpu=corei7 -mtriple=x86_64-pc-win32 | FileCheck %s
+; RUN: llc < %s -mcpu=corei7 -mtriple=x86_64-pc-win32 | FileCheck %s
;CHECK-LABEL: vcast:
define <2 x i32> @vcast(<2 x float> %a, <2 x float> %b) {
Modified: llvm/trunk/test/CodeGen/X86/2012-02-23-mmx-inlineasm.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2012-02-23-mmx-inlineasm.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2012-02-23-mmx-inlineasm.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2012-02-23-mmx-inlineasm.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc -march=x86 -mcpu=i686 -mattr=+mmx < %s | FileCheck %s
+; RUN: llc -mtriple=i686-- -mcpu=i686 -mattr=+mmx < %s | FileCheck %s
; <rdar://problem/10106006>
define void @func() nounwind ssp {
Modified: llvm/trunk/test/CodeGen/X86/2012-07-10-shufnorm.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2012-07-10-shufnorm.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2012-07-10-shufnorm.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2012-07-10-shufnorm.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mcpu=corei7 -mattr=+avx | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- -mcpu=corei7 -mattr=+avx | FileCheck %s
; CHECK: ocl
define void @ocl() {
Modified: llvm/trunk/test/CodeGen/X86/2012-07-15-BuildVectorPromote.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2012-07-15-BuildVectorPromote.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2012-07-15-BuildVectorPromote.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2012-07-15-BuildVectorPromote.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mcpu=corei7
+; RUN: llc < %s -mtriple=i686-- -mcpu=corei7
; We don't care about the output, just that it doesn't crash
define <1 x i1> @buildvec_promote() {
Modified: llvm/trunk/test/CodeGen/X86/2012-07-15-broadcastfold.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2012-07-15-broadcastfold.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2012-07-15-broadcastfold.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2012-07-15-broadcastfold.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mcpu=corei7 -mattr=+avx2 | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- -mcpu=corei7 -mattr=+avx2 | FileCheck %s
declare x86_fastcallcc i64 @barrier()
Modified: llvm/trunk/test/CodeGen/X86/2012-07-15-tconst_shl.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2012-07-15-tconst_shl.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2012-07-15-tconst_shl.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2012-07-15-tconst_shl.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -mcpu=corei7 -mattr=+avx2
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=corei7 -mattr=+avx2
; make sure that we are not crashing.
define <16 x i32> @autogen_SD34717() {
Modified: llvm/trunk/test/CodeGen/X86/2012-07-15-vshl.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2012-07-15-vshl.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2012-07-15-vshl.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2012-07-15-vshl.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mcpu=corei7 -mattr=+avx
+; RUN: llc < %s -mtriple=i686-- -mcpu=corei7 -mattr=+avx
; PR13352
declare <8 x float> @llvm.x86.avx.blendv.ps.256(<8 x float>, <8 x float>, <8 x float>) nounwind readnone
Modified: llvm/trunk/test/CodeGen/X86/2012-07-16-LeaUndef.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2012-07-16-LeaUndef.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2012-07-16-LeaUndef.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2012-07-16-LeaUndef.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -mcpu=corei7
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=corei7
define void @autogen_SD2543() {
A:
Modified: llvm/trunk/test/CodeGen/X86/2012-07-16-fp2ui-i1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2012-07-16-fp2ui-i1.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2012-07-16-fp2ui-i1.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2012-07-16-fp2ui-i1.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -mcpu=corei7
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=corei7
define void @autogen_SD3100() {
BB:
Modified: llvm/trunk/test/CodeGen/X86/2012-07-17-vtrunc.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2012-07-17-vtrunc.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2012-07-17-vtrunc.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2012-07-17-vtrunc.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -mcpu=corei7
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=corei7
define void @autogen_SD33189483() {
BB:
Modified: llvm/trunk/test/CodeGen/X86/2012-07-23-select_cc.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2012-07-23-select_cc.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2012-07-23-select_cc.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2012-07-23-select_cc.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -mcpu=corei7
+; RUN: llc < %s -mcpu=corei7
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
Modified: llvm/trunk/test/CodeGen/X86/2012-09-13-dagco-fneg.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2012-09-13-dagco-fneg.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2012-09-13-dagco-fneg.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2012-09-13-dagco-fneg.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc -march=x86-64 -mcpu=corei7 < %s | FileCheck %s
+; RUN: llc -mcpu=corei7 < %s | FileCheck %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
target triple = "x86_64-apple-macosx10.8.0"
Modified: llvm/trunk/test/CodeGen/X86/2012-10-18-crash-dagco.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2012-10-18-crash-dagco.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2012-10-18-crash-dagco.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2012-10-18-crash-dagco.ll Tue Aug 1 17:28:10 2017
@@ -1,9 +1,9 @@
-; RUN: llc -march=x86-64 -mcpu=corei7 -disable-cgp-select2branch < %s
+; RUN: llc -mcpu=corei7 -disable-cgp-select2branch < %s
; We should not crash on this test.
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32"
-target triple = "i386-apple-darwin9.0.0"
+target triple = "x86_64-apple-darwin9.0.0"
@global = external constant [411 x i8], align 1
Modified: llvm/trunk/test/CodeGen/X86/2012-11-28-merge-store-alias.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2012-11-28-merge-store-alias.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2012-11-28-merge-store-alias.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2012-11-28-merge-store-alias.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -mcpu=corei7 -mtriple=x86_64-pc-win64 | FileCheck %s
+; RUN: llc < %s -mcpu=corei7 -mtriple=x86_64-pc-win64 | FileCheck %s
; CHECK: merge_stores_can
; CHECK: callq foo
Modified: llvm/trunk/test/CodeGen/X86/2012-12-1-merge-multiple.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2012-12-1-merge-multiple.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2012-12-1-merge-multiple.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2012-12-1-merge-multiple.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -mcpu=corei7 -mtriple=x86_64-pc-win64 | FileCheck %s
+; RUN: llc < %s -mcpu=corei7 -mtriple=x86_64-pc-win64 | FileCheck %s
; CHECK: multiple_stores_on_chain
; CHECK: movabsq
Modified: llvm/trunk/test/CodeGen/X86/2012-12-12-DAGCombineCrash.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2012-12-12-DAGCombineCrash.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2012-12-12-DAGCombineCrash.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2012-12-12-DAGCombineCrash.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc -march=x86 -mtriple=i686-apple-ios -mcpu=yonah < %s
+; RUN: llc -mtriple=i686-apple-ios -mcpu=yonah < %s
; rdar://12868039
define void @t() nounwind ssp {
Modified: llvm/trunk/test/CodeGen/X86/2012-12-14-v8fp80-crash.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2012-12-14-v8fp80-crash.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2012-12-14-v8fp80-crash.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2012-12-14-v8fp80-crash.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mcpu=corei7 -mtriple=i686-pc-win32
+; RUN: llc < %s -mcpu=corei7 -mtriple=i686-pc-win32
; Make sure we don't crash on this testcase.
Modified: llvm/trunk/test/CodeGen/X86/2013-05-06-ConactVectorCrash.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2013-05-06-ConactVectorCrash.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2013-05-06-ConactVectorCrash.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2013-05-06-ConactVectorCrash.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86
+; RUN: llc < %s
; Make sure this doesn't crash
Modified: llvm/trunk/test/CodeGen/X86/2014-05-29-factorial.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2014-05-29-factorial.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2014-05-29-factorial.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2014-05-29-factorial.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
; CHECK: decq [[X:%rdi|%rcx]]
; CHECK-NOT: testq [[X]], [[X]]
Modified: llvm/trunk/test/CodeGen/X86/3dnow-intrinsics.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/3dnow-intrinsics.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/3dnow-intrinsics.ll (original)
+++ llvm/trunk/test/CodeGen/X86/3dnow-intrinsics.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mattr=+3dnow | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- -mattr=+3dnow | FileCheck %s
define <8 x i8> @test_pavgusb(x86_mmx %a.coerce, x86_mmx %b.coerce) nounwind readnone {
; CHECK: pavgusb
Modified: llvm/trunk/test/CodeGen/X86/4char-promote.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/4char-promote.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/4char-promote.ll (original)
+++ llvm/trunk/test/CodeGen/X86/4char-promote.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
; A test for checking PR 9623
-; RUN: llc -march=x86-64 -mcpu=corei7 < %s | FileCheck %s
+; RUN: llc -mcpu=corei7 < %s | FileCheck %s
target triple = "x86_64-apple-darwin"
Modified: llvm/trunk/test/CodeGen/X86/AppendingLinkage.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/AppendingLinkage.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/AppendingLinkage.ll (original)
+++ llvm/trunk/test/CodeGen/X86/AppendingLinkage.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: not llc < %s -march=x86 2>&1 | FileCheck %s
+; RUN: not llc < %s -mtriple=i686-- 2>&1 | FileCheck %s
; CHECK: unknown special variable
@foo = appending constant [1 x i32 ]zeroinitializer
Modified: llvm/trunk/test/CodeGen/X86/Atomics-64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/Atomics-64.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/Atomics-64.ll (original)
+++ llvm/trunk/test/CodeGen/X86/Atomics-64.ll Tue Aug 1 17:28:10 2017
@@ -1,7 +1,6 @@
-; RUN: llc < %s -march=x86-64 > %t.x86-64
-; RUN: llc < %s -march=x86 -mattr=cx16 > %t.x86
+; RUN: llc < %s -mtriple=x86_64-apple-darwin8 > %t.x86-64
+; RUN: llc < %s -mtriple=i686-apple-darwin8 -mattr=cx16 > %t.x86
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
-target triple = "x86_64-apple-darwin8"
@sc = common global i8 0
@uc = common global i8 0
Modified: llvm/trunk/test/CodeGen/X86/DbgValueOtherTargets.test
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/DbgValueOtherTargets.test?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/DbgValueOtherTargets.test (original)
+++ llvm/trunk/test/CodeGen/X86/DbgValueOtherTargets.test Tue Aug 1 17:28:10 2017
@@ -1,2 +1,2 @@
-RUN: llc -O0 -march=x86 -asm-verbose < %S/../Inputs/DbgValueOtherTargets.ll | FileCheck %S/../Inputs/DbgValueOtherTargets.ll
-RUN: llc -O0 -march=x86-64 -asm-verbose < %S/../Inputs/DbgValueOtherTargets.ll | FileCheck %S/../Inputs/DbgValueOtherTargets.ll
+RUN: llc -O0 -mtriple=i686-- -asm-verbose < %S/../Inputs/DbgValueOtherTargets.ll | FileCheck %S/../Inputs/DbgValueOtherTargets.ll
+RUN: llc -O0 -mtriple=x86_64-- -asm-verbose < %S/../Inputs/DbgValueOtherTargets.ll | FileCheck %S/../Inputs/DbgValueOtherTargets.ll
Modified: llvm/trunk/test/CodeGen/X86/SwitchLowering.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/SwitchLowering.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/SwitchLowering.ll (original)
+++ llvm/trunk/test/CodeGen/X86/SwitchLowering.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | grep cmp | count 1
+; RUN: llc < %s -mtriple=i686-- | grep cmp | count 1
; PR964
define i8* @FindChar(i8* %CurPtr) {
Modified: llvm/trunk/test/CodeGen/X86/TruncAssertZext.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/TruncAssertZext.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/TruncAssertZext.ll (original)
+++ llvm/trunk/test/CodeGen/X86/TruncAssertZext.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -O2 -march=x86-64 | FileCheck %s
+; RUN: llc < %s -O2 -mtriple=x86_64-- | FileCheck %s
; Checks that a zeroing mov is inserted for the trunc/zext pair even when
; the source of the zext is an AssertSext node
; PR20494
Modified: llvm/trunk/test/CodeGen/X86/abi-isel.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/abi-isel.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/abi-isel.ll (original)
+++ llvm/trunk/test/CodeGen/X86/abi-isel.ll Tue Aug 1 17:28:10 2017
@@ -1,16 +1,16 @@
-; RUN: llc < %s -asm-verbose=0 -mcpu=generic -mtriple=i686-unknown-linux-gnu -march=x86 -relocation-model=static -code-model=small -pre-RA-sched=list-ilp | FileCheck %s -check-prefix=LINUX-32-STATIC
-; RUN: llc < %s -asm-verbose=0 -mcpu=generic -mtriple=i686-unknown-linux-gnu -march=x86 -relocation-model=static -code-model=small -pre-RA-sched=list-ilp | FileCheck %s -check-prefix=LINUX-32-PIC
+; RUN: llc < %s -asm-verbose=0 -mcpu=generic -mtriple=i686-unknown-linux-gnu -relocation-model=static -code-model=small -pre-RA-sched=list-ilp | FileCheck %s -check-prefix=LINUX-32-STATIC
+; RUN: llc < %s -asm-verbose=0 -mcpu=generic -mtriple=i686-unknown-linux-gnu -relocation-model=static -code-model=small -pre-RA-sched=list-ilp | FileCheck %s -check-prefix=LINUX-32-PIC
-; RUN: llc < %s -asm-verbose=0 -mcpu=generic -mtriple=x86_64-unknown-linux-gnu -march=x86-64 -relocation-model=static -code-model=small -pre-RA-sched=list-ilp | FileCheck %s -check-prefix=LINUX-64-STATIC
-; RUN: llc < %s -asm-verbose=0 -mcpu=generic -mtriple=x86_64-unknown-linux-gnu -march=x86-64 -relocation-model=pic -code-model=small -pre-RA-sched=list-ilp | FileCheck %s -check-prefix=LINUX-64-PIC
+; RUN: llc < %s -asm-verbose=0 -mcpu=generic -mtriple=x86_64-unknown-linux-gnu -relocation-model=static -code-model=small -pre-RA-sched=list-ilp | FileCheck %s -check-prefix=LINUX-64-STATIC
+; RUN: llc < %s -asm-verbose=0 -mcpu=generic -mtriple=x86_64-unknown-linux-gnu -relocation-model=pic -code-model=small -pre-RA-sched=list-ilp | FileCheck %s -check-prefix=LINUX-64-PIC
-; RUN: llc < %s -asm-verbose=0 -mcpu=generic -mtriple=i686-apple-darwin -march=x86 -relocation-model=static -code-model=small -pre-RA-sched=list-ilp | FileCheck %s -check-prefix=DARWIN-32-STATIC
-; RUN: llc < %s -asm-verbose=0 -mcpu=generic -mtriple=i686-apple-darwin9 -march=x86 -relocation-model=dynamic-no-pic -code-model=small -pre-RA-sched=list-ilp | FileCheck %s -check-prefix=DARWIN-32-DYNAMIC
-; RUN: llc < %s -asm-verbose=0 -mcpu=generic -mtriple=i686-apple-darwin9 -march=x86 -relocation-model=pic -code-model=small -pre-RA-sched=list-ilp | FileCheck %s -check-prefix=DARWIN-32-PIC
+; RUN: llc < %s -asm-verbose=0 -mcpu=generic -mtriple=i686-apple-darwin -relocation-model=static -code-model=small -pre-RA-sched=list-ilp | FileCheck %s -check-prefix=DARWIN-32-STATIC
+; RUN: llc < %s -asm-verbose=0 -mcpu=generic -mtriple=i686-apple-darwin9 -relocation-model=dynamic-no-pic -code-model=small -pre-RA-sched=list-ilp | FileCheck %s -check-prefix=DARWIN-32-DYNAMIC
+; RUN: llc < %s -asm-verbose=0 -mcpu=generic -mtriple=i686-apple-darwin9 -relocation-model=pic -code-model=small -pre-RA-sched=list-ilp | FileCheck %s -check-prefix=DARWIN-32-PIC
-; RUN: llc < %s -asm-verbose=0 -mcpu=generic -mtriple=x86_64-apple-darwin -march=x86-64 -relocation-model=static -code-model=small -pre-RA-sched=list-ilp | FileCheck %s -check-prefix=DARWIN-64-STATIC
-; RUN: llc < %s -asm-verbose=0 -mcpu=generic -mtriple=x86_64-apple-darwin -march=x86-64 -relocation-model=dynamic-no-pic -code-model=small -pre-RA-sched=list-ilp | FileCheck %s -check-prefix=DARWIN-64-DYNAMIC
-; RUN: llc < %s -asm-verbose=0 -mcpu=generic -mtriple=x86_64-apple-darwin -march=x86-64 -relocation-model=pic -code-model=small -pre-RA-sched=list-ilp | FileCheck %s -check-prefix=DARWIN-64-PIC
+; RUN: llc < %s -asm-verbose=0 -mcpu=generic -mtriple=x86_64-apple-darwin -relocation-model=static -code-model=small -pre-RA-sched=list-ilp | FileCheck %s -check-prefix=DARWIN-64-STATIC
+; RUN: llc < %s -asm-verbose=0 -mcpu=generic -mtriple=x86_64-apple-darwin -relocation-model=dynamic-no-pic -code-model=small -pre-RA-sched=list-ilp | FileCheck %s -check-prefix=DARWIN-64-DYNAMIC
+; RUN: llc < %s -asm-verbose=0 -mcpu=generic -mtriple=x86_64-apple-darwin -relocation-model=pic -code-model=small -pre-RA-sched=list-ilp | FileCheck %s -check-prefix=DARWIN-64-PIC
@src = external global [131072 x i32]
@dst = external global [131072 x i32]
Modified: llvm/trunk/test/CodeGen/X86/add.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/add.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/add.ll (original)
+++ llvm/trunk/test/CodeGen/X86/add.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mcpu=generic -march=x86 | FileCheck %s -check-prefix=X32
+; RUN: llc < %s -mcpu=generic -mtriple=i686-- | FileCheck %s -check-prefix=X32
; RUN: llc < %s -mcpu=generic -mtriple=x86_64-linux | FileCheck %s -check-prefix=X64
; RUN: llc < %s -mcpu=generic -mtriple=x86_64-win32 | FileCheck %s -check-prefix=X64
Modified: llvm/trunk/test/CodeGen/X86/add_shl_constant.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/add_shl_constant.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/add_shl_constant.ll (original)
+++ llvm/trunk/test/CodeGen/X86/add_shl_constant.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc -march=x86-64 -mtriple=x86_64-apple-darwin < %s | FileCheck %s
+; RUN: llc -mtriple=x86_64-apple-darwin < %s | FileCheck %s
; CHECK-LABEL: add_shl_add_constant_1_i32
; CHECK: leal 984(%rsi,%rdi,8), %eax
Modified: llvm/trunk/test/CodeGen/X86/addr-of-ret-addr.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/addr-of-ret-addr.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/addr-of-ret-addr.ll (original)
+++ llvm/trunk/test/CodeGen/X86/addr-of-ret-addr.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
-; RUN: llc < %s -disable-fp-elim -march=x86 | FileCheck %s --check-prefix=CHECK-X86
-; RUN: llc < %s -disable-fp-elim -march=x86-64 | FileCheck %s --check-prefix=CHECK-X64
+; RUN: llc < %s -disable-fp-elim -mtriple=i686-- | FileCheck %s --check-prefix=CHECK-X86
+; RUN: llc < %s -disable-fp-elim -mtriple=x86_64-- | FileCheck %s --check-prefix=CHECK-X64
define i8* @f() nounwind readnone optsize {
entry:
Modified: llvm/trunk/test/CodeGen/X86/aligned-comm.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/aligned-comm.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/aligned-comm.ll (original)
+++ llvm/trunk/test/CodeGen/X86/aligned-comm.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86
+; RUN: llc < %s -mtriple=i686--
; RUN: llc < %s -mtriple=i386-apple-darwin10 | grep "array,16512,7"
; RUN: llc < %s -mtriple=i386-apple-darwin9 | grep "array,16512,7"
Modified: llvm/trunk/test/CodeGen/X86/alloca-align-rounding-32.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/alloca-align-rounding-32.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/alloca-align-rounding-32.ll (original)
+++ llvm/trunk/test/CodeGen/X86/alloca-align-rounding-32.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mtriple=i686-apple-darwin | FileCheck %s
+; RUN: llc < %s -mtriple=i686-apple-darwin | FileCheck %s
declare void @bar(<2 x i64>* %n)
Modified: llvm/trunk/test/CodeGen/X86/alloca-align-rounding.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/alloca-align-rounding.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/alloca-align-rounding.ll (original)
+++ llvm/trunk/test/CodeGen/X86/alloca-align-rounding.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=x86-64 -mtriple=i686-pc-linux -enable-misched=false | FileCheck %s
-; RUN: llc < %s -march=x86-64 -mtriple=x86_64-pc-linux-gnux32 -enable-misched=false | FileCheck %s -check-prefix=X32ABI
+; RUN: llc < %s -mtriple=x86_64-pc-linux -enable-misched=false | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-pc-linux-gnux32 -enable-misched=false | FileCheck %s -check-prefix=X32ABI
declare void @bar(<2 x i64>* %n)
Modified: llvm/trunk/test/CodeGen/X86/and-su.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/and-su.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/and-su.ll (original)
+++ llvm/trunk/test/CodeGen/X86/and-su.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- | FileCheck %s
; Don't duplicate the load.
Modified: llvm/trunk/test/CodeGen/X86/andimm8.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/andimm8.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/andimm8.ll (original)
+++ llvm/trunk/test/CodeGen/X86/andimm8.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -mtriple=x86_64-pc-linux-gnu -show-mc-encoding | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-pc-linux-gnu -show-mc-encoding | FileCheck %s
; PR8365
; CHECK: andl $-64, %edi # encoding: [0x83,0xe7,0xc0]
Modified: llvm/trunk/test/CodeGen/X86/asm-global-imm.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/asm-global-imm.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/asm-global-imm.ll (original)
+++ llvm/trunk/test/CodeGen/X86/asm-global-imm.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -relocation-model=static -no-integrated-as | FileCheck %s
+; RUN: llc < %s -relocation-model=static -no-integrated-as | FileCheck %s
; PR882
target datalayout = "e-p:32:32"
Modified: llvm/trunk/test/CodeGen/X86/asm-modifier-P.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/asm-modifier-P.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/asm-modifier-P.ll (original)
+++ llvm/trunk/test/CodeGen/X86/asm-modifier-P.ll Tue Aug 1 17:28:10 2017
@@ -1,12 +1,11 @@
-; RUN: llc < %s -march=x86 -mtriple=i686-unknown-linux-gnu -relocation-model=pic | FileCheck %s -check-prefix=CHECK-PIC-32
-; RUN: llc < %s -march=x86 -mtriple=i686-unknown-linux-gnu -relocation-model=static | FileCheck %s -check-prefix=CHECK-STATIC-32
-; RUN: llc < %s -march=x86-64 -relocation-model=static | FileCheck %s -check-prefix=CHECK-STATIC-64
-; RUN: llc < %s -march=x86-64 -relocation-model=pic | FileCheck %s -check-prefix=CHECK-PIC-64
+; RUN: llc < %s -mtriple=i686-unknown-linux-gnu -relocation-model=pic | FileCheck %s -check-prefix=CHECK-PIC-32
+; RUN: llc < %s -mtriple=i686-unknown-linux-gnu -relocation-model=static | FileCheck %s -check-prefix=CHECK-STATIC-32
+; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -relocation-model=static | FileCheck %s -check-prefix=CHECK-STATIC-64
+; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -relocation-model=pic | FileCheck %s -check-prefix=CHECK-PIC-64
; PR3379
; XFAIL: *
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
-target triple = "x86_64-unknown-linux-gnu"
@G = external global i32 ; <i32*> [#uses=1]
declare void @bar(...)
Modified: llvm/trunk/test/CodeGen/X86/atom-cmpb.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/atom-cmpb.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/atom-cmpb.ll (original)
+++ llvm/trunk/test/CodeGen/X86/atom-cmpb.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mcpu=atom | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- -mcpu=atom | FileCheck %s
; CHECK: movl
; CHECK: movb
; CHECK: movb
Modified: llvm/trunk/test/CodeGen/X86/atom-sched.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/atom-sched.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/atom-sched.ll (original)
+++ llvm/trunk/test/CodeGen/X86/atom-sched.ll Tue Aug 1 17:28:10 2017
@@ -1,7 +1,7 @@
-; RUN: llc <%s -O2 -mcpu=atom -march=x86 -relocation-model=static | FileCheck -check-prefix=atom %s
-; RUN: llc <%s -O2 -mcpu=slm -march=x86 -relocation-model=static | FileCheck -check-prefix=slm %s
-; RUN: llc <%s -O2 -mcpu=goldmont -march=x86 -relocation-model=static | FileCheck -check-prefix=slm %s
-; RUN: llc <%s -O2 -mcpu=core2 -march=x86 -relocation-model=static | FileCheck %s
+; RUN: llc <%s -O2 -mcpu=atom -mtriple=i686-- -relocation-model=static | FileCheck -check-prefix=atom %s
+; RUN: llc <%s -O2 -mcpu=slm -mtriple=i686-- -relocation-model=static | FileCheck -check-prefix=slm %s
+; RUN: llc <%s -O2 -mcpu=goldmont -mtriple=i686-- -relocation-model=static | FileCheck -check-prefix=slm %s
+; RUN: llc <%s -O2 -mcpu=core2 -mtriple=i686-- -relocation-model=static | FileCheck %s
;
@a = common global i32 0, align 4
Modified: llvm/trunk/test/CodeGen/X86/atomic-dagsched.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/atomic-dagsched.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/atomic-dagsched.ll (original)
+++ llvm/trunk/test/CodeGen/X86/atomic-dagsched.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -mcpu=corei7 -verify-machineinstrs | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=corei7 -verify-machineinstrs | FileCheck %s
define void @test(i8** %a, i64* %b, i64 %c, i64 %d) nounwind {
entry:
Modified: llvm/trunk/test/CodeGen/X86/atomic-load-store-wide.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/atomic-load-store-wide.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/atomic-load-store-wide.ll (original)
+++ llvm/trunk/test/CodeGen/X86/atomic-load-store-wide.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mcpu=corei7 -march=x86 -verify-machineinstrs | FileCheck %s
+; RUN: llc < %s -mcpu=corei7 -mtriple=i686-- -verify-machineinstrs | FileCheck %s
; 64-bit load/store on x86-32
; FIXME: The generated code can be substantially improved.
Modified: llvm/trunk/test/CodeGen/X86/atomic-minmax-i6432.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/atomic-minmax-i6432.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/atomic-minmax-i6432.ll (original)
+++ llvm/trunk/test/CodeGen/X86/atomic-minmax-i6432.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
-; RUN: llc -march=x86 -mattr=+cmov,cx16 -mtriple=i386-pc-linux -verify-machineinstrs < %s | FileCheck %s -check-prefix=LINUX
-; RUN: llc -march=x86 -mattr=cx16 -mtriple=i386-macosx -relocation-model=pic -verify-machineinstrs < %s | FileCheck %s -check-prefix=PIC
+; RUN: llc -mattr=+cmov,cx16 -mtriple=i386-pc-linux -verify-machineinstrs < %s | FileCheck %s -check-prefix=LINUX
+; RUN: llc -mattr=cx16 -mtriple=i386-macosx -relocation-model=pic -verify-machineinstrs < %s | FileCheck %s -check-prefix=PIC
@sc64 = external global i64
Modified: llvm/trunk/test/CodeGen/X86/atomic-or.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/atomic-or.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/atomic-or.ll (original)
+++ llvm/trunk/test/CodeGen/X86/atomic-or.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -verify-machineinstrs | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- -verify-machineinstrs | FileCheck %s
; rdar://9692967
Modified: llvm/trunk/test/CodeGen/X86/atomic32.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/atomic32.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/atomic32.ll (original)
+++ llvm/trunk/test/CodeGen/X86/atomic32.ll Tue Aug 1 17:28:10 2017
@@ -1,6 +1,6 @@
-; RUN: llc < %s -O0 -march=x86-64 -mcpu=corei7 -verify-machineinstrs | FileCheck %s -check-prefix=WITH-CMOV
-; RUN: llc < %s -O0 -march=x86 -mcpu=corei7 -verify-machineinstrs | FileCheck %s -check-prefix=WITH-CMOV
-; RUN: llc < %s -O0 -march=x86 -mcpu=corei7 -mattr=-cmov -verify-machineinstrs | FileCheck %s --check-prefix NOCMOV
+; RUN: llc < %s -O0 -mtriple=x86_64-- -mcpu=corei7 -verify-machineinstrs | FileCheck %s -check-prefix=WITH-CMOV
+; RUN: llc < %s -O0 -mtriple=i686-- -mcpu=corei7 -verify-machineinstrs | FileCheck %s -check-prefix=WITH-CMOV
+; RUN: llc < %s -O0 -mtriple=i686-- -mcpu=corei7 -mattr=-cmov -verify-machineinstrs | FileCheck %s --check-prefix NOCMOV
@sc32 = external global i32
Modified: llvm/trunk/test/CodeGen/X86/atomic64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/atomic64.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/atomic64.ll (original)
+++ llvm/trunk/test/CodeGen/X86/atomic64.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -O0 -march=x86-64 -mcpu=corei7 -verify-machineinstrs | FileCheck %s --check-prefix X64
+; RUN: llc < %s -O0 -mtriple=x86_64-- -mcpu=corei7 -verify-machineinstrs | FileCheck %s --check-prefix X64
@sc64 = external global i64
Modified: llvm/trunk/test/CodeGen/X86/atomic6432.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/atomic6432.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/atomic6432.ll (original)
+++ llvm/trunk/test/CodeGen/X86/atomic6432.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -O0 -march=x86 -mcpu=corei7 -verify-machineinstrs | FileCheck %s --check-prefix X32
+; RUN: llc < %s -O0 -mtriple=i686-- -mcpu=corei7 -verify-machineinstrs | FileCheck %s --check-prefix X32
@sc64 = external global i64
Modified: llvm/trunk/test/CodeGen/X86/atomic8.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/atomic8.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/atomic8.ll (original)
+++ llvm/trunk/test/CodeGen/X86/atomic8.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
-; RUN: llc < %s -O0 -march=x86-64 -mcpu=corei7 -verify-machineinstrs | FileCheck %s --check-prefix X64
-; RUN: llc < %s -O0 -march=x86 -mcpu=corei7 -verify-machineinstrs | FileCheck %s --check-prefix X32
+; RUN: llc < %s -O0 -mtriple=x86_64-- -mcpu=corei7 -verify-machineinstrs | FileCheck %s --check-prefix X64
+; RUN: llc < %s -O0 -mtriple=i686-- -mcpu=corei7 -verify-machineinstrs | FileCheck %s --check-prefix X32
@sc8 = external global i8
Modified: llvm/trunk/test/CodeGen/X86/atomic_add.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/atomic_add.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/atomic_add.ll (original)
+++ llvm/trunk/test/CodeGen/X86/atomic_add.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=x86-64 -verify-machineinstrs | FileCheck %s
-; RUN: llc < %s -march=x86-64 -mattr=slow-incdec -verify-machineinstrs | FileCheck %s --check-prefix SLOW_INC
+; RUN: llc < %s -mtriple=x86_64-- -verify-machineinstrs | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- -mattr=slow-incdec -verify-machineinstrs | FileCheck %s --check-prefix SLOW_INC
; rdar://7103704
Modified: llvm/trunk/test/CodeGen/X86/atomic_idempotent.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/atomic_idempotent.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/atomic_idempotent.ll (original)
+++ llvm/trunk/test/CodeGen/X86/atomic_idempotent.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=x86-64 -verify-machineinstrs | FileCheck %s --check-prefix=CHECK --check-prefix=X64
-; RUN: llc < %s -march=x86 -mattr=+sse2 -verify-machineinstrs | FileCheck %s --check-prefix=CHECK --check-prefix=X32
+; RUN: llc < %s -mtriple=x86_64-- -verify-machineinstrs | FileCheck %s --check-prefix=CHECK --check-prefix=X64
+; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 -verify-machineinstrs | FileCheck %s --check-prefix=CHECK --check-prefix=X32
; On x86, an atomic rmw operation that does not modify the value in memory
; (such as atomic add 0) can be replaced by an mfence followed by a mov.
Modified: llvm/trunk/test/CodeGen/X86/atomic_op.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/atomic_op.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/atomic_op.ll (original)
+++ llvm/trunk/test/CodeGen/X86/atomic_op.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mcpu=generic -march=x86 -mattr=+cmov,cx16 -verify-machineinstrs | FileCheck %s
+; RUN: llc < %s -mcpu=generic -mtriple=i686-- -mattr=+cmov,cx16 -verify-machineinstrs | FileCheck %s
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
Modified: llvm/trunk/test/CodeGen/X86/avoid-loop-align-2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avoid-loop-align-2.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/avoid-loop-align-2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/avoid-loop-align-2.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | grep align | count 4
+; RUN: llc < %s -mtriple=i686-- | grep align | count 4
; TODO: Is it a good idea to align inner loops? It's hard to know without
; knowing what their trip counts are, or other dynamic information. For
Modified: llvm/trunk/test/CodeGen/X86/avx-minmax.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx-minmax.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/avx-minmax.ll (original)
+++ llvm/trunk/test/CodeGen/X86/avx-minmax.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -mattr=+avx -asm-verbose=false -enable-unsafe-fp-math -enable-no-nans-fp-math | FileCheck -check-prefix=UNSAFE %s
+; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx -asm-verbose=false -enable-unsafe-fp-math -enable-no-nans-fp-math | FileCheck -check-prefix=UNSAFE %s
; UNSAFE-LABEL: maxpd:
; UNSAFE: vmaxpd {{.+}}, %xmm
Modified: llvm/trunk/test/CodeGen/X86/avx512-bugfix-23634.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx512-bugfix-23634.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/avx512-bugfix-23634.ll (original)
+++ llvm/trunk/test/CodeGen/X86/avx512-bugfix-23634.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -march=x86-64 -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
Modified: llvm/trunk/test/CodeGen/X86/avx512-build-vector.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx512-build-vector.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/avx512-build-vector.ll (original)
+++ llvm/trunk/test/CodeGen/X86/avx512-build-vector.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -march=x86-64 -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s
define <16 x i32> @test2(<16 x i32> %x) {
; CHECK-LABEL: test2:
Modified: llvm/trunk/test/CodeGen/X86/avx512-inc-dec.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx512-inc-dec.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/avx512-inc-dec.ll (original)
+++ llvm/trunk/test/CodeGen/X86/avx512-inc-dec.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s
;CHECK-LABEL: test
;CHECK-NOT: dec
Modified: llvm/trunk/test/CodeGen/X86/avx512-insert-extract.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx512-insert-extract.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/avx512-insert-extract.ll (original)
+++ llvm/trunk/test/CodeGen/X86/avx512-insert-extract.ll Tue Aug 1 17:28:10 2017
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -march=x86-64 -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck --check-prefix=CHECK --check-prefix=KNL %s
-; RUN: llc < %s -march=x86-64 -mtriple=x86_64-apple-darwin -mcpu=skx | FileCheck --check-prefix=CHECK --check-prefix=SKX --check-prefix=SKX_ONLY %s
-; RUN: llc < %s -march=x86-64 -mtriple=x86_64-apple-darwin -mcpu=skx -mattr=avx512vbmi | FileCheck --check-prefix=CHECK --check-prefix=SKX --check-prefix=SKX_VBMI %s
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck --check-prefix=CHECK --check-prefix=KNL %s
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=skx | FileCheck --check-prefix=CHECK --check-prefix=SKX --check-prefix=SKX_ONLY %s
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=skx -mattr=avx512vbmi | FileCheck --check-prefix=CHECK --check-prefix=SKX --check-prefix=SKX_VBMI %s
define <16 x float> @test1(<16 x float> %x, float* %br, float %y) nounwind {
; CHECK-LABEL: test1:
Modified: llvm/trunk/test/CodeGen/X86/avx512-insert-extract_i1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx512-insert-extract_i1.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/avx512-insert-extract_i1.ll (original)
+++ llvm/trunk/test/CodeGen/X86/avx512-insert-extract_i1.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -march=x86-64 -mtriple=x86_64-apple-darwin -mcpu=skx | FileCheck --check-prefix=SKX --check-prefix=SKX_ONLY %s
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=skx | FileCheck --check-prefix=SKX --check-prefix=SKX_ONLY %s
; TODO - fix fail on KNL and move this test to avx512-insert-extract.ll
Modified: llvm/trunk/test/CodeGen/X86/avx512-mask-op.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx512-mask-op.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/avx512-mask-op.ll (original)
+++ llvm/trunk/test/CodeGen/X86/avx512-mask-op.ll Tue Aug 1 17:28:10 2017
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -stack-symbol-ordering=0 -march=x86-64 -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s --check-prefix=CHECK --check-prefix=KNL
-; RUN: llc < %s -stack-symbol-ordering=0 -march=x86-64 -mtriple=x86_64-apple-darwin -mcpu=skx | FileCheck %s --check-prefix=CHECK --check-prefix=SKX
-; RUN: llc < %s -stack-symbol-ordering=0 -march=x86-64 -mtriple=x86_64-apple-darwin -mattr=+avx512bw | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512BW
-; RUN: llc < %s -stack-symbol-ordering=0 -march=x86-64 -mtriple=x86_64-apple-darwin -mattr=+avx512dq | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512DQ
+; RUN: llc < %s -stack-symbol-ordering=0 -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s --check-prefix=CHECK --check-prefix=KNL
+; RUN: llc < %s -stack-symbol-ordering=0 -mtriple=x86_64-apple-darwin -mcpu=skx | FileCheck %s --check-prefix=CHECK --check-prefix=SKX
+; RUN: llc < %s -stack-symbol-ordering=0 -mtriple=x86_64-apple-darwin -mattr=+avx512bw | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512BW
+; RUN: llc < %s -stack-symbol-ordering=0 -mtriple=x86_64-apple-darwin -mattr=+avx512dq | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512DQ
define i16 @mask16(i16 %x) {
Modified: llvm/trunk/test/CodeGen/X86/avx512-mov.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx512-mov.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/avx512-mov.ll (original)
+++ llvm/trunk/test/CodeGen/X86/avx512-mov.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -march=x86-64 -mtriple=x86_64-apple-darwin -mcpu=knl --show-mc-encoding| FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl --show-mc-encoding| FileCheck %s
define i32 @test1(float %x) {
; CHECK-LABEL: test1:
Modified: llvm/trunk/test/CodeGen/X86/avx512-nontemporal.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx512-nontemporal.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/avx512-nontemporal.ll (original)
+++ llvm/trunk/test/CodeGen/X86/avx512-nontemporal.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -mattr=+avx512f,+avx512bw | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512f,+avx512bw | FileCheck %s
define void @f(<16 x float> %A, <16 x float> %AA, i8* %B, <8 x double> %C, <8 x double> %CC, <8 x i64> %E, <8 x i64> %EE, <16 x i32> %F, <16 x i32> %FF, <32 x i16> %G, <32 x i16> %GG, <64 x i8> %H, <64 x i8> %HH) {
; CHECK: vmovntps %z
Modified: llvm/trunk/test/CodeGen/X86/avx512bw-mov.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx512bw-mov.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/avx512bw-mov.ll (original)
+++ llvm/trunk/test/CodeGen/X86/avx512bw-mov.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -march=x86-64 -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512bw | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512bw | FileCheck %s
define <64 x i8> @test1(i8 * %addr) {
; CHECK-LABEL: test1:
Modified: llvm/trunk/test/CodeGen/X86/avx512bwvl-mov.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx512bwvl-mov.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/avx512bwvl-mov.ll (original)
+++ llvm/trunk/test/CodeGen/X86/avx512bwvl-mov.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -march=x86-64 -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512bw -mattr=+avx512vl --show-mc-encoding| FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512bw -mattr=+avx512vl --show-mc-encoding| FileCheck %s
define <32 x i8> @test_256_1(i8 * %addr) {
; CHECK-LABEL: test_256_1:
Modified: llvm/trunk/test/CodeGen/X86/avx512vl-mov.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx512vl-mov.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/avx512vl-mov.ll (original)
+++ llvm/trunk/test/CodeGen/X86/avx512vl-mov.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -march=x86-64 -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512vl --show-mc-encoding| FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512vl --show-mc-encoding| FileCheck %s
define <8 x i32> @test_256_1(i8 * %addr) {
; CHECK-LABEL: test_256_1:
Modified: llvm/trunk/test/CodeGen/X86/avx512vl-nontemporal.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx512vl-nontemporal.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/avx512vl-nontemporal.ll (original)
+++ llvm/trunk/test/CodeGen/X86/avx512vl-nontemporal.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -mtriple=x86_64-apple-darwin -mcpu=skx --show-mc-encoding | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=skx --show-mc-encoding | FileCheck %s
define void @f256(<8 x float> %A, <8 x float> %AA, i8* %B, <4 x double> %C, <4 x double> %CC, i32 %D, <4 x i64> %E, <4 x i64> %EE) {
; CHECK: vmovntps %ymm{{.*}} ## EVEX TO VEX Compression encoding: [0xc5
Modified: llvm/trunk/test/CodeGen/X86/barrier.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/barrier.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/barrier.ll (original)
+++ llvm/trunk/test/CodeGen/X86/barrier.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mattr=-sse2 | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- -mattr=-sse2 | FileCheck %s
define void @test() {
; CHECK: lock
Modified: llvm/trunk/test/CodeGen/X86/basic-promote-integers.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/basic-promote-integers.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/basic-promote-integers.ll (original)
+++ llvm/trunk/test/CodeGen/X86/basic-promote-integers.ll Tue Aug 1 17:28:10 2017
@@ -1,7 +1,7 @@
; Test that vectors are scalarized/lowered correctly
; (with both legalization methods).
-; RUN: llc -march=x86 < %s
-; RUN: llc -march=x86 < %s
+; RUN: llc -mtriple=i686-- < %s
+; RUN: llc -mtriple=i686-- < %s
; A simple test to check copyToParts and copyFromParts.
Modified: llvm/trunk/test/CodeGen/X86/bigstructret2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bigstructret2.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/bigstructret2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/bigstructret2.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mtriple=i686-pc-linux-gnu | FileCheck %s
+; RUN: llc < %s -mtriple=i686-pc-linux-gnu | FileCheck %s
; CHECK: .cfi_startproc
; CHECK: .cfi_def_cfa_offset 8
Modified: llvm/trunk/test/CodeGen/X86/bit-test-shift.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bit-test-shift.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/bit-test-shift.ll (original)
+++ llvm/trunk/test/CodeGen/X86/bit-test-shift.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- | FileCheck %s
; <rdar://problem/8285015>
define i32 @x(i32 %t) nounwind readnone ssp {
Modified: llvm/trunk/test/CodeGen/X86/bitcast-int-to-vector.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bitcast-int-to-vector.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/bitcast-int-to-vector.ll (original)
+++ llvm/trunk/test/CodeGen/X86/bitcast-int-to-vector.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86
+; RUN: llc < %s -mtriple=i686--
define i1 @foo(i64 %a)
{
Modified: llvm/trunk/test/CodeGen/X86/bitcast.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bitcast.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/bitcast.ll (original)
+++ llvm/trunk/test/CodeGen/X86/bitcast.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=x86
-; RUN: llc < %s -march=x86-64
+; RUN: llc < %s -mtriple=i686--
+; RUN: llc < %s -mtriple=x86_64--
; PR1033
define i64 @test1(double %t) {
Modified: llvm/trunk/test/CodeGen/X86/bitcast2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bitcast2.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/bitcast2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/bitcast2.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=x86-64 -mattr=-avx | grep movq | count 2
-; RUN: llc < %s -march=x86-64 -mattr=-avx | not grep rsp
+; RUN: llc < %s -mtriple=x86_64-- -mattr=-avx | grep movq | count 2
+; RUN: llc < %s -mtriple=x86_64-- -mattr=-avx | not grep rsp
define i64 @test1(double %A) {
%B = bitcast double %A to i64
Modified: llvm/trunk/test/CodeGen/X86/branchfolding-undef.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/branchfolding-undef.mir?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/branchfolding-undef.mir (original)
+++ llvm/trunk/test/CodeGen/X86/branchfolding-undef.mir Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-# RUN: llc -o - %s -march=x86 -run-pass branch-folder | FileCheck %s
+# RUN: llc -o - %s -mtriple=i686-- -run-pass branch-folder | FileCheck %s
# Test that tail merging drops undef flags that aren't present on all
# instructions to be merged.
--- |
Modified: llvm/trunk/test/CodeGen/X86/break-anti-dependencies.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/break-anti-dependencies.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/break-anti-dependencies.ll (original)
+++ llvm/trunk/test/CodeGen/X86/break-anti-dependencies.ll Tue Aug 1 17:28:10 2017
@@ -1,10 +1,10 @@
; Without list-burr scheduling we may not see the difference in codegen here.
; Use a subtarget that has post-RA scheduling enabled because the anti-dependency
; breaker requires liveness information to be kept.
-; RUN: llc < %s -march=x86-64 -mcpu=atom -enable-misched=false -post-RA-scheduler -pre-RA-sched=list-burr -break-anti-dependencies=none > %t
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=atom -enable-misched=false -post-RA-scheduler -pre-RA-sched=list-burr -break-anti-dependencies=none > %t
; RUN: grep "%xmm0" %t | count 14
; RUN: not grep "%xmm1" %t
-; RUN: llc < %s -march=x86-64 -mcpu=atom -post-RA-scheduler -break-anti-dependencies=critical > %t
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=atom -post-RA-scheduler -break-anti-dependencies=critical > %t
; RUN: grep "%xmm0" %t | count 7
; RUN: grep "%xmm1" %t | count 7
Modified: llvm/trunk/test/CodeGen/X86/bss_pagealigned.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bss_pagealigned.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/bss_pagealigned.ll (original)
+++ llvm/trunk/test/CodeGen/X86/bss_pagealigned.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc --code-model=kernel -march=x86-64 <%s -asm-verbose=0 | FileCheck %s
+; RUN: llc --code-model=kernel <%s -asm-verbose=0 | FileCheck %s
; PR4933
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
target triple = "x86_64-unknown-linux-gnu"
Modified: llvm/trunk/test/CodeGen/X86/bswap.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bswap.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/bswap.ll (original)
+++ llvm/trunk/test/CodeGen/X86/bswap.ll Tue Aug 1 17:28:10 2017
@@ -1,7 +1,7 @@
; bswap should be constant folded when it is passed a constant argument
-; RUN: llc < %s -march=x86 -mcpu=i686 | FileCheck %s
-; RUN: llc < %s -march=x86-64 | FileCheck %s --check-prefix=CHECK64
+; RUN: llc < %s -mtriple=i686-- -mcpu=i686 | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefix=CHECK64
declare i16 @llvm.bswap.i16(i16)
Modified: llvm/trunk/test/CodeGen/X86/byval.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/byval.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/byval.ll (original)
+++ llvm/trunk/test/CodeGen/X86/byval.ll Tue Aug 1 17:28:10 2017
@@ -1,6 +1,6 @@
; RUN: llc < %s -mtriple=x86_64-linux | FileCheck -check-prefix=X86-64 %s
; Win64 has not supported byval yet.
-; RUN: llc < %s -march=x86 | FileCheck -check-prefix=X86 %s
+; RUN: llc < %s -mtriple=i686-- | FileCheck -check-prefix=X86 %s
; X86: movl 4(%esp), %eax
; X86: movl 8(%esp), %edx
Modified: llvm/trunk/test/CodeGen/X86/byval2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/byval2.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/byval2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/byval2.ll Tue Aug 1 17:28:10 2017
@@ -12,7 +12,7 @@
; Win64 has not supported byval yet.
-; RUN: llc < %s -march=x86 -mattr=-avx | FileCheck %s -check-prefix=X32
+; RUN: llc < %s -mtriple=i686-- -mattr=-avx | FileCheck %s -check-prefix=X32
; X32-NOT: movsl
; X32: rep
; X32-NOT: rep
Modified: llvm/trunk/test/CodeGen/X86/byval3.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/byval3.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/byval3.ll (original)
+++ llvm/trunk/test/CodeGen/X86/byval3.ll Tue Aug 1 17:28:10 2017
@@ -12,7 +12,7 @@
; Win64 has not supported byval yet.
-; RUN: llc < %s -march=x86 -mattr=-avx | FileCheck %s -check-prefix=X32
+; RUN: llc < %s -mtriple=i686-- -mattr=-avx | FileCheck %s -check-prefix=X32
; X32-NOT: movsl
; X32: rep
; X32-NOT: rep
Modified: llvm/trunk/test/CodeGen/X86/byval4.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/byval4.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/byval4.ll (original)
+++ llvm/trunk/test/CodeGen/X86/byval4.ll Tue Aug 1 17:28:10 2017
@@ -12,7 +12,7 @@
; Win64 has not supported byval yet.
-; RUN: llc < %s -march=x86 -mattr=-avx | FileCheck %s -check-prefix=X32
+; RUN: llc < %s -mtriple=i686-- -mattr=-avx | FileCheck %s -check-prefix=X32
; X32-NOT: movsl
; X32: rep
; X32-NOT: rep
Modified: llvm/trunk/test/CodeGen/X86/byval5.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/byval5.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/byval5.ll (original)
+++ llvm/trunk/test/CodeGen/X86/byval5.ll Tue Aug 1 17:28:10 2017
@@ -12,7 +12,7 @@
; Win64 has not supported byval yet.
-; RUN: llc < %s -march=x86 -mattr=-avx | FileCheck %s -check-prefix=X32
+; RUN: llc < %s -mtriple=i686-- -mattr=-avx | FileCheck %s -check-prefix=X32
; X32-NOT: movsl
; X32: rep
; X32-NOT: rep
Modified: llvm/trunk/test/CodeGen/X86/byval6.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/byval6.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/byval6.ll (original)
+++ llvm/trunk/test/CodeGen/X86/byval6.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mcpu=generic -march=x86 | grep add | not grep 16
+; RUN: llc < %s -mcpu=generic -mtriple=i686-- | grep add | not grep 16
%struct.W = type { x86_fp80, x86_fp80 }
@B = global %struct.W { x86_fp80 0xK4001A000000000000000, x86_fp80 0xK4001C000000000000000 }, align 32
Modified: llvm/trunk/test/CodeGen/X86/byval7.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/byval7.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/byval7.ll (original)
+++ llvm/trunk/test/CodeGen/X86/byval7.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mcpu=yonah | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- -mcpu=yonah | FileCheck %s
%struct.S = type { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>,
<2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>,
Modified: llvm/trunk/test/CodeGen/X86/call-imm.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/call-imm.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/call-imm.ll (original)
+++ llvm/trunk/test/CodeGen/X86/call-imm.ll Tue Aug 1 17:28:10 2017
@@ -6,7 +6,7 @@
; Call to immediate is not safe on x86-64 unless we *know* that the
; call will be within 32-bits pcrel from the dest immediate.
-; RUN: llc < %s -march=x86-64 | FileCheck -check-prefix X64 %s
+; RUN: llc < %s -mtriple=x86_64-- | FileCheck -check-prefix X64 %s
; PR3666
; PR3773
Modified: llvm/trunk/test/CodeGen/X86/catchpad-weight.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/catchpad-weight.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/catchpad-weight.ll (original)
+++ llvm/trunk/test/CodeGen/X86/catchpad-weight.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc -march=x86-64 -print-machineinstrs=expand-isel-pseudos %s -o /dev/null 2>&1 | FileCheck %s
+; RUN: llc -print-machineinstrs=expand-isel-pseudos %s -o /dev/null 2>&1 | FileCheck %s
; Check if the edge weight to the catchpad is calculated correctly.
Modified: llvm/trunk/test/CodeGen/X86/change-compare-stride-1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/change-compare-stride-1.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/change-compare-stride-1.ll (original)
+++ llvm/trunk/test/CodeGen/X86/change-compare-stride-1.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -enable-lsr-nested | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- -enable-lsr-nested | FileCheck %s
;
; Nested LSR is required to optimize this case.
; We do not expect to see this form of IR without -enable-iv-rewrite.
Modified: llvm/trunk/test/CodeGen/X86/change-compare-stride-trickiness-1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/change-compare-stride-trickiness-1.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/change-compare-stride-trickiness-1.ll (original)
+++ llvm/trunk/test/CodeGen/X86/change-compare-stride-trickiness-1.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc -march=x86 < %s | FileCheck %s
+; RUN: llc -mtriple=i686-- < %s | FileCheck %s
; The comparison happens after the relevant use, so the stride can easily
; be changed. The comparison can be done in a narrower mode than the
Modified: llvm/trunk/test/CodeGen/X86/cmov-fp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/cmov-fp.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/cmov-fp.ll (original)
+++ llvm/trunk/test/CodeGen/X86/cmov-fp.ll Tue Aug 1 17:28:10 2017
@@ -1,7 +1,7 @@
-; RUN: llc -march x86 -mcpu pentium4 < %s | FileCheck %s -check-prefix=SSE
-; RUN: llc -march x86 -mcpu pentium3 < %s | FileCheck %s -check-prefix=NOSSE2
-; RUN: llc -march x86 -mcpu pentium2 < %s | FileCheck %s -check-prefix=NOSSE1
-; RUN: llc -march x86 -mcpu pentium < %s | FileCheck %s -check-prefix=NOCMOV
+; RUN: llc -mtriple=i686-- -mcpu pentium4 < %s | FileCheck %s -check-prefix=SSE
+; RUN: llc -mtriple=i686-- -mcpu pentium3 < %s | FileCheck %s -check-prefix=NOSSE2
+; RUN: llc -mtriple=i686-- -mcpu pentium2 < %s | FileCheck %s -check-prefix=NOSSE1
+; RUN: llc -mtriple=i686-- -mcpu pentium < %s | FileCheck %s -check-prefix=NOCMOV
; PR14035
define double @test1(i32 %a, i32 %b, double %x) nounwind {
Modified: llvm/trunk/test/CodeGen/X86/cmpxchg16b.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/cmpxchg16b.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/cmpxchg16b.ll (original)
+++ llvm/trunk/test/CodeGen/X86/cmpxchg16b.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -mcpu=core2 | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=core2 | FileCheck %s
; Basic 128-bit cmpxchg
define void @t1(i128* nocapture %p) nounwind ssp {
Modified: llvm/trunk/test/CodeGen/X86/cmpxchg8b_alloca_regalloc_handling.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/cmpxchg8b_alloca_regalloc_handling.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/cmpxchg8b_alloca_regalloc_handling.ll (original)
+++ llvm/trunk/test/CodeGen/X86/cmpxchg8b_alloca_regalloc_handling.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -stackrealign -O2 | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- -stackrealign -O2 | FileCheck %s
; PR28755
; Check that register allocator is able to handle that
Modified: llvm/trunk/test/CodeGen/X86/code_placement.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/code_placement.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/code_placement.ll (original)
+++ llvm/trunk/test/CodeGen/X86/code_placement.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc -march=x86 < %s | FileCheck %s
+; RUN: llc -mtriple=i686-- < %s | FileCheck %s
@Te0 = external global [256 x i32] ; <[256 x i32]*> [#uses=5]
@Te1 = external global [256 x i32] ; <[256 x i32]*> [#uses=4]
Modified: llvm/trunk/test/CodeGen/X86/codegen-prepare-cast.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/codegen-prepare-cast.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/codegen-prepare-cast.ll (original)
+++ llvm/trunk/test/CodeGen/X86/codegen-prepare-cast.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64
+; RUN: llc < %s
; PR4297
; RUN: opt -S < %s -codegenprepare | FileCheck %s
Modified: llvm/trunk/test/CodeGen/X86/combine-lds.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/combine-lds.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/combine-lds.ll (original)
+++ llvm/trunk/test/CodeGen/X86/combine-lds.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mattr=+sse2 | grep fldl | count 1
+; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 | grep fldl | count 1
define double @doload64(i64 %x) nounwind {
%tmp717 = bitcast i64 %x to double
Modified: llvm/trunk/test/CodeGen/X86/compare-add.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/compare-add.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/compare-add.ll (original)
+++ llvm/trunk/test/CodeGen/X86/compare-add.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | not grep add
+; RUN: llc < %s -mtriple=i686-- | not grep add
define i1 @X(i32 %X) {
%Y = add i32 %X, 14 ; <i32> [#uses=1]
Modified: llvm/trunk/test/CodeGen/X86/compare-inf.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/compare-inf.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/compare-inf.ll (original)
+++ llvm/trunk/test/CodeGen/X86/compare-inf.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
; Convert oeq and une to ole/oge/ule/uge when comparing with infinity
; and negative infinity, because those are more efficient on x86.
Modified: llvm/trunk/test/CodeGen/X86/compare_folding.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/compare_folding.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/compare_folding.ll (original)
+++ llvm/trunk/test/CodeGen/X86/compare_folding.ll Tue Aug 1 17:28:10 2017
@@ -1,6 +1,6 @@
-; RUN: llc < %s -march=x86 -mcpu=yonah | \
+; RUN: llc < %s -mtriple=i686-- -mcpu=yonah | \
; RUN: grep movsd | count 1
-; RUN: llc < %s -march=x86 -mcpu=yonah | \
+; RUN: llc < %s -mtriple=i686-- -mcpu=yonah | \
; RUN: grep ucomisd
declare i1 @llvm.isunordered.f64(double, double)
Modified: llvm/trunk/test/CodeGen/X86/complex-fca.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/complex-fca.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/complex-fca.ll (original)
+++ llvm/trunk/test/CodeGen/X86/complex-fca.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- | FileCheck %s
define void @ccosl({ x86_fp80, x86_fp80 }* noalias sret %agg.result, { x86_fp80, x86_fp80 } %z) nounwind {
entry:
Modified: llvm/trunk/test/CodeGen/X86/constant-hoisting-and.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/constant-hoisting-and.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/constant-hoisting-and.ll (original)
+++ llvm/trunk/test/CodeGen/X86/constant-hoisting-and.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -O3 -march=x86-64 |FileCheck %s
+; RUN: llc < %s -O3 -mtriple=x86_64-- |FileCheck %s
define i64 @foo(i1 %z, i64 %data1, i64 %data2)
{
; If constant 4294967294 is hoisted to a variable, then we won't be able to use
Modified: llvm/trunk/test/CodeGen/X86/constant-hoisting-cmp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/constant-hoisting-cmp.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/constant-hoisting-cmp.ll (original)
+++ llvm/trunk/test/CodeGen/X86/constant-hoisting-cmp.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -O3 -march=x86-64 |FileCheck %s
+; RUN: llc < %s -O3 -mtriple=x86_64-- |FileCheck %s
define i64 @foo(i64 %data1, i64 %data2, i64 %data3)
{
; If constant 4294967295 is hoisted to a variable, then we won't be able to
Modified: llvm/trunk/test/CodeGen/X86/constant-hoisting-shift-immediate.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/constant-hoisting-shift-immediate.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/constant-hoisting-shift-immediate.ll (original)
+++ llvm/trunk/test/CodeGen/X86/constant-hoisting-shift-immediate.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -O3 -march=x86-64 |FileCheck %s
+; RUN: llc < %s -O3 -mtriple=x86_64-- |FileCheck %s
define i64 @foo(i1 %z, i192* %p, i192* %q)
{
; If const 128 is hoisted to a variable, then in basic block L_val2 we would
Modified: llvm/trunk/test/CodeGen/X86/constant-pool-remat-0.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/constant-pool-remat-0.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/constant-pool-remat-0.ll (original)
+++ llvm/trunk/test/CodeGen/X86/constant-pool-remat-0.ll Tue Aug 1 17:28:10 2017
@@ -10,7 +10,7 @@
; RUN: llc < %s -mtriple=x86_64-linux -o /dev/null -stats -info-output-file - | FileCheck %s -check-prefix=X64stat
; X64stat: 6 asm-printer
-; RUN: llc < %s -march=x86 -mattr=+sse2 -o /dev/null -stats -info-output-file - | FileCheck %s -check-prefix=X32stat
+; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 -o /dev/null -stats -info-output-file - | FileCheck %s -check-prefix=X32stat
; X32stat: 12 asm-printer
declare float @qux(float %y)
Modified: llvm/trunk/test/CodeGen/X86/constpool.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/constpool.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/constpool.ll (original)
+++ llvm/trunk/test/CodeGen/X86/constpool.ll Tue Aug 1 17:28:10 2017
@@ -1,11 +1,10 @@
-; RUN: llc < %s
-; RUN: llc < %s -fast-isel
-; RUN: llc < %s -march=x86-64
-; RUN: llc < %s -fast-isel -march=x86-64
+; RUN: llc < %s -mtriple=i386-apple-darwin9.7
+; RUN: llc < %s -mtriple=i386-apple-darwin9.7 -fast-isel
+; RUN: llc < %s -mtriple=x86_64-apple-darwin9.7
+; RUN: llc < %s -mtriple=x86_64-apple-darwin9.7 -fast-isel
; PR4466
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
-target triple = "i386-apple-darwin9.7"
define i32 @main() nounwind {
entry:
Modified: llvm/trunk/test/CodeGen/X86/crash.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/crash.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/crash.ll (original)
+++ llvm/trunk/test/CodeGen/X86/crash.ll Tue Aug 1 17:28:10 2017
@@ -1,6 +1,6 @@
; REQUIRES: asserts
-; RUN: llc -march=x86 -no-integrated-as < %s -verify-machineinstrs -precompute-phys-liveness
-; RUN: llc -march=x86-64 -no-integrated-as < %s -verify-machineinstrs -precompute-phys-liveness
+; RUN: llc -mtriple=i686-- -no-integrated-as < %s -verify-machineinstrs -precompute-phys-liveness
+; RUN: llc -mtriple=x86_64-- -no-integrated-as < %s -verify-machineinstrs -precompute-phys-liveness
; PR6497
Modified: llvm/trunk/test/CodeGen/X86/cvt16.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/cvt16.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/cvt16.ll (original)
+++ llvm/trunk/test/CodeGen/X86/cvt16.ll Tue Aug 1 17:28:10 2017
@@ -1,7 +1,7 @@
-; RUN: llc < %s -march=x86-64 -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 -mattr=-f16c | FileCheck %s -check-prefix=CHECK -check-prefix=LIBCALL
-; RUN: llc < %s -march=x86-64 -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 -mattr=+f16c | FileCheck %s -check-prefix=CHECK -check-prefix=F16C
-; RUN: llc < %s -march=x86-64 -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 -mattr=-f16c,+soft-float | FileCheck %s -check-prefix=CHECK -check-prefix=SOFTFLOAT
-; RUN: llc < %s -march=x86-64 -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 -mattr=+f16c,+soft-float | FileCheck %s -check-prefix=CHECK -check-prefix=SOFTFLOAT
+; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 -mattr=-f16c | FileCheck %s -check-prefix=CHECK -check-prefix=LIBCALL
+; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 -mattr=+f16c | FileCheck %s -check-prefix=CHECK -check-prefix=F16C
+; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 -mattr=-f16c,+soft-float | FileCheck %s -check-prefix=CHECK -check-prefix=SOFTFLOAT
+; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 -mattr=+f16c,+soft-float | FileCheck %s -check-prefix=CHECK -check-prefix=SOFTFLOAT
; This is a test for float to half float conversions on x86-64.
;
Modified: llvm/trunk/test/CodeGen/X86/dag-rauw-cse.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/dag-rauw-cse.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/dag-rauw-cse.ll (original)
+++ llvm/trunk/test/CodeGen/X86/dag-rauw-cse.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- | FileCheck %s
; PR3018
define i32 @test(i32 %A) nounwind {
Modified: llvm/trunk/test/CodeGen/X86/dbg-changes-codegen-branch-folding.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/dbg-changes-codegen-branch-folding.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/dbg-changes-codegen-branch-folding.ll (original)
+++ llvm/trunk/test/CodeGen/X86/dbg-changes-codegen-branch-folding.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
-; RUN: llc -march=x86-64 -mtriple=x86_64-linux < %s | FileCheck %s
-; RUN: opt -strip-debug < %s | llc -march=x86-64 -mtriple=x86_64-linux | FileCheck %s
+; RUN: llc -mtriple=x86_64-linux < %s | FileCheck %s
+; RUN: opt -strip-debug < %s | llc -mtriple=x86_64-linux | FileCheck %s
; http://llvm.org/PR19051. Minor code-motion difference with -g.
; Presence of debug info shouldn't affect the codegen. Make sure that
; we generated the same code sequence with and without debug info.
Modified: llvm/trunk/test/CodeGen/X86/dbg-changes-codegen.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/dbg-changes-codegen.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/dbg-changes-codegen.ll (original)
+++ llvm/trunk/test/CodeGen/X86/dbg-changes-codegen.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
; The Peephole optimizer should fold the load into the cmp even with debug info.
; CHECK-LABEL: _ZN3Foo3batEv
Modified: llvm/trunk/test/CodeGen/X86/disable-tail-calls.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/disable-tail-calls.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/disable-tail-calls.ll (original)
+++ llvm/trunk/test/CodeGen/X86/disable-tail-calls.ll Tue Aug 1 17:28:10 2017
@@ -1,6 +1,6 @@
-; RUN: llc < %s -march x86-64 | FileCheck %s --check-prefix=NO-OPTION
-; RUN: llc < %s -march x86-64 -disable-tail-calls | FileCheck %s --check-prefix=DISABLE-TRUE
-; RUN: llc < %s -march x86-64 -disable-tail-calls=false | FileCheck %s --check-prefix=DISABLE-FALSE
+; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefix=NO-OPTION
+; RUN: llc < %s -mtriple=x86_64-- -disable-tail-calls | FileCheck %s --check-prefix=DISABLE-TRUE
+; RUN: llc < %s -mtriple=x86_64-- -disable-tail-calls=false | FileCheck %s --check-prefix=DISABLE-FALSE
; Check that command line option "-disable-tail-calls" overrides function
; attribute "disable-tail-calls".
Modified: llvm/trunk/test/CodeGen/X86/discontiguous-loops.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/discontiguous-loops.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/discontiguous-loops.ll (original)
+++ llvm/trunk/test/CodeGen/X86/discontiguous-loops.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc -verify-loop-info -verify-dom-info -march=x86-64 < %s
+; RUN: llc -verify-loop-info -verify-dom-info -mtriple=x86_64-- < %s
; PR5243
@.str96 = external constant [37 x i8], align 8 ; <[37 x i8]*> [#uses=1]
Modified: llvm/trunk/test/CodeGen/X86/dollar-name.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/dollar-name.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/dollar-name.ll (original)
+++ llvm/trunk/test/CodeGen/X86/dollar-name.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mtriple=i386-linux | FileCheck %s
+; RUN: llc < %s -mtriple=i386-linux | FileCheck %s
; PR1339
@"$bar" = global i32 zeroinitializer
Modified: llvm/trunk/test/CodeGen/X86/dont-trunc-store-double-to-float.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/dont-trunc-store-double-to-float.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/dont-trunc-store-double-to-float.ll (original)
+++ llvm/trunk/test/CodeGen/X86/dont-trunc-store-double-to-float.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc -march=x86 < %s | FileCheck %s
+; RUN: llc -mtriple=i686-- < %s | FileCheck %s
; CHECK-LABEL: @bar
; CHECK-DAG: movl $1074339512,
Modified: llvm/trunk/test/CodeGen/X86/dynamic-allocas-VLAs.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/dynamic-allocas-VLAs.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/dynamic-allocas-VLAs.ll (original)
+++ llvm/trunk/test/CodeGen/X86/dynamic-allocas-VLAs.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
-; RUN: llc < %s -stack-symbol-ordering=0 -mcpu=generic -march=x86-64 -mattr=+avx -mtriple=i686-apple-darwin10 | FileCheck %s
-; RUN: llc < %s -stack-symbol-ordering=0 -mcpu=generic -stackrealign -stack-alignment=32 -march=x86-64 -mattr=+avx -mtriple=i686-apple-darwin10 | FileCheck %s -check-prefix=FORCE-ALIGN
+; RUN: llc < %s -stack-symbol-ordering=0 -mcpu=generic -mattr=+avx -mtriple=x86_64-apple-darwin10 | FileCheck %s
+; RUN: llc < %s -stack-symbol-ordering=0 -mcpu=generic -stackrealign -stack-alignment=32 -mattr=+avx -mtriple=x86_64-apple-darwin10 | FileCheck %s -check-prefix=FORCE-ALIGN
; rdar://11496434
; no VLAs or dynamic alignment
Modified: llvm/trunk/test/CodeGen/X86/empty-struct-return-type.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/empty-struct-return-type.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/empty-struct-return-type.ll (original)
+++ llvm/trunk/test/CodeGen/X86/empty-struct-return-type.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 | grep call
+; RUN: llc < %s | grep call
; PR4688
; Return types can be empty structs, which can be awkward.
Modified: llvm/trunk/test/CodeGen/X86/emutls-pic.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/emutls-pic.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/emutls-pic.ll (original)
+++ llvm/trunk/test/CodeGen/X86/emutls-pic.ll Tue Aug 1 17:28:10 2017
@@ -1,7 +1,7 @@
-; RUN: llc < %s -emulated-tls -march=x86 -mtriple=i386-linux-gnu -relocation-model=pic | FileCheck -check-prefix=X32 %s
-; RUN: llc < %s -emulated-tls -march=x86-64 -mtriple=x86_64-linux-gnu -relocation-model=pic | FileCheck -check-prefix=X64 %s
-; RUN: llc < %s -emulated-tls -march=x86 -mtriple=i386-linux-android -relocation-model=pic | FileCheck -check-prefix=X32 %s
-; RUN: llc < %s -emulated-tls -march=x86-64 -mtriple=x86_64-linux-android -relocation-model=pic | FileCheck -check-prefix=X64 %s
+; RUN: llc < %s -emulated-tls -mtriple=i386-linux-gnu -relocation-model=pic | FileCheck -check-prefix=X32 %s
+; RUN: llc < %s -emulated-tls -mtriple=x86_64-linux-gnu -relocation-model=pic | FileCheck -check-prefix=X64 %s
+; RUN: llc < %s -emulated-tls -mtriple=i386-linux-android -relocation-model=pic | FileCheck -check-prefix=X32 %s
+; RUN: llc < %s -emulated-tls -mtriple=x86_64-linux-android -relocation-model=pic | FileCheck -check-prefix=X64 %s
; Use my_emutls_get_address like __emutls_get_address.
@my_emutls_v_xyz = external global i8*, align 4
Modified: llvm/trunk/test/CodeGen/X86/emutls-pie.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/emutls-pie.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/emutls-pie.ll (original)
+++ llvm/trunk/test/CodeGen/X86/emutls-pie.ll Tue Aug 1 17:28:10 2017
@@ -1,10 +1,10 @@
-; RUN: llc < %s -emulated-tls -march=x86 -mcpu=generic -mtriple=i386-linux-gnu -relocation-model=pic \
+; RUN: llc < %s -emulated-tls -mcpu=generic -mtriple=i386-linux-gnu -relocation-model=pic \
; RUN: | FileCheck -check-prefix=X32 %s
-; RUN: llc < %s -emulated-tls -march=x86-64 -mcpu=generic -mtriple=x86_64-linux-gnu -relocation-model=pic \
+; RUN: llc < %s -emulated-tls -mcpu=generic -mtriple=x86_64-linux-gnu -relocation-model=pic \
; RUN: | FileCheck -check-prefix=X64 %s
-; RUN: llc < %s -emulated-tls -march=x86 -mcpu=generic -mtriple=i386-linux-android -relocation-model=pic \
+; RUN: llc < %s -emulated-tls -mcpu=generic -mtriple=i386-linux-android -relocation-model=pic \
; RUN: | FileCheck -check-prefix=X32 %s
-; RUN: llc < %s -emulated-tls -march=x86-64 -mcpu=generic -mtriple=x86_64-linux-android -relocation-model=pic \
+; RUN: llc < %s -emulated-tls -mcpu=generic -mtriple=x86_64-linux-android -relocation-model=pic \
; RUN: | FileCheck -check-prefix=X64 %s
; Use my_emutls_get_address like __emutls_get_address.
Modified: llvm/trunk/test/CodeGen/X86/emutls.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/emutls.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/emutls.ll (original)
+++ llvm/trunk/test/CodeGen/X86/emutls.ll Tue Aug 1 17:28:10 2017
@@ -1,7 +1,7 @@
-; RUN: llc < %s -emulated-tls -march=x86 -mtriple=i386-linux-gnu | FileCheck -check-prefix=X32 %s
-; RUN: llc < %s -emulated-tls -march=x86-64 -mtriple=x86_64-linux-gnu | FileCheck -check-prefix=X64 %s
-; RUN: llc < %s -emulated-tls -march=x86 -mtriple=x86-linux-android | FileCheck -check-prefix=X32 %s
-; RUN: llc < %s -emulated-tls -march=x86-64 -mtriple=x86_64-linux-android | FileCheck -check-prefix=X64 %s
+; RUN: llc < %s -emulated-tls -mtriple=i386-linux-gnu | FileCheck -check-prefix=X32 %s
+; RUN: llc < %s -emulated-tls -mtriple=x86_64-linux-gnu | FileCheck -check-prefix=X64 %s
+; RUN: llc < %s -emulated-tls -mtriple=i386-linux-android | FileCheck -check-prefix=X32 %s
+; RUN: llc < %s -emulated-tls -mtriple=x86_64-linux-android | FileCheck -check-prefix=X64 %s
; Copied from tls.ll; emulated TLS model is not implemented
; for *-pc-win32 and *-pc-winows targets yet.
Modified: llvm/trunk/test/CodeGen/X86/emutls_generic.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/emutls_generic.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/emutls_generic.ll (original)
+++ llvm/trunk/test/CodeGen/X86/emutls_generic.ll Tue Aug 1 17:28:10 2017
@@ -1,10 +1,10 @@
; RUN: llc < %s -emulated-tls -mtriple=i686-linux-android -relocation-model=pic \
; RUN: | FileCheck -check-prefix=X86_32 %s
-; RUN: llc < %s -emulated-tls -mtriple=x86_64-linux-android -march=x86 -relocation-model=pic \
+; RUN: llc < %s -emulated-tls -mtriple=i686-linux-android -relocation-model=pic \
; RUN: | FileCheck -check-prefix=X86_32 %s
; RUN: llc < %s -emulated-tls -mtriple=x86_64-linux-android -relocation-model=pic \
; RUN: | FileCheck -check-prefix=X86_64 %s
-; RUN: llc < %s -emulated-tls -march=x86 -mtriple=i386-linux-gnu -relocation-model=pic \
+; RUN: llc < %s -emulated-tls -mtriple=i386-linux-gnu -relocation-model=pic \
; RUN: | FileCheck %s
; Make sure that TLS symbols are emitted in expected order.
Modified: llvm/trunk/test/CodeGen/X86/epilogue.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/epilogue.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/epilogue.ll (original)
+++ llvm/trunk/test/CodeGen/X86/epilogue.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mcpu=generic -march=x86 | FileCheck %s
+; RUN: llc < %s -mcpu=generic -mtriple=i686-- | FileCheck %s
; CHECK-NOT: lea{{.*}}(%esp)
; CHECK: {{(mov.* %ebp, %esp)|(lea.*\(%ebp\), %esp)}}
Modified: llvm/trunk/test/CodeGen/X86/evex-to-vex-compress.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/evex-to-vex-compress.mir?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/evex-to-vex-compress.mir (original)
+++ llvm/trunk/test/CodeGen/X86/evex-to-vex-compress.mir Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -run-pass x86-evex-to-vex-compress -verify-machineinstrs -mcpu=skx -o - %s | FileCheck %s
+# RUN: llc -mtriple=x86_64-- -run-pass x86-evex-to-vex-compress -verify-machineinstrs -mcpu=skx -o - %s | FileCheck %s
# This test verifies VEX encdoing for AVX-512 instructions that use registers of low inedexes and
# do not use zmm or mask registers and have a corresponding AVX/AVX2 opcode
Modified: llvm/trunk/test/CodeGen/X86/extend.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/extend.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/extend.ll (original)
+++ llvm/trunk/test/CodeGen/X86/extend.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | grep movzx | count 1
-; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | grep movsx | count 1
+; RUN: llc < %s -mtriple=i686-- -x86-asm-syntax=intel | grep movzx | count 1
+; RUN: llc < %s -mtriple=i686-- -x86-asm-syntax=intel | grep movsx | count 1
@G1 = internal global i8 0 ; <i8*> [#uses=1]
@G2 = internal global i8 0 ; <i8*> [#uses=1]
Modified: llvm/trunk/test/CodeGen/X86/extended-fma-contraction.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/extended-fma-contraction.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/extended-fma-contraction.ll (original)
+++ llvm/trunk/test/CodeGen/X86/extended-fma-contraction.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
-; RUN: llc -march=x86 -mcpu=bdver2 -mattr=-fma -mtriple=x86_64-apple-darwin < %s | FileCheck %s
-; RUN: llc -march=x86 -mcpu=bdver2 -mattr=-fma,-fma4 -mtriple=x86_64-apple-darwin < %s | FileCheck %s --check-prefix=CHECK-NOFMA
+; RUN: llc -mcpu=bdver2 -mattr=-fma -mtriple=i686-apple-darwin < %s | FileCheck %s
+; RUN: llc -mcpu=bdver2 -mattr=-fma,-fma4 -mtriple=i686-apple-darwin < %s | FileCheck %s --check-prefix=CHECK-NOFMA
; CHECK-LABEL: fmafunc
define <3 x float> @fmafunc(<3 x float> %a, <3 x float> %b, <3 x float> %c) {
Modified: llvm/trunk/test/CodeGen/X86/extmul128.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/extmul128.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/extmul128.ll (original)
+++ llvm/trunk/test/CodeGen/X86/extmul128.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 | grep mul | count 2
+; RUN: llc < %s -mtriple=x86_64-- | grep mul | count 2
define i128 @i64_sext_i128(i64 %a, i64 %b) {
%aa = sext i64 %a to i128
Modified: llvm/trunk/test/CodeGen/X86/extmul64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/extmul64.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/extmul64.ll (original)
+++ llvm/trunk/test/CodeGen/X86/extmul64.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | grep mul | count 2
+; RUN: llc < %s -mtriple=i686-- | grep mul | count 2
define i64 @i32_sext_i64(i32 %a, i32 %b) {
%aa = sext i32 %a to i64
Modified: llvm/trunk/test/CodeGen/X86/extract-combine.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/extract-combine.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/extract-combine.ll (original)
+++ llvm/trunk/test/CodeGen/X86/extract-combine.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -mcpu=core2 -o %t
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=core2 -o %t
; RUN: not grep unpcklps %t
define i32 @foo() nounwind {
Modified: llvm/trunk/test/CodeGen/X86/extract-extract.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/extract-extract.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/extract-extract.ll (original)
+++ llvm/trunk/test/CodeGen/X86/extract-extract.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 >/dev/null
+; RUN: llc < %s -mtriple=i686-- >/dev/null
; PR4699
; Handle this extractvalue-of-extractvalue case without getting in
Modified: llvm/trunk/test/CodeGen/X86/extractelement-from-arg.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/extractelement-from-arg.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/extractelement-from-arg.ll (original)
+++ llvm/trunk/test/CodeGen/X86/extractelement-from-arg.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -mattr=+sse2
+; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2
define void @test(float* %R, <4 x float> %X) nounwind {
%tmp = extractelement <4 x float> %X, i32 3
Modified: llvm/trunk/test/CodeGen/X86/extractps.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/extractps.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/extractps.ll (original)
+++ llvm/trunk/test/CodeGen/X86/extractps.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mcpu=penryn > %t
+; RUN: llc < %s -mtriple=i686-- -mcpu=penryn > %t
; RUN: not grep movd %t
; RUN: grep "movss %xmm" %t | count 1
; RUN: grep "extractps \$1, %xmm0, " %t | count 1
Modified: llvm/trunk/test/CodeGen/X86/fast-cc-callee-pops.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fast-cc-callee-pops.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fast-cc-callee-pops.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fast-cc-callee-pops.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -x86-asm-syntax=intel -mcpu=yonah | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- -x86-asm-syntax=intel -mcpu=yonah | FileCheck %s
; Check that a fastcc function pops its stack variables before returning.
Modified: llvm/trunk/test/CodeGen/X86/fast-cc-merge-stack-adj.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fast-cc-merge-stack-adj.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fast-cc-merge-stack-adj.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fast-cc-merge-stack-adj.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mcpu=generic -march=x86 -x86-asm-syntax=intel | FileCheck %s
+; RUN: llc < %s -mcpu=generic -x86-asm-syntax=intel | FileCheck %s
; CHECK: add esp, 8
target triple = "i686-pc-linux-gnu"
Modified: llvm/trunk/test/CodeGen/X86/fast-cc-pass-in-regs.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fast-cc-pass-in-regs.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fast-cc-pass-in-regs.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fast-cc-pass-in-regs.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- -x86-asm-syntax=intel | FileCheck %s
; check that fastcc is passing stuff in regs.
declare x86_fastcallcc i64 @callee(i64 inreg)
Modified: llvm/trunk/test/CodeGen/X86/fast-isel-agg-constant.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fast-isel-agg-constant.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fast-isel-agg-constant.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fast-isel-agg-constant.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -O0 | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- -O0 | FileCheck %s
; Make sure fast-isel doesn't screw up aggregate constants.
; (Failing out is okay, as long as we don't miscompile.)
Modified: llvm/trunk/test/CodeGen/X86/fast-isel-atomic.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fast-isel-atomic.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fast-isel-atomic.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fast-isel-atomic.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -O0 -march=x86-64
+; RUN: llc < %s -O0 -mtriple=x86_64--
; rdar://8204072
; PR7652
Modified: llvm/trunk/test/CodeGen/X86/fast-isel-bail.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fast-isel-bail.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fast-isel-bail.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fast-isel-bail.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -O0
+; RUN: llc < %s -mtriple=i686-- -O0
; This file is for regression tests for cases where FastISel needs
; to gracefully bail out and let SelectionDAGISel take over.
Modified: llvm/trunk/test/CodeGen/X86/fast-isel-bc.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fast-isel-bc.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fast-isel-bc.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fast-isel-bc.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -O0 -march=x86-64 -mattr=+mmx,+sse2 | FileCheck %s
+; RUN: llc < %s -O0 -mattr=+mmx,+sse2 | FileCheck %s
; PR4684
target datalayout =
Modified: llvm/trunk/test/CodeGen/X86/fast-isel-call.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fast-isel-call.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fast-isel-call.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fast-isel-call.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
-; RUN: llc < %s -O0 -fast-isel-abort=1 -march=x86 -mtriple=i686-apple-darwin8 2>/dev/null | FileCheck %s
-; RUN: llc < %s -O0 -fast-isel-abort=1 -march=x86 -mtriple=i686-apple-darwin8 2>&1 >/dev/null | FileCheck -check-prefix=STDERR -allow-empty %s
+; RUN: llc < %s -O0 -fast-isel-abort=1 -mtriple=i686-apple-darwin8 2>/dev/null | FileCheck %s
+; RUN: llc < %s -O0 -fast-isel-abort=1 -mtriple=i686-apple-darwin8 2>&1 >/dev/null | FileCheck -check-prefix=STDERR -allow-empty %s
%struct.s = type {i32, i32, i32}
Modified: llvm/trunk/test/CodeGen/X86/fast-isel-constant.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fast-isel-constant.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fast-isel-constant.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fast-isel-constant.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -O0 | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- -O0 | FileCheck %s
; Make sure fast-isel doesn't reset the materialised constant map
; across an intrinsic call.
Modified: llvm/trunk/test/CodeGen/X86/fast-isel-emutls.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fast-isel-emutls.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fast-isel-emutls.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fast-isel-emutls.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -emulated-tls -march=x86 -relocation-model=pic -mtriple=i686-unknown-linux-gnu -fast-isel | FileCheck %s
+; RUN: llc < %s -emulated-tls -relocation-model=pic -mtriple=i686-unknown-linux-gnu -fast-isel | FileCheck %s
; PR3654
@v = thread_local global i32 0
Modified: llvm/trunk/test/CodeGen/X86/fast-isel-expect.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fast-isel-expect.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fast-isel-expect.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fast-isel-expect.ll Tue Aug 1 17:28:10 2017
@@ -1,7 +1,7 @@
-; RUN: llc < %s -O0 -march=x86 | FileCheck %s
+; RUN: llc < %s -O0 | FileCheck %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
-target triple = "x86_64-unknown-linux-gnu"
+target triple = "i686-unknown-linux-gnu"
@glbl = extern_weak constant i8
Modified: llvm/trunk/test/CodeGen/X86/fast-isel-fneg.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fast-isel-fneg.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fast-isel-fneg.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fast-isel-fneg.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
; RUN: llc < %s -fast-isel -fast-isel-abort=1 -mtriple=x86_64-apple-darwin10 | FileCheck %s
-; RUN: llc < %s -fast-isel -march=x86 -mattr=+sse2 | FileCheck --check-prefix=SSE2 %s
+; RUN: llc < %s -fast-isel -mtriple=i686-- -mattr=+sse2 | FileCheck --check-prefix=SSE2 %s
; SSE2: xor
; SSE2: xor
Modified: llvm/trunk/test/CodeGen/X86/fast-isel-gep.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fast-isel-gep.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fast-isel-gep.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fast-isel-gep.ll Tue Aug 1 17:28:10 2017
@@ -1,6 +1,6 @@
; RUN: llc < %s -mtriple=x86_64-linux -O0 | FileCheck %s --check-prefix=X64
; RUN: llc < %s -mtriple=x86_64-windows-itanium -O0 | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -march=x86 -O0 | FileCheck %s --check-prefix=X32
+; RUN: llc < %s -mtriple=i686-- -O0 | FileCheck %s --check-prefix=X32
; GEP indices are interpreted as signed integers, so they
; should be sign-extended to 64 bits on 64-bit targets.
Modified: llvm/trunk/test/CodeGen/X86/fast-isel-tailcall.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fast-isel-tailcall.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fast-isel-tailcall.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fast-isel-tailcall.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -fast-isel -tailcallopt -march=x86 | FileCheck %s
+; RUN: llc < %s -fast-isel -tailcallopt -mtriple=i686-- | FileCheck %s
; CHECK-NOT: add
; PR4154
Modified: llvm/trunk/test/CodeGen/X86/fast-isel-tls.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fast-isel-tls.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fast-isel-tls.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fast-isel-tls.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -relocation-model=pic -mtriple=i686-unknown-linux-gnu -fast-isel | FileCheck %s
+; RUN: llc < %s -relocation-model=pic -mtriple=i686-unknown-linux-gnu -fast-isel | FileCheck %s
; PR3654
@v = thread_local global i32 0
Modified: llvm/trunk/test/CodeGen/X86/fast-isel.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fast-isel.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fast-isel.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fast-isel.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -fast-isel -fast-isel-abort=1 -verify-machineinstrs -march=x86 -mattr=sse2 -no-integrated-as
+; RUN: llc < %s -fast-isel -fast-isel-abort=1 -verify-machineinstrs -mtriple=i686-- -mattr=sse2 -no-integrated-as
; RUN: llc < %s -fast-isel -fast-isel-abort=1 -verify-machineinstrs -mtriple=x86_64-apple-darwin10 -no-integrated-as
; This tests very minimal fast-isel functionality.
Modified: llvm/trunk/test/CodeGen/X86/fastcc-sret.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fastcc-sret.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fastcc-sret.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fastcc-sret.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -tailcallopt=false | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- -tailcallopt=false | FileCheck %s
%struct.foo = type { [4 x i32] }
Modified: llvm/trunk/test/CodeGen/X86/fastcc3struct.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fastcc3struct.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fastcc3struct.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fastcc3struct.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- | FileCheck %s
; CHECK: movl {{.}}12, %eax
; CHECK: movl {{.}}24, %edx
Modified: llvm/trunk/test/CodeGen/X86/field-extract-use-trunc.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/field-extract-use-trunc.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/field-extract-use-trunc.ll (original)
+++ llvm/trunk/test/CodeGen/X86/field-extract-use-trunc.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=x86 | grep sar | count 1
-; RUN: llc < %s -march=x86-64 | not grep sar
+; RUN: llc < %s -mtriple=i686-- | grep sar | count 1
+; RUN: llc < %s -mtriple=x86_64-- | not grep sar
define i32 @test(i32 %f12) nounwind {
%tmp7.25 = lshr i32 %f12, 16
Modified: llvm/trunk/test/CodeGen/X86/fildll.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fildll.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fildll.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fildll.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -x86-asm-syntax=att -mattr=-sse2 | grep fildll | count 2
+; RUN: llc < %s -mtriple=i686-- -x86-asm-syntax=att -mattr=-sse2 | grep fildll | count 2
define fastcc double @sint64_to_fp(i64 %X) {
%R = sitofp i64 %X to double ; <double> [#uses=1]
Modified: llvm/trunk/test/CodeGen/X86/fixup-bw-inst.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fixup-bw-inst.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fixup-bw-inst.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fixup-bw-inst.ll Tue Aug 1 17:28:10 2017
@@ -1,6 +1,6 @@
-; RUN: llc -fixup-byte-word-insts=1 -march=x86-64 < %s | \
+; RUN: llc -fixup-byte-word-insts=1 < %s | \
; RUN: FileCheck -check-prefix CHECK -check-prefix BWON %s
-; RUN: llc -fixup-byte-word-insts=0 -march=x86-64 < %s | \
+; RUN: llc -fixup-byte-word-insts=0 < %s | \
; RUN: FileCheck -check-prefix CHECK -check-prefix BWOFF %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
Modified: llvm/trunk/test/CodeGen/X86/fixup-lea.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fixup-lea.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fixup-lea.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fixup-lea.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-;RUN: llc < %s -march=x86 | FileCheck %s
+;RUN: llc < %s -mtriple=i686-- | FileCheck %s
define void @foo(i32 inreg %dns) minsize {
entry:
Modified: llvm/trunk/test/CodeGen/X86/float-conv-elim.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/float-conv-elim.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/float-conv-elim.ll (original)
+++ llvm/trunk/test/CodeGen/X86/float-conv-elim.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=i686-unknown-linux-gnu -march=x86-64 -mcpu=x86-64 < %s | FileCheck %s
+; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mcpu=x86-64 < %s | FileCheck %s
; Make sure the float conversion is folded away as it should be.
; CHECK-LABEL: foo
Modified: llvm/trunk/test/CodeGen/X86/floor-soft-float.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/floor-soft-float.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/floor-soft-float.ll (original)
+++ llvm/trunk/test/CodeGen/X86/floor-soft-float.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=x86-64 -mattr=+sse4.1,-avx | FileCheck %s --check-prefix=CHECK-HARD-FLOAT
-; RUN: llc < %s -march=x86-64 -mattr=+sse4.1,-avx,+soft-float | FileCheck %s --check-prefix=CHECK-SOFT-FLOAT
+; RUN: llc < %s -mattr=+sse4.1,-avx | FileCheck %s --check-prefix=CHECK-HARD-FLOAT
+; RUN: llc < %s -mattr=+sse4.1,-avx,+soft-float | FileCheck %s --check-prefix=CHECK-SOFT-FLOAT
target triple = "x86_64-unknown-linux-gnu"
Modified: llvm/trunk/test/CodeGen/X86/fma-intrinsics-x86.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fma-intrinsics-x86.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fma-intrinsics-x86.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fma-intrinsics-x86.ll Tue Aug 1 17:28:10 2017
@@ -1,7 +1,7 @@
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -march=x86-64 -mcpu=corei7-avx -mattr=+fma | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-FMA
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -march=x86-64 -mcpu=core-avx2 -mattr=+fma,+avx2 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-FMA
-; RUN: llc < %s -mtriple=x86_64-pc-windows -march=x86-64 -mcpu=core-avx2 -mattr=+fma,+avx2 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-FMA-WIN
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -march=x86-64 -mcpu=corei7-avx -mattr=+fma4 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-FMA4
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=corei7-avx -mattr=+fma | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-FMA
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=core-avx2 -mattr=+fma,+avx2 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-FMA
+; RUN: llc < %s -mtriple=x86_64-pc-windows -mcpu=core-avx2 -mattr=+fma,+avx2 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-FMA-WIN
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=corei7-avx -mattr=+fma4 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-FMA4
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -mattr=+avx,-fma | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-FMA4
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -mattr=-fma4 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-FMA
Modified: llvm/trunk/test/CodeGen/X86/fma-phi-213-to-231.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fma-phi-213-to-231.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fma-phi-213-to-231.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fma-phi-213-to-231.ll Tue Aug 1 17:28:10 2017
@@ -1,6 +1,6 @@
; RUN: llc < %s -mtriple=i386-apple-darwin10 -mattr=+fma,-fma4 | FileCheck %s
; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -mattr=+fma,-fma4 | FileCheck %s
-; RUN: llc < %s -march=x86 -mcpu=bdver2 -mattr=-fma4 | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- -mcpu=bdver2 -mattr=-fma4 | FileCheck %s
; Test FMA3 variant selection
Modified: llvm/trunk/test/CodeGen/X86/fma4-intrinsics-x86_64-folded-load.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fma4-intrinsics-x86_64-folded-load.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fma4-intrinsics-x86_64-folded-load.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fma4-intrinsics-x86_64-folded-load.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -march=x86-64 -mcpu=corei7-avx -mattr=+fma4 | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=corei7-avx -mattr=+fma4 | FileCheck %s
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -mattr=+avx,-fma | FileCheck %s
; VFMADD
Modified: llvm/trunk/test/CodeGen/X86/fmul-combines.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fmul-combines.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fmul-combines.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fmul-combines.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-unknown-unknown -march=x86-64 < %s | FileCheck %s
+; RUN: llc -mtriple=x86_64-unknown-unknown < %s | FileCheck %s
; CHECK-LABEL: fmul2_f32:
; CHECK: addss %xmm0, %xmm0
Modified: llvm/trunk/test/CodeGen/X86/fmul-zero.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fmul-zero.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fmul-zero.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fmul-zero.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=x86-64 -enable-unsafe-fp-math | not grep mulps
-; RUN: llc < %s -march=x86-64 | grep mulps
+; RUN: llc < %s -mtriple=x86_64-- -enable-unsafe-fp-math | not grep mulps
+; RUN: llc < %s -mtriple=x86_64-- | grep mulps
define void @test14(<4 x float>*) nounwind {
load <4 x float>, <4 x float>* %0, align 1
Modified: llvm/trunk/test/CodeGen/X86/fold-add.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fold-add.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fold-add.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fold-add.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 | FileCheck %s
+; RUN: llc < %s | FileCheck %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
target triple = "x86_64-apple-darwin9.6"
Modified: llvm/trunk/test/CodeGen/X86/fold-and-shift.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fold-and-shift.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fold-and-shift.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fold-and-shift.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- | FileCheck %s
define i32 @t1(i8* %X, i32 %i) {
; CHECK-LABEL: t1:
Modified: llvm/trunk/test/CodeGen/X86/fold-call.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fold-call.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fold-call.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fold-call.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=x86 | FileCheck %s
-; RUN: llc < %s -march=x86-64 | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
; CHECK: test1
; CHECK-NOT: mov
Modified: llvm/trunk/test/CodeGen/X86/fold-imm.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fold-imm.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fold-imm.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fold-imm.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- | FileCheck %s
define i32 @test(i32 %X) nounwind {
entry:
Modified: llvm/trunk/test/CodeGen/X86/fold-load-vec.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fold-load-vec.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fold-load-vec.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fold-load-vec.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -mcpu=corei7 -mattr=+sse4.1 | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=corei7 -mattr=+sse4.1 | FileCheck %s
; rdar://12721174
; We should not fold movss into pshufd since pshufd expects m128 while movss
Modified: llvm/trunk/test/CodeGen/X86/fold-load.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fold-load.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fold-load.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fold-load.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mcpu=generic -march=x86 | FileCheck %s
+; RUN: llc < %s -mcpu=generic -mtriple=i686-- | FileCheck %s
%struct._obstack_chunk = type { i8*, %struct._obstack_chunk*, [4 x i8] }
%struct.obstack = type { i32, %struct._obstack_chunk*, i8*, i8*, i8*, i32, i32, %struct._obstack_chunk* (...)*, void (...)*, i8*, i8 }
@stmt_obstack = external global %struct.obstack ; <%struct.obstack*> [#uses=1]
Modified: llvm/trunk/test/CodeGen/X86/fold-mul-lohi.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fold-mul-lohi.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fold-mul-lohi.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fold-mul-lohi.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- | FileCheck %s
; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
; CHECK-NOT: lea
Modified: llvm/trunk/test/CodeGen/X86/fold-pcmpeqd-1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fold-pcmpeqd-1.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fold-pcmpeqd-1.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fold-pcmpeqd-1.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mattr=+sse2,-avx | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- -mattr=+sse2,-avx | FileCheck %s
define <2 x double> @foo() nounwind {
ret <2 x double> bitcast (<2 x i64><i64 -1, i64 -1> to <2 x double>)
Modified: llvm/trunk/test/CodeGen/X86/fold-sext-trunc.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fold-sext-trunc.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fold-sext-trunc.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fold-sext-trunc.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 | grep movslq | count 1
+; RUN: llc < %s -mtriple=x86_64-- | grep movslq | count 1
; PR4050
%0 = type { i64 } ; type %0
Modified: llvm/trunk/test/CodeGen/X86/fold-vector-sext-crash2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fold-vector-sext-crash2.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fold-vector-sext-crash2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fold-vector-sext-crash2.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=x86 | FileCheck %s -check-prefix=X32
-; RUN: llc < %s -march=x86-64 | FileCheck %s -check-prefix=X64
+; RUN: llc < %s -mtriple=i686-- | FileCheck %s -check-prefix=X32
+; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s -check-prefix=X64
; DAGCombiner crashes during sext folding
Modified: llvm/trunk/test/CodeGen/X86/fold-vector-shl-crash.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fold-vector-shl-crash.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fold-vector-shl-crash.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fold-vector-shl-crash.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=x86-64 | FileCheck %s
-; RUN: llc < %s -march=x86 | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- | FileCheck %s
;CHECK-LABEL: test
define <2 x i256> @test() {
Modified: llvm/trunk/test/CodeGen/X86/fp-elim.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fp-elim.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fp-elim.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fp-elim.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=x86 -asm-verbose=false | FileCheck %s -check-prefix=FP-ELIM
-; RUN: llc < %s -march=x86 -asm-verbose=false -disable-fp-elim | FileCheck %s -check-prefix=NO-ELIM
+; RUN: llc < %s -mtriple=i686-- -asm-verbose=false | FileCheck %s -check-prefix=FP-ELIM
+; RUN: llc < %s -mtriple=i686-- -asm-verbose=false -disable-fp-elim | FileCheck %s -check-prefix=NO-ELIM
; Implement -momit-leaf-frame-pointer
; rdar://7886181
Modified: llvm/trunk/test/CodeGen/X86/fp-immediate-shorten.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fp-immediate-shorten.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fp-immediate-shorten.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fp-immediate-shorten.ll Tue Aug 1 17:28:10 2017
@@ -1,6 +1,6 @@
;; Test that this FP immediate is stored in the constant pool as a float.
-; RUN: llc < %s -march=x86 -mattr=-sse2,-sse3 | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- -mattr=-sse2,-sse3 | FileCheck %s
; CHECK: {{.long.1123418112}}
Modified: llvm/trunk/test/CodeGen/X86/fp-stack-2results.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fp-stack-2results.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fp-stack-2results.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fp-stack-2results.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=x86 | grep fldz
-; RUN: llc < %s -march=x86-64 | grep fld1
+; RUN: llc < %s -mtriple=i686-- | grep fldz
+; RUN: llc < %s -mtriple=x86_64-- | grep fld1
%0 = type { x86_fp80, x86_fp80 }
Modified: llvm/trunk/test/CodeGen/X86/fp-stack-compare-cmov.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fp-stack-compare-cmov.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fp-stack-compare-cmov.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fp-stack-compare-cmov.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mcpu=pentiumpro | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- -mcpu=pentiumpro | FileCheck %s
; PR1012
define float @foo(float* %col.2.0) {
Modified: llvm/trunk/test/CodeGen/X86/fp-stack-compare.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fp-stack-compare.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fp-stack-compare.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fp-stack-compare.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mcpu=i386 | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- -mcpu=i386 | FileCheck %s
; PR6679
define float @foo(float* %col.2.0) {
Modified: llvm/trunk/test/CodeGen/X86/fp-stack-direct-ret.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fp-stack-direct-ret.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fp-stack-direct-ret.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fp-stack-direct-ret.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=x86 | not grep fstp
-; RUN: llc < %s -march=x86 -mcpu=yonah | not grep movsd
+; RUN: llc < %s -mtriple=i686-- | not grep fstp
+; RUN: llc < %s -mtriple=i686-- -mcpu=yonah | not grep movsd
declare double @foo()
Modified: llvm/trunk/test/CodeGen/X86/fp-stack-ret.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fp-stack-ret.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fp-stack-ret.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fp-stack-ret.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-apple-darwin8 -mcpu=yonah -march=x86 | FileCheck %s
+; RUN: llc < %s -mtriple=i686-apple-darwin8 -mcpu=yonah | FileCheck %s
; These testcases shouldn't require loading into an XMM register then storing
; to memory, then reloading into an FPStack reg.
Modified: llvm/trunk/test/CodeGen/X86/fp-stack-retcopy.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fp-stack-retcopy.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fp-stack-retcopy.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fp-stack-retcopy.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
; This should not copy the result of foo into an xmm register.
-; RUN: llc < %s -march=x86 -mcpu=yonah -mtriple=i686-apple-darwin9 | not grep xmm
+; RUN: llc < %s -mcpu=yonah -mtriple=i686-apple-darwin9 | not grep xmm
; rdar://5689903
declare double @foo()
Modified: llvm/trunk/test/CodeGen/X86/fp-stack-set-st1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fp-stack-set-st1.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fp-stack-set-st1.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fp-stack-set-st1.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | grep fxch | count 2
+; RUN: llc < %s -mtriple=i686-- | grep fxch | count 2
define i32 @main() nounwind {
entry:
Modified: llvm/trunk/test/CodeGen/X86/fp2sint.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fp2sint.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fp2sint.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fp2sint.ll Tue Aug 1 17:28:10 2017
@@ -1,6 +1,6 @@
;; LowerFP_TO_SINT should not create a stack object if it's not needed.
-; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep add
+; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 | not grep add
define i32 @main(i32 %argc, i8** %argv) {
cond_false.i.i.i: ; preds = %bb.i5
Modified: llvm/trunk/test/CodeGen/X86/fp_constant_op.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fp_constant_op.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fp_constant_op.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fp_constant_op.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -x86-asm-syntax=intel -mcpu=i486 | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- -x86-asm-syntax=intel -mcpu=i486 | FileCheck %s
; Test that the load of the constant is folded into the operation.
Modified: llvm/trunk/test/CodeGen/X86/fp_load_cast_fold.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fp_load_cast_fold.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fp_load_cast_fold.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fp_load_cast_fold.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- | FileCheck %s
define double @short(i16* %P) {
%V = load i16, i16* %P ; <i16> [#uses=1]
Modified: llvm/trunk/test/CodeGen/X86/fp_load_fold.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fp_load_fold.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fp_load_fold.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fp_load_fold.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | \
+; RUN: llc < %s -mtriple=i686-- -x86-asm-syntax=intel | \
; RUN: grep -i ST | not grep "fadd\|fsub\|fdiv\|fmul"
; Test that the load of the memory location is folded into the operation.
Modified: llvm/trunk/test/CodeGen/X86/fpcmp-soft-fp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fpcmp-soft-fp.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fpcmp-soft-fp.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fpcmp-soft-fp.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mcpu=pentium -mtriple=x86-linux-gnu -float-abi=soft | FileCheck %s
+; RUN: llc < %s -mcpu=pentium -mtriple=i686-linux-gnu -float-abi=soft | FileCheck %s
define i1 @test1(double %d) #0 {
entry:
Modified: llvm/trunk/test/CodeGen/X86/frameaddr.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/frameaddr.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/frameaddr.ll (original)
+++ llvm/trunk/test/CodeGen/X86/frameaddr.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=x86 | FileCheck %s --check-prefix=CHECK-32
-; RUN: llc < %s -march=x86 -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefix=CHECK-32
+; RUN: llc < %s -mtriple=i686-- | FileCheck %s --check-prefix=CHECK-32
+; RUN: llc < %s -mtriple=i686-- -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefix=CHECK-32
; RUN: llc < %s -mtriple=x86_64-pc-win32 -fast-isel | FileCheck %s --check-prefix=CHECK-W64
; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=CHECK-64
; RUN: llc < %s -mtriple=x86_64-unknown -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefix=CHECK-64
Modified: llvm/trunk/test/CodeGen/X86/fsgsbase.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fsgsbase.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fsgsbase.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fsgsbase.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -march=x86-64 -mcpu=core-avx-i -mattr=fsgsbase | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=core-avx-i -mattr=fsgsbase | FileCheck %s
define i32 @test_x86_rdfsbase_32() {
; CHECK: rdfsbasel
Modified: llvm/trunk/test/CodeGen/X86/fsxor-alignment.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fsxor-alignment.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fsxor-alignment.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fsxor-alignment.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mattr=+sse2 -enable-unsafe-fp-math | \
+; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 -enable-unsafe-fp-math | \
; RUN: grep -v sp | grep xorps | count 2
; Don't fold the incoming stack arguments into the xorps instructions used
Modified: llvm/trunk/test/CodeGen/X86/full-lsr.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/full-lsr.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/full-lsr.ll (original)
+++ llvm/trunk/test/CodeGen/X86/full-lsr.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=x86 -mcpu=generic | FileCheck %s
-; RUN: llc < %s -march=x86 -mcpu=atom | FileCheck -check-prefix=ATOM %s
+; RUN: llc < %s -mtriple=i686-- -mcpu=generic | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- -mcpu=atom | FileCheck -check-prefix=ATOM %s
define void @foo(float* nocapture %A, float* nocapture %B, float* nocapture %C, i32 %N) nounwind {
; ATOM: foo
Modified: llvm/trunk/test/CodeGen/X86/function-subtarget-features-2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/function-subtarget-features-2.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/function-subtarget-features-2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/function-subtarget-features-2.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -filetype=obj -o - | llvm-objdump -d - | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- -filetype=obj -o - | llvm-objdump -d - | FileCheck %s
; This test verifies that we assemble code for different architectures
; based on target-cpu and target-features attributes.
Modified: llvm/trunk/test/CodeGen/X86/function-subtarget-features.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/function-subtarget-features.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/function-subtarget-features.ll (original)
+++ llvm/trunk/test/CodeGen/X86/function-subtarget-features.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -o - | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- -o - | FileCheck %s
; This test verifies that we produce different code for different architectures
; based on target-cpu and target-features attributes.
Modified: llvm/trunk/test/CodeGen/X86/getelementptr.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/getelementptr.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/getelementptr.ll (original)
+++ llvm/trunk/test/CodeGen/X86/getelementptr.ll Tue Aug 1 17:28:10 2017
@@ -1,7 +1,7 @@
-; RUN: llc < %s -O0 -march=x86
-; RUN: llc < %s -O0 -march=x86-64
-; RUN: llc < %s -O2 -march=x86
-; RUN: llc < %s -O2 -march=x86-64
+; RUN: llc < %s -O0 -mtriple=i686--
+; RUN: llc < %s -O0 -mtriple=x86_64--
+; RUN: llc < %s -O2 -mtriple=i686--
+; RUN: llc < %s -O2 -mtriple=x86_64--
; Test big index trunc to pointer size:
Modified: llvm/trunk/test/CodeGen/X86/global-access-pie-copyrelocs.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/global-access-pie-copyrelocs.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/global-access-pie-copyrelocs.ll (original)
+++ llvm/trunk/test/CodeGen/X86/global-access-pie-copyrelocs.ll Tue Aug 1 17:28:10 2017
@@ -1,6 +1,6 @@
-; RUN: llc < %s -march=x86-64 -mcpu=generic -mtriple=x86_64-linux-gnu -relocation-model=pic -pie-copy-relocations \
+; RUN: llc < %s -mcpu=generic -mtriple=x86_64-linux-gnu -relocation-model=pic -pie-copy-relocations \
; RUN: | FileCheck -check-prefix=X64 %s
-; RUN: llc < %s -emulated-tls -march=x86 -mcpu=generic -mtriple=i386-linux-gnu -relocation-model=pic -pie-copy-relocations \
+; RUN: llc < %s -emulated-tls -mcpu=generic -mtriple=i386-linux-gnu -relocation-model=pic -pie-copy-relocations \
; RUN: | FileCheck -check-prefix=X32 %s
; External Linkage
Modified: llvm/trunk/test/CodeGen/X86/global-access-pie.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/global-access-pie.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/global-access-pie.ll (original)
+++ llvm/trunk/test/CodeGen/X86/global-access-pie.ll Tue Aug 1 17:28:10 2017
@@ -1,6 +1,6 @@
-; RUN: llc < %s -march=x86-64 -mcpu=generic -mtriple=x86_64-linux-gnu -relocation-model=pic \
+; RUN: llc < %s -mcpu=generic -mtriple=x86_64-linux-gnu -relocation-model=pic \
; RUN: | FileCheck -check-prefix=X64 %s
-; RUN: llc < %s -emulated-tls -march=x86 -mcpu=generic -mtriple=i386-linux-gnu -relocation-model=pic \
+; RUN: llc < %s -emulated-tls -mcpu=generic -mtriple=i386-linux-gnu -relocation-model=pic \
; RUN: | FileCheck -check-prefix=X32 %s
; External Linkage
Modified: llvm/trunk/test/CodeGen/X86/h-register-addressing-32.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/h-register-addressing-32.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/h-register-addressing-32.ll (original)
+++ llvm/trunk/test/CodeGen/X86/h-register-addressing-32.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mattr=-bmi | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- -mattr=-bmi | FileCheck %s
; Use h-register extract and zero-extend.
Modified: llvm/trunk/test/CodeGen/X86/h-register-addressing-64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/h-register-addressing-64.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/h-register-addressing-64.ll (original)
+++ llvm/trunk/test/CodeGen/X86/h-register-addressing-64.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -mattr=-bmi | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- -mattr=-bmi | FileCheck %s
; Use h-register extract and zero-extend.
Modified: llvm/trunk/test/CodeGen/X86/h-register-store.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/h-register-store.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/h-register-store.ll (original)
+++ llvm/trunk/test/CodeGen/X86/h-register-store.ll Tue Aug 1 17:28:10 2017
@@ -25,7 +25,7 @@
; W64: movb %ch, (%rdx)
; W64-NOT: mov
-; RUN: llc < %s -march=x86 | FileCheck %s -check-prefix=X86
+; RUN: llc < %s -mtriple=i686-- | FileCheck %s -check-prefix=X86
; X86-NOT: mov
; X86: movb %ah, (%e
; X86-NOT: mov
Modified: llvm/trunk/test/CodeGen/X86/h-registers-0.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/h-registers-0.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/h-registers-0.ll (original)
+++ llvm/trunk/test/CodeGen/X86/h-registers-0.ll Tue Aug 1 17:28:10 2017
@@ -1,7 +1,7 @@
; RUN: llc < %s -mattr=-bmi -mtriple=x86_64-linux | FileCheck %s -check-prefix=X86-64
; RUN: llc < %s -mattr=-bmi -mtriple=x86_64-linux-gnux32 | FileCheck %s -check-prefix=X86-64
; RUN: llc < %s -mattr=-bmi -mtriple=x86_64-win32 | FileCheck %s -check-prefix=WIN64
-; RUN: llc < %s -mattr=-bmi -march=x86 | FileCheck %s -check-prefix=X86-32
+; RUN: llc < %s -mattr=-bmi -mtriple=i686-- | FileCheck %s -check-prefix=X86-32
; Use h registers. On x86-64, codegen doesn't support general allocation
; of h registers yet, due to x86 encoding complications.
Modified: llvm/trunk/test/CodeGen/X86/h-registers-2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/h-registers-2.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/h-registers-2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/h-registers-2.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- | FileCheck %s
; Use an h register, but don't omit the explicit shift for
; non-address use(s).
Modified: llvm/trunk/test/CodeGen/X86/handle-move.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/handle-move.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/handle-move.ll (original)
+++ llvm/trunk/test/CodeGen/X86/handle-move.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
-; RUN: llc -march=x86-64 -mcpu=core2 -fast-isel -enable-misched -misched=shuffle -misched-bottomup -verify-machineinstrs < %s
-; RUN: llc -march=x86-64 -mcpu=core2 -fast-isel -enable-misched -misched=shuffle -misched-topdown -verify-machineinstrs < %s
+; RUN: llc -mtriple=x86_64-- -mcpu=core2 -fast-isel -enable-misched -misched=shuffle -misched-bottomup -verify-machineinstrs < %s
+; RUN: llc -mtriple=x86_64-- -mcpu=core2 -fast-isel -enable-misched -misched=shuffle -misched-topdown -verify-machineinstrs < %s
; REQUIRES: asserts
;
; Test the LiveIntervals::handleMove() function.
Modified: llvm/trunk/test/CodeGen/X86/i128-and-beyond.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/i128-and-beyond.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/i128-and-beyond.ll (original)
+++ llvm/trunk/test/CodeGen/X86/i128-and-beyond.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mtriple=i686-pc-linux-gnu | grep -- -1 | count 14
+; RUN: llc < %s -mtriple=i686-pc-linux-gnu | grep -- -1 | count 14
; These static initializers are too big to hand off to assemblers
; as monolithic blobs.
Modified: llvm/trunk/test/CodeGen/X86/i128-immediate.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/i128-immediate.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/i128-immediate.ll (original)
+++ llvm/trunk/test/CodeGen/X86/i128-immediate.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 | grep movq | count 2
+; RUN: llc < %s -mtriple=x86_64-- | grep movq | count 2
define i128 @__addvti3() {
ret i128 -1
Modified: llvm/trunk/test/CodeGen/X86/i128-mul.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/i128-mul.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/i128-mul.ll (original)
+++ llvm/trunk/test/CodeGen/X86/i128-mul.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -mcpu=corei7 | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=corei7 | FileCheck %s
; PR1198
define i64 @foo(i64 %x, i64 %y) {
Modified: llvm/trunk/test/CodeGen/X86/i128-sdiv.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/i128-sdiv.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/i128-sdiv.ll (original)
+++ llvm/trunk/test/CodeGen/X86/i128-sdiv.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
; Make sure none of these crash, and that the power-of-two transformations
; trigger correctly.
Modified: llvm/trunk/test/CodeGen/X86/i16lshr8pat.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/i16lshr8pat.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/i16lshr8pat.ll (original)
+++ llvm/trunk/test/CodeGen/X86/i16lshr8pat.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc -march=x86 -stop-after expand-isel-pseudos <%s 2>&1 | FileCheck %s
+; RUN: llc -stop-after expand-isel-pseudos <%s 2>&1 | FileCheck %s
target datalayout = "e-m:e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"
target triple = "i386-unknown-linux-gnu"
Modified: llvm/trunk/test/CodeGen/X86/i2k.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/i2k.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/i2k.ll (original)
+++ llvm/trunk/test/CodeGen/X86/i2k.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86
+; RUN: llc < %s -mtriple=i686--
define void @foo(i2011* %x, i2011* %y, i2011* %p) nounwind {
%a = load i2011, i2011* %x
Modified: llvm/trunk/test/CodeGen/X86/i486-fence-loop.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/i486-fence-loop.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/i486-fence-loop.ll (original)
+++ llvm/trunk/test/CodeGen/X86/i486-fence-loop.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc -march=x86 -mcpu=i486 -o - %s | FileCheck %s
+; RUN: llc -mtriple=i686-- -mcpu=i486 -o - %s | FileCheck %s
; Main test here was that ISelDAG could cope with a MachineNode in the chain
; from the first load to the "X86ISD::SUB". Previously it thought that meant no
Modified: llvm/trunk/test/CodeGen/X86/iabs.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/iabs.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/iabs.ll (original)
+++ llvm/trunk/test/CodeGen/X86/iabs.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
;; Integer absolute value, should produce something at least as good as:
;; movl %edi, %eax
Modified: llvm/trunk/test/CodeGen/X86/illegal-insert.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/illegal-insert.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/illegal-insert.ll (original)
+++ llvm/trunk/test/CodeGen/X86/illegal-insert.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64
+; RUN: llc < %s -mtriple=x86_64--
define <4 x double> @foo0(<4 x double> %t) {
%r = insertelement <4 x double> %t, double 2.3, i32 0
Modified: llvm/trunk/test/CodeGen/X86/illegal-vector-args-return.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/illegal-vector-args-return.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/illegal-vector-args-return.ll (original)
+++ llvm/trunk/test/CodeGen/X86/illegal-vector-args-return.ll Tue Aug 1 17:28:10 2017
@@ -1,7 +1,7 @@
-; RUN: llc < %s -march=x86 -mattr=+sse2 -mcpu=nehalem | grep "mulpd %xmm3, %xmm1"
-; RUN: llc < %s -march=x86 -mattr=+sse2 -mcpu=nehalem | grep "mulpd %xmm2, %xmm0"
-; RUN: llc < %s -march=x86 -mattr=+sse2 -mcpu=nehalem | grep "addps %xmm3, %xmm1"
-; RUN: llc < %s -march=x86 -mattr=+sse2 -mcpu=nehalem | grep "addps %xmm2, %xmm0"
+; RUN: llc < %s -mattr=+sse2 -mcpu=nehalem | grep "mulpd %xmm3, %xmm1"
+; RUN: llc < %s -mattr=+sse2 -mcpu=nehalem | grep "mulpd %xmm2, %xmm0"
+; RUN: llc < %s -mattr=+sse2 -mcpu=nehalem | grep "addps %xmm3, %xmm1"
+; RUN: llc < %s -mattr=+sse2 -mcpu=nehalem | grep "addps %xmm2, %xmm0"
target triple = "i686-apple-darwin8"
Modified: llvm/trunk/test/CodeGen/X86/imul-lea-2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/imul-lea-2.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/imul-lea-2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/imul-lea-2.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
; CHECK-NOT: imul
Modified: llvm/trunk/test/CodeGen/X86/imul-lea.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/imul-lea.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/imul-lea.ll (original)
+++ llvm/trunk/test/CodeGen/X86/imul-lea.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- | FileCheck %s
declare i32 @foo()
Modified: llvm/trunk/test/CodeGen/X86/inline-asm-R-constraint.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/inline-asm-R-constraint.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/inline-asm-R-constraint.ll (original)
+++ llvm/trunk/test/CodeGen/X86/inline-asm-R-constraint.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc -march=x86-64 < %s | FileCheck %s
+; RUN: llc < %s | FileCheck %s
; 7282062
; ModuleID = '<stdin>'
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
Modified: llvm/trunk/test/CodeGen/X86/inline-asm-avx-v-constraint.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/inline-asm-avx-v-constraint.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/inline-asm-avx-v-constraint.ll (original)
+++ llvm/trunk/test/CodeGen/X86/inline-asm-avx-v-constraint.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march x86-64 -mtriple x86_64-unknown-linux-gnu -mattr +avx | FileCheck %s
-; RUN: llc < %s -march x86-64 -mtriple x86_64-unknown-linux-gnu -mattr +avx512f | FileCheck %s
+; RUN: llc < %s -mtriple x86_64-unknown-linux-gnu -mattr +avx | FileCheck %s
+; RUN: llc < %s -mtriple x86_64-unknown-linux-gnu -mattr +avx512f | FileCheck %s
define <4 x float> @testXMM_1(<4 x float> %_xmm0, i64 %_l) {
; CHECK: vmovhlps %xmm1, %xmm0, %xmm0
Modified: llvm/trunk/test/CodeGen/X86/inline-asm-avx512f-v-constraint.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/inline-asm-avx512f-v-constraint.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/inline-asm-avx512f-v-constraint.ll (original)
+++ llvm/trunk/test/CodeGen/X86/inline-asm-avx512f-v-constraint.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march x86-64 -mtriple x86_64-unknown-linux-gnu -mattr +avx512f | FileCheck %s
+; RUN: llc < %s -mtriple x86_64-unknown-linux-gnu -mattr +avx512f | FileCheck %s
define <16 x float> @testZMM_1(<16 x float> %_zmm0, <16 x float> %_zmm1) {
entry:
Modified: llvm/trunk/test/CodeGen/X86/inline-asm-avx512vl-v-constraint.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/inline-asm-avx512vl-v-constraint.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/inline-asm-avx512vl-v-constraint.ll (original)
+++ llvm/trunk/test/CodeGen/X86/inline-asm-avx512vl-v-constraint.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march x86-64 -mtriple x86_64-unknown-linux-gnu -mattr +avx512vl | FileCheck %s
+; RUN: llc < %s -mtriple x86_64-unknown-linux-gnu -mattr +avx512vl | FileCheck %s
define <4 x float> @testXMM_1(<4 x float> %_xmm0, i64 %_l) {
entry:
Modified: llvm/trunk/test/CodeGen/X86/inline-asm-bad-constraint-n.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/inline-asm-bad-constraint-n.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/inline-asm-bad-constraint-n.ll (original)
+++ llvm/trunk/test/CodeGen/X86/inline-asm-bad-constraint-n.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: not llc -march=x86 -no-integrated-as < %s 2>&1 | FileCheck %s
+; RUN: not llc -mtriple=i686-- -no-integrated-as < %s 2>&1 | FileCheck %s
@x = global i32 0, align 4
Modified: llvm/trunk/test/CodeGen/X86/inline-asm-duplicated-constraint.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/inline-asm-duplicated-constraint.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/inline-asm-duplicated-constraint.ll (original)
+++ llvm/trunk/test/CodeGen/X86/inline-asm-duplicated-constraint.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -no-integrated-as -mtriple=x86_64-linux-gnu | FileCheck %s
+; RUN: llc < %s -no-integrated-as -mtriple=x86_64-linux-gnu | FileCheck %s
; CHECK-LABEL: test1:
; CHECK: movl (%rdi), %eax
Modified: llvm/trunk/test/CodeGen/X86/inline-asm-error.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/inline-asm-error.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/inline-asm-error.ll (original)
+++ llvm/trunk/test/CodeGen/X86/inline-asm-error.ll Tue Aug 1 17:28:10 2017
@@ -1,6 +1,6 @@
-; RUN: not llc -march x86 -regalloc=fast -optimize-regalloc=0 < %s 2> %t1
-; RUN: not llc -march x86 -regalloc=basic < %s 2> %t2
-; RUN: not llc -march x86 -regalloc=greedy < %s 2> %t3
+; RUN: not llc -mtriple=i686-- -regalloc=fast -optimize-regalloc=0 < %s 2> %t1
+; RUN: not llc -mtriple=i686-- -regalloc=basic < %s 2> %t2
+; RUN: not llc -mtriple=i686-- -regalloc=greedy < %s 2> %t3
; RUN: FileCheck %s < %t1
; RUN: FileCheck %s < %t2
; RUN: FileCheck %s < %t3
Modified: llvm/trunk/test/CodeGen/X86/inline-asm-flag-clobber.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/inline-asm-flag-clobber.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/inline-asm-flag-clobber.ll (original)
+++ llvm/trunk/test/CodeGen/X86/inline-asm-flag-clobber.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc -march=x86-64 -no-integrated-as < %s | FileCheck %s
+; RUN: llc -mtriple=x86_64-- -no-integrated-as < %s | FileCheck %s
; PR3701
define i64 @t(i64* %arg) nounwind {
Modified: llvm/trunk/test/CodeGen/X86/inline-asm-modifier-n.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/inline-asm-modifier-n.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/inline-asm-modifier-n.ll (original)
+++ llvm/trunk/test/CodeGen/X86/inline-asm-modifier-n.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -no-integrated-as | grep " 37"
+; RUN: llc < %s -mtriple=i686-- -no-integrated-as | grep " 37"
; rdar://7008959
define void @bork() nounwind {
Modified: llvm/trunk/test/CodeGen/X86/inline-asm-modifier-q.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/inline-asm-modifier-q.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/inline-asm-modifier-q.ll (original)
+++ llvm/trunk/test/CodeGen/X86/inline-asm-modifier-q.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -no-integrated-as | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- -no-integrated-as | FileCheck %s
; If the target does not have 64-bit integer registers, emit 32-bit register
; names.
Modified: llvm/trunk/test/CodeGen/X86/inline-asm-mrv.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/inline-asm-mrv.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/inline-asm-mrv.ll (original)
+++ llvm/trunk/test/CodeGen/X86/inline-asm-mrv.ll Tue Aug 1 17:28:10 2017
@@ -1,8 +1,8 @@
; PR2094
-; RUN: llc < %s -march=x86-64 -no-integrated-as | grep movslq
-; RUN: llc < %s -march=x86-64 -no-integrated-as | grep addps
-; RUN: llc < %s -march=x86-64 -no-integrated-as | grep paddd
-; RUN: llc < %s -march=x86-64 -no-integrated-as | not grep movq
+; RUN: llc < %s -no-integrated-as | grep movslq
+; RUN: llc < %s -no-integrated-as | grep addps
+; RUN: llc < %s -no-integrated-as | grep paddd
+; RUN: llc < %s -no-integrated-as | not grep movq
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
target triple = "x86_64-apple-darwin8"
Modified: llvm/trunk/test/CodeGen/X86/inline-asm-q-regs.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/inline-asm-q-regs.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/inline-asm-q-regs.ll (original)
+++ llvm/trunk/test/CodeGen/X86/inline-asm-q-regs.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -mattr=+avx -no-integrated-as
+; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx -no-integrated-as
; rdar://7066579
%0 = type { i64, i64, i64, i64, i64 } ; type %0
Modified: llvm/trunk/test/CodeGen/X86/inline-asm-stack-realign3.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/inline-asm-stack-realign3.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/inline-asm-stack-realign3.ll (original)
+++ llvm/trunk/test/CodeGen/X86/inline-asm-stack-realign3.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc -march=x86 -no-integrated-as < %s | FileCheck %s
+; RUN: llc -mtriple=i686-- -no-integrated-as < %s | FileCheck %s
declare void @bar(i32* %junk)
Modified: llvm/trunk/test/CodeGen/X86/inline-asm-x-scalar.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/inline-asm-x-scalar.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/inline-asm-x-scalar.ll (original)
+++ llvm/trunk/test/CodeGen/X86/inline-asm-x-scalar.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mcpu=yonah -no-integrated-as
+; RUN: llc < %s -mtriple=i686-- -mcpu=yonah -no-integrated-as
define void @test1() {
tail call void asm sideeffect "ucomiss $0", "x"( float 0x41E0000000000000)
Modified: llvm/trunk/test/CodeGen/X86/inline-asm.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/inline-asm.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/inline-asm.ll (original)
+++ llvm/trunk/test/CodeGen/X86/inline-asm.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -no-integrated-as
+; RUN: llc < %s -mtriple=i686-- -no-integrated-as
define i32 @test1() nounwind {
; Dest is AX, dest type = i32.
Modified: llvm/trunk/test/CodeGen/X86/inlineasm-sched-bug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/inlineasm-sched-bug.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/inlineasm-sched-bug.ll (original)
+++ llvm/trunk/test/CodeGen/X86/inlineasm-sched-bug.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
; PR13504
-; RUN: llc -march=x86 -mcpu=atom <%s | FileCheck %s
+; RUN: llc -mtriple=i686-- -mcpu=atom <%s | FileCheck %s
; CHECK: bsfl
; CHECK-NOT: movl
Modified: llvm/trunk/test/CodeGen/X86/ins_split_regalloc.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/ins_split_regalloc.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/ins_split_regalloc.ll (original)
+++ llvm/trunk/test/CodeGen/X86/ins_split_regalloc.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc -O1 -regalloc=greedy -mtriple=x86_64-apple-macosx -march x86-64 < %s -o - | FileCheck %s
+; RUN: llc -O1 -regalloc=greedy -mtriple=x86_64-apple-macosx < %s -o - | FileCheck %s
; Check that last chance split (RAGreedy::tryInstructonSplit) just split
; when this is beneficial, otherwise we end up with uncoalesced copies.
; <rdar://problem/15570057>
Modified: llvm/trunk/test/CodeGen/X86/ins_subreg_coalesce-1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/ins_subreg_coalesce-1.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/ins_subreg_coalesce-1.ll (original)
+++ llvm/trunk/test/CodeGen/X86/ins_subreg_coalesce-1.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mattr=-bmi | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- -mattr=-bmi | FileCheck %s
define fastcc i32 @t() nounwind {
entry:
Modified: llvm/trunk/test/CodeGen/X86/ins_subreg_coalesce-2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/ins_subreg_coalesce-2.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/ins_subreg_coalesce-2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/ins_subreg_coalesce-2.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 | not grep movw
+; RUN: llc < %s -mtriple=x86_64-- | not grep movw
define i16 @test5(i16 %f12) nounwind {
%f11 = shl i16 %f12, 2 ; <i16> [#uses=1]
Modified: llvm/trunk/test/CodeGen/X86/ins_subreg_coalesce-3.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/ins_subreg_coalesce-3.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/ins_subreg_coalesce-3.ll (original)
+++ llvm/trunk/test/CodeGen/X86/ins_subreg_coalesce-3.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 | grep mov | count 3
+; RUN: llc < %s -mtriple=x86_64-- | grep mov | count 3
%struct.COMPOSITE = type { i8, i16, i16 }
%struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 }
Modified: llvm/trunk/test/CodeGen/X86/insert-positions.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/insert-positions.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/insert-positions.ll (original)
+++ llvm/trunk/test/CodeGen/X86/insert-positions.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 >/dev/null
+; RUN: llc < %s -mtriple=x86_64-- >/dev/null
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
Modified: llvm/trunk/test/CodeGen/X86/insertelement-copytoregs.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/insertelement-copytoregs.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/insertelement-copytoregs.ll (original)
+++ llvm/trunk/test/CodeGen/X86/insertelement-copytoregs.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
; CHECK-NOT: IMPLICIT_DEF
define void @foo(<2 x float>* %p) {
Modified: llvm/trunk/test/CodeGen/X86/insertelement-legalize.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/insertelement-legalize.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/insertelement-legalize.ll (original)
+++ llvm/trunk/test/CodeGen/X86/insertelement-legalize.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86
+; RUN: llc < %s -mtriple=i686--
; Test to check that we properly legalize an insert vector element
define void @test(<2 x i64> %val, <2 x i64>* %dst, i64 %x) nounwind {
Modified: llvm/trunk/test/CodeGen/X86/int-intrinsic.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/int-intrinsic.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/int-intrinsic.ll (original)
+++ llvm/trunk/test/CodeGen/X86/int-intrinsic.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=x86 | FileCheck %s
-; RUN: llc < %s -march=x86-64 | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
declare void @llvm.x86.int(i8) nounwind
Modified: llvm/trunk/test/CodeGen/X86/invalid-liveness.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/invalid-liveness.mir?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/invalid-liveness.mir (original)
+++ llvm/trunk/test/CodeGen/X86/invalid-liveness.mir Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-# RUN: not llc -march=x86 -run-pass liveintervals -o - %s 2>&1 | FileCheck %s
+# RUN: not llc -mtriple=i686-- -run-pass liveintervals -o - %s 2>&1 | FileCheck %s
# REQUIRES: asserts
--- |
Modified: llvm/trunk/test/CodeGen/X86/invalid-shift-immediate.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/invalid-shift-immediate.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/invalid-shift-immediate.ll (original)
+++ llvm/trunk/test/CodeGen/X86/invalid-shift-immediate.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86
+; RUN: llc < %s
; PR2098
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
Modified: llvm/trunk/test/CodeGen/X86/isel-optnone.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/isel-optnone.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/isel-optnone.ll (original)
+++ llvm/trunk/test/CodeGen/X86/isel-optnone.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc -O2 -march=x86 < %s | FileCheck %s
+; RUN: llc -O2 -mtriple=i686-- < %s | FileCheck %s
define i32* @fooOptnone(i32* %p, i32* %q, i32** %z) #0 {
entry:
Modified: llvm/trunk/test/CodeGen/X86/isel-sink.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/isel-sink.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/isel-sink.ll (original)
+++ llvm/trunk/test/CodeGen/X86/isel-sink.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- | FileCheck %s
define i32 @test(i32* %X, i32 %B) {
; CHECK-LABEL: test:
Modified: llvm/trunk/test/CodeGen/X86/isel-sink2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/isel-sink2.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/isel-sink2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/isel-sink2.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 > %t
+; RUN: llc < %s -mtriple=i686-- > %t
; RUN: grep "movb.7(%...)" %t
; RUN: not grep leal %t
Modified: llvm/trunk/test/CodeGen/X86/isnan.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/isnan.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/isnan.ll (original)
+++ llvm/trunk/test/CodeGen/X86/isnan.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | not grep call
+; RUN: llc < %s -mtriple=i686-- | not grep call
declare i1 @llvm.isunordered.f64(double)
Modified: llvm/trunk/test/CodeGen/X86/isnan2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/isnan2.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/isnan2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/isnan2.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mcpu=yonah | not grep pxor
+; RUN: llc < %s -mtriple=i686-- -mcpu=yonah | not grep pxor
; This should not need to materialize 0.0 to evaluate the condition.
Modified: llvm/trunk/test/CodeGen/X86/ispositive.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/ispositive.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/ispositive.ll (original)
+++ llvm/trunk/test/CodeGen/X86/ispositive.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | grep "shrl.*31"
+; RUN: llc < %s -mtriple=i686-- | grep "shrl.*31"
define i32 @test1(i32 %X) {
entry:
Modified: llvm/trunk/test/CodeGen/X86/lakemont.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/lakemont.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/lakemont.ll (original)
+++ llvm/trunk/test/CodeGen/X86/lakemont.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mcpu=lakemont | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- -mcpu=lakemont | FileCheck %s
; Make sure -mcpu=lakemont implies soft floats.
define float @test(float %a, float %b) nounwind readnone {
Modified: llvm/trunk/test/CodeGen/X86/large-code-model-isel.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/large-code-model-isel.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/large-code-model-isel.ll (original)
+++ llvm/trunk/test/CodeGen/X86/large-code-model-isel.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -code-model=large -mcpu=core2 -march=x86-64 -O0 | FileCheck %s
+; RUN: llc < %s -code-model=large -mcpu=core2 -mtriple=x86_64-- -O0 | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
Modified: llvm/trunk/test/CodeGen/X86/large-gep-chain.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/large-gep-chain.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/large-gep-chain.ll (original)
+++ llvm/trunk/test/CodeGen/X86/large-gep-chain.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -O0 -march x86 -o /dev/null
+; RUN: llc < %s -O0 -mtriple=i686-- -o /dev/null
; <rdar://problem/12445434>
%0 = type { i32, float* }
Modified: llvm/trunk/test/CodeGen/X86/large-gep-scale.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/large-gep-scale.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/large-gep-scale.ll (original)
+++ llvm/trunk/test/CodeGen/X86/large-gep-scale.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- | FileCheck %s
; PR5281
; After scaling, this type doesn't fit in memory. Codegen should generate
Modified: llvm/trunk/test/CodeGen/X86/lea-opt-memop-check-1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/lea-opt-memop-check-1.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/lea-opt-memop-check-1.ll (original)
+++ llvm/trunk/test/CodeGen/X86/lea-opt-memop-check-1.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mtriple=i686-pc-win32 | FileCheck %s
+; RUN: llc < %s -mtriple=i686-pc-win32 | FileCheck %s
; PR26575
; Assertion `(Disp->isImm() || Disp->isGlobal()) && (Other.Disp->isImm() || Other.Disp->isGlobal()) && "Address displacement operand is always an immediate or a global"' failed.
Modified: llvm/trunk/test/CodeGen/X86/lea-recursion.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/lea-recursion.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/lea-recursion.ll (original)
+++ llvm/trunk/test/CodeGen/X86/lea-recursion.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 | grep lea | count 13
+; RUN: llc < %s -mtriple=x86_64-- | grep lea | count 13
; This testcase was written to demonstrate an instruction-selection problem,
; however it also happens to expose a limitation in the DAGCombiner's
Modified: llvm/trunk/test/CodeGen/X86/legalize-fmp-oeq-vector-select.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/legalize-fmp-oeq-vector-select.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/legalize-fmp-oeq-vector-select.ll (original)
+++ llvm/trunk/test/CodeGen/X86/legalize-fmp-oeq-vector-select.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc -march=x86-64 -enable-legalize-types-checking < %s
+; RUN: llc -mtriple=x86_64-- -enable-legalize-types-checking < %s
; PR5092
define <4 x float> @bug(float %a) nounwind {
Modified: llvm/trunk/test/CodeGen/X86/legalize-libcalls.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/legalize-libcalls.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/legalize-libcalls.ll (original)
+++ llvm/trunk/test/CodeGen/X86/legalize-libcalls.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
-; RUN: llc -march=x86 < %s
-; RUN: llc -march=x86-64 < %s
+; RUN: llc -mtriple=i686-- < %s
+; RUN: llc -mtriple=x86_64-- < %s
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32-S128"
Modified: llvm/trunk/test/CodeGen/X86/legalizedag_vec.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/legalizedag_vec.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/legalizedag_vec.ll (original)
+++ llvm/trunk/test/CodeGen/X86/legalizedag_vec.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mattr=sse2 | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- -mattr=sse2 | FileCheck %s
; Test case for r63760 where we generate a legalization assert that an illegal
Modified: llvm/trunk/test/CodeGen/X86/licm-nested.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/licm-nested.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/licm-nested.ll (original)
+++ llvm/trunk/test/CodeGen/X86/licm-nested.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
; REQUIRES: asserts
-; RUN: llc -mtriple=x86_64-apple-darwin -march=x86-64 < %s -o /dev/null -stats -info-output-file - | grep "hoisted out of loops" | grep 5
+; RUN: llc -mtriple=x86_64-apple-darwin < %s -o /dev/null -stats -info-output-file - | grep "hoisted out of loops" | grep 5
; MachineLICM should be able to hoist the symbolic addresses out of
; the inner loops.
Modified: llvm/trunk/test/CodeGen/X86/limited-prec.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/limited-prec.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/limited-prec.ll (original)
+++ llvm/trunk/test/CodeGen/X86/limited-prec.ll Tue Aug 1 17:28:10 2017
@@ -1,8 +1,8 @@
-; RUN: llc < %s -limit-float-precision=6 -march=x86 | \
+; RUN: llc < %s -limit-float-precision=6 -mtriple=i686-- | \
; RUN: not grep exp | not grep log | not grep pow
-; RUN: llc < %s -limit-float-precision=12 -march=x86 | \
+; RUN: llc < %s -limit-float-precision=12 -mtriple=i686-- | \
; RUN: not grep exp | not grep log | not grep pow
-; RUN: llc < %s -limit-float-precision=18 -march=x86 | \
+; RUN: llc < %s -limit-float-precision=18 -mtriple=i686-- | \
; RUN: not grep exp | not grep log | not grep pow
define float @f1(float %x) nounwind noinline {
Modified: llvm/trunk/test/CodeGen/X86/live-out-reg-info.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/live-out-reg-info.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/live-out-reg-info.ll (original)
+++ llvm/trunk/test/CodeGen/X86/live-out-reg-info.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 | grep testb
+; RUN: llc < %s -mtriple=x86_64-- | grep testb
; Make sure dagcombine doesn't eliminate the comparison due
; to an off-by-one bug with computeKnownBits information.
Modified: llvm/trunk/test/CodeGen/X86/live-range-nosubreg.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/live-range-nosubreg.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/live-range-nosubreg.ll (original)
+++ llvm/trunk/test/CodeGen/X86/live-range-nosubreg.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc -march=x86-64 < %s
+; RUN: llc < %s
; This testcase used to crash. See PR29132.
Modified: llvm/trunk/test/CodeGen/X86/llc-override-mcpu-mattr.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/llc-override-mcpu-mattr.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/llc-override-mcpu-mattr.ll (original)
+++ llvm/trunk/test/CodeGen/X86/llc-override-mcpu-mattr.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march x86-64 -mcpu=broadwell | FileCheck %s
-; RUN: llc < %s -march x86-64 -mattr=+avx2 | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=broadwell | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s
; Check that llc can overide function attributes target-cpu and target-features
; using command line options -mcpu and -mattr.
Modified: llvm/trunk/test/CodeGen/X86/long-setcc.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/long-setcc.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/long-setcc.ll (original)
+++ llvm/trunk/test/CodeGen/X86/long-setcc.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- | FileCheck %s
define i1 @t1(i64 %x) nounwind {
%B = icmp slt i64 %x, 0
Modified: llvm/trunk/test/CodeGen/X86/loop-blocks.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/loop-blocks.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/loop-blocks.ll (original)
+++ llvm/trunk/test/CodeGen/X86/loop-blocks.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -mtriple=x86_64-unknown-linux-gnu -asm-verbose=false | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -asm-verbose=false | FileCheck %s
; These tests check for loop branching structure, and that the loop align
; directive is placed in the expected place.
Modified: llvm/trunk/test/CodeGen/X86/loop-strength-reduce-2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/loop-strength-reduce-2.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/loop-strength-reduce-2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/loop-strength-reduce-2.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=x86 -relocation-model=pic | FileCheck %s -check-prefix=PIC
-; RUN: llc < %s -march=x86 -relocation-model=static | FileCheck %s -check-prefix=STATIC
+; RUN: llc < %s -mtriple=i686-- -relocation-model=pic | FileCheck %s -check-prefix=PIC
+; RUN: llc < %s -mtriple=i686-- -relocation-model=static | FileCheck %s -check-prefix=STATIC
;
; Make sure the common loop invariant A is hoisted up to preheader,
; since too many registers are needed to subsume it into the addressing modes.
Modified: llvm/trunk/test/CodeGen/X86/loop-strength-reduce.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/loop-strength-reduce.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/loop-strength-reduce.ll (original)
+++ llvm/trunk/test/CodeGen/X86/loop-strength-reduce.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -relocation-model=static | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- -relocation-model=static | FileCheck %s
; CHECK: align
; CHECK: movl $4, -4(%ecx)
Modified: llvm/trunk/test/CodeGen/X86/loop-strength-reduce5.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/loop-strength-reduce5.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/loop-strength-reduce5.ll (original)
+++ llvm/trunk/test/CodeGen/X86/loop-strength-reduce5.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | grep inc | count 1
+; RUN: llc < %s -mtriple=i686-- | grep inc | count 1
@X = weak global i16 0 ; <i16*> [#uses=1]
@Y = weak global i16 0 ; <i16*> [#uses=1]
Modified: llvm/trunk/test/CodeGen/X86/loop-strength-reduce6.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/loop-strength-reduce6.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/loop-strength-reduce6.ll (original)
+++ llvm/trunk/test/CodeGen/X86/loop-strength-reduce6.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 | not grep inc
+; RUN: llc < %s -mtriple=x86_64-- | not grep inc
define fastcc i32 @decodeMP3(i32 %isize, i32* %done) nounwind {
entry:
Modified: llvm/trunk/test/CodeGen/X86/loop-strength-reduce7.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/loop-strength-reduce7.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/loop-strength-reduce7.ll (original)
+++ llvm/trunk/test/CodeGen/X86/loop-strength-reduce7.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | not grep imul
+; RUN: llc < %s | not grep imul
target triple = "i386-apple-darwin9.6"
%struct.III_psy_xmin = type { [22 x double], [13 x [3 x double]] }
Modified: llvm/trunk/test/CodeGen/X86/lsr-delayed-fold.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/lsr-delayed-fold.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/lsr-delayed-fold.ll (original)
+++ llvm/trunk/test/CodeGen/X86/lsr-delayed-fold.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc -march=x86-64 < %s > /dev/null
+; RUN: llc < %s > /dev/null
; ScalarEvolution misses an opportunity to fold ((trunc x) + (trunc -x) + y),
; but LSR should tolerate this.
Modified: llvm/trunk/test/CodeGen/X86/lsr-i386.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/lsr-i386.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/lsr-i386.ll (original)
+++ llvm/trunk/test/CodeGen/X86/lsr-i386.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc -march=x86 < %s | FileCheck %s
+; RUN: llc < %s | FileCheck %s
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32"
target triple = "i386-pc-linux-gnu"
; PR7651
Modified: llvm/trunk/test/CodeGen/X86/lsr-interesting-step.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/lsr-interesting-step.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/lsr-interesting-step.ll (original)
+++ llvm/trunk/test/CodeGen/X86/lsr-interesting-step.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -relocation-model=static -mtriple=x86_64-unknown-linux-gnu -asm-verbose=0 | FileCheck %s
+; RUN: llc < %s -relocation-model=static -mtriple=x86_64-unknown-linux-gnu -asm-verbose=0 | FileCheck %s
; The inner loop should require only one add (and no leas either).
; rdar://8100380
Modified: llvm/trunk/test/CodeGen/X86/lsr-negative-stride.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/lsr-negative-stride.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/lsr-negative-stride.ll (original)
+++ llvm/trunk/test/CodeGen/X86/lsr-negative-stride.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 > %t
+; RUN: llc < %s -mtriple=i686-- > %t
; RUN: not grep neg %t
; RUN: not grep sub.*esp %t
; RUN: not grep esi %t
Modified: llvm/trunk/test/CodeGen/X86/lsr-nonaffine.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/lsr-nonaffine.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/lsr-nonaffine.ll (original)
+++ llvm/trunk/test/CodeGen/X86/lsr-nonaffine.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc -asm-verbose=false -march=x86-64 -mtriple=x86_64-apple-darwin -o - < %s | FileCheck %s
+; RUN: llc -asm-verbose=false -mtriple=x86_64-apple-darwin -o - < %s | FileCheck %s
; LSR should leave non-affine expressions alone because it currently
; doesn't know how to do anything with them, and when it tries, it
Modified: llvm/trunk/test/CodeGen/X86/lsr-normalization.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/lsr-normalization.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/lsr-normalization.ll (original)
+++ llvm/trunk/test/CodeGen/X86/lsr-normalization.ll Tue Aug 1 17:28:10 2017
@@ -1,6 +1,6 @@
; REQUIRES: asserts
-; RUN: llc < %s -march=x86-64 | FileCheck %s --check-prefix=ASM
-; RUN: llc -debug -o /dev/null < %s -march=x86-64 2>&1 | FileCheck %s --check-prefix=DBG
+; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefix=ASM
+; RUN: llc -debug -o /dev/null < %s -mtriple=x86_64-- 2>&1 | FileCheck %s --check-prefix=DBG
; rdar://8168938
; This testcase involves SCEV normalization with the exit value from
Modified: llvm/trunk/test/CodeGen/X86/lsr-quadratic-expand.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/lsr-quadratic-expand.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/lsr-quadratic-expand.ll (original)
+++ llvm/trunk/test/CodeGen/X86/lsr-quadratic-expand.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc -march=x86-64 < %s
+; RUN: llc -mtriple=x86_64-- < %s
define void @dw2102_i2c_transfer() nounwind {
entry:
Modified: llvm/trunk/test/CodeGen/X86/lsr-redundant-addressing.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/lsr-redundant-addressing.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/lsr-redundant-addressing.ll (original)
+++ llvm/trunk/test/CodeGen/X86/lsr-redundant-addressing.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc -march=x86-64 < %s | FileCheck %s
+; RUN: llc -mtriple=x86_64-- < %s | FileCheck %s
; rdar://9081094
; LSR shouldn't create lots of redundant address computations.
Modified: llvm/trunk/test/CodeGen/X86/lsr-reuse.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/lsr-reuse.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/lsr-reuse.ll (original)
+++ llvm/trunk/test/CodeGen/X86/lsr-reuse.ll Tue Aug 1 17:28:10 2017
@@ -1,6 +1,6 @@
; XFAIL: *
; ...should pass. See PR12324: misched bringup
-; RUN: llc < %s -march=x86-64 -O3 -asm-verbose=false | FileCheck %s
+; RUN: llc < %s -O3 -asm-verbose=false | FileCheck %s
target datalayout = "e-p:64:64:64"
target triple = "x86_64-unknown-unknown"
Modified: llvm/trunk/test/CodeGen/X86/lsr-sort.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/lsr-sort.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/lsr-sort.ll (original)
+++ llvm/trunk/test/CodeGen/X86/lsr-sort.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 > %t
+; RUN: llc < %s -mtriple=x86_64-- > %t
; RUN: grep inc %t | count 1
; RUN: not grep incw %t
Modified: llvm/trunk/test/CodeGen/X86/lsr-static-addr.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/lsr-static-addr.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/lsr-static-addr.ll (original)
+++ llvm/trunk/test/CodeGen/X86/lsr-static-addr.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
-; RUN: llc -march=x86-64 -mcpu=generic -mtriple=x86_64-unknown-linux-gnu -relocation-model=static -asm-verbose=false < %s | FileCheck %s
-; RUN: llc -march=x86-64 -mcpu=atom -mtriple=x86_64-unknown-linux-gnu -relocation-model=static -asm-verbose=false < %s | FileCheck -check-prefix=ATOM %s
+; RUN: llc -mcpu=generic -mtriple=x86_64-unknown-linux-gnu -relocation-model=static -asm-verbose=false < %s | FileCheck %s
+; RUN: llc -mcpu=atom -mtriple=x86_64-unknown-linux-gnu -relocation-model=static -asm-verbose=false < %s | FileCheck -check-prefix=ATOM %s
; CHECK: xorl %eax, %eax
; CHECK: movsd .LCPI0_0(%rip), %xmm0
Modified: llvm/trunk/test/CodeGen/X86/lsr-wrap.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/lsr-wrap.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/lsr-wrap.ll (original)
+++ llvm/trunk/test/CodeGen/X86/lsr-wrap.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc -march=x86-64 < %s | FileCheck %s
+; RUN: llc -mtriple=x86_64-- < %s | FileCheck %s
; LSR would like to use a single IV for both of these, however it's
; not safe due to wraparound.
Modified: llvm/trunk/test/CodeGen/X86/lzcnt.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/lzcnt.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/lzcnt.ll (original)
+++ llvm/trunk/test/CodeGen/X86/lzcnt.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -mattr=+lzcnt | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- -mattr=+lzcnt | FileCheck %s
declare i8 @llvm.ctlz.i8(i8, i1) nounwind readnone
declare i16 @llvm.ctlz.i16(i16, i1) nounwind readnone
Modified: llvm/trunk/test/CodeGen/X86/machine-copy-prop.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/machine-copy-prop.mir?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/machine-copy-prop.mir (original)
+++ llvm/trunk/test/CodeGen/X86/machine-copy-prop.mir Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86 -run-pass machine-cp -verify-machineinstrs -o - %s | FileCheck %s
+# RUN: llc -mtriple=i686-- -run-pass machine-cp -verify-machineinstrs -o - %s | FileCheck %s
--- |
declare void @foo()
Modified: llvm/trunk/test/CodeGen/X86/masked-iv-safe.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/masked-iv-safe.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/masked-iv-safe.ll (original)
+++ llvm/trunk/test/CodeGen/X86/masked-iv-safe.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mcpu=generic -march=x86-64 | FileCheck %s
+; RUN: llc < %s -mcpu=generic -mtriple=x86_64-- | FileCheck %s
; Optimize away zext-inreg and sext-inreg on the loop induction
; variable using trip-count information.
Modified: llvm/trunk/test/CodeGen/X86/masked-iv-unsafe.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/masked-iv-unsafe.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/masked-iv-unsafe.ll (original)
+++ llvm/trunk/test/CodeGen/X86/masked-iv-unsafe.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 > %t
+; RUN: llc < %s -mtriple=x86_64-- > %t
; RUN: grep and %t | count 6
; RUN: grep movzb %t | count 6
; RUN: grep sar %t | count 12
Modified: llvm/trunk/test/CodeGen/X86/maskmovdqu.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/maskmovdqu.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/maskmovdqu.ll (original)
+++ llvm/trunk/test/CodeGen/X86/maskmovdqu.ll Tue Aug 1 17:28:10 2017
@@ -1,7 +1,7 @@
-; RUN: llc < %s -march=x86 -mattr=+sse2,-avx | grep -i EDI
-; RUN: llc < %s -march=x86-64 -mattr=+sse2,-avx | grep -i RDI
-; RUN: llc < %s -march=x86 -mattr=+avx | grep -i EDI
-; RUN: llc < %s -march=x86-64 -mattr=+avx | grep -i RDI
+; RUN: llc < %s -mtriple=i686-- -mattr=+sse2,-avx | grep -i EDI
+; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2,-avx | grep -i RDI
+; RUN: llc < %s -mtriple=i686-- -mattr=+avx | grep -i EDI
+; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx | grep -i RDI
; rdar://6573467
define void @test(<16 x i8> %a, <16 x i8> %b, i32 %dummy, i8* %c) nounwind {
Modified: llvm/trunk/test/CodeGen/X86/mature-mc-support.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/mature-mc-support.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/mature-mc-support.ll (original)
+++ llvm/trunk/test/CodeGen/X86/mature-mc-support.ll Tue Aug 1 17:28:10 2017
@@ -1,16 +1,16 @@
; Test that inline assembly is parsed by the MC layer when MC support is mature
; (even when the output is assembly).
-; RUN: not llc -march=x86 < %s > /dev/null 2> %t1
+; RUN: not llc -mtriple=i686-- < %s > /dev/null 2> %t1
; RUN: FileCheck %s < %t1
-; RUN: not llc -march=x86 -filetype=obj < %s > /dev/null 2> %t2
+; RUN: not llc -mtriple=i686-- -filetype=obj < %s > /dev/null 2> %t2
; RUN: FileCheck %s < %t2
-; RUN: not llc -march=x86-64 < %s > /dev/null 2> %t3
+; RUN: not llc -mtriple=x86_64-- < %s > /dev/null 2> %t3
; RUN: FileCheck %s < %t3
-; RUN: not llc -march=x86-64 -filetype=obj < %s > /dev/null 2> %t4
+; RUN: not llc -mtriple=x86_64-- -filetype=obj < %s > /dev/null 2> %t4
; RUN: FileCheck %s < %t4
module asm " .this_directive_is_very_unlikely_to_exist"
Modified: llvm/trunk/test/CodeGen/X86/mbp-false-cfg-break.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/mbp-false-cfg-break.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/mbp-false-cfg-break.ll (original)
+++ llvm/trunk/test/CodeGen/X86/mbp-false-cfg-break.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
define void @test(i1 %cnd) !prof !{!"function_entry_count", i64 1024} {
; CHECK-LABEL: @test
Modified: llvm/trunk/test/CodeGen/X86/mem-promote-integers.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/mem-promote-integers.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/mem-promote-integers.ll (original)
+++ llvm/trunk/test/CodeGen/X86/mem-promote-integers.ll Tue Aug 1 17:28:10 2017
@@ -1,8 +1,8 @@
; Test the basic functionality of integer element promotions of different types.
; This tests checks passing of arguments, loading and storing to memory and
; basic arithmetic.
-; RUN: llc -march=x86 < %s > /dev/null
-; RUN: llc -march=x86-64 < %s > /dev/null
+; RUN: llc -mtriple=i686-- < %s > /dev/null
+; RUN: llc -mtriple=x86_64-- < %s > /dev/null
define <1 x i8> @test_1xi8(<1 x i8> %x, <1 x i8>* %b) {
%bb = load <1 x i8>, <1 x i8>* %b
Modified: llvm/trunk/test/CodeGen/X86/membarrier.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/membarrier.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/membarrier.ll (original)
+++ llvm/trunk/test/CodeGen/X86/membarrier.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -mattr=-sse -O0
+; RUN: llc < %s -mtriple=x86_64-- -mattr=-sse -O0
; PR9675
define i32 @t() {
Modified: llvm/trunk/test/CodeGen/X86/memset.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/memset.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/memset.ll (original)
+++ llvm/trunk/test/CodeGen/X86/memset.ll Tue Aug 1 17:28:10 2017
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -march=x86 -mcpu=pentium2 -mtriple=i686-apple-darwin8.8.0 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -march=x86 -mcpu=pentium3 -mtriple=i686-apple-darwin8.8.0 | FileCheck %s --check-prefix=XMM
-; RUN: llc < %s -march=x86 -mcpu=bdver1 -mtriple=i686-apple-darwin8.8.0 | FileCheck %s --check-prefix=YMM
+; RUN: llc < %s -mcpu=pentium2 -mtriple=i686-apple-darwin8.8.0 | FileCheck %s --check-prefix=X86
+; RUN: llc < %s -mcpu=pentium3 -mtriple=i686-apple-darwin8.8.0 | FileCheck %s --check-prefix=XMM
+; RUN: llc < %s -mcpu=bdver1 -mtriple=i686-apple-darwin8.8.0 | FileCheck %s --check-prefix=YMM
%struct.x = type { i16, i16 }
Modified: llvm/trunk/test/CodeGen/X86/merge-consecutive-stores-i1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/merge-consecutive-stores-i1.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/merge-consecutive-stores-i1.ll (original)
+++ llvm/trunk/test/CodeGen/X86/merge-consecutive-stores-i1.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc -march=x86-64 < %s
+; RUN: llc -mtriple=x86_64-- < %s
; Ensure that MergeConsecutiveStores doesn't crash when dealing with
; i1 operands.
Modified: llvm/trunk/test/CodeGen/X86/merge-store-partially-alias-loads.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/merge-store-partially-alias-loads.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/merge-store-partially-alias-loads.ll (original)
+++ llvm/trunk/test/CodeGen/X86/merge-store-partially-alias-loads.ll Tue Aug 1 17:28:10 2017
@@ -1,6 +1,6 @@
; REQUIRES: asserts
-; RUN: llc -march=x86-64 -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck -check-prefix=X86 %s
-; RUN: llc -march=x86-64 -mtriple=x86_64-unknown-linux-gnu -debug-only=isel < %s 2>&1 | FileCheck -check-prefix=DBGDAG %s
+; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck -check-prefix=X86 %s
+; RUN: llc -mtriple=x86_64-unknown-linux-gnu -debug-only=isel < %s 2>&1 | FileCheck -check-prefix=DBGDAG %s
; It's OK to merge the load / store of the first 2 components, but
; they must not be placed on the same chain after merging.
Modified: llvm/trunk/test/CodeGen/X86/misched-code-difference-with-debug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/misched-code-difference-with-debug.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/misched-code-difference-with-debug.ll (original)
+++ llvm/trunk/test/CodeGen/X86/misched-code-difference-with-debug.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -mtriple=x86_64-unknown-unknown -mcpu=generic | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=generic | FileCheck %s
; Both functions should produce the same code. The presence of debug values
; should not affect the scheduling strategy.
; Generated from:
Modified: llvm/trunk/test/CodeGen/X86/misched-copy.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/misched-copy.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/misched-copy.ll (original)
+++ llvm/trunk/test/CodeGen/X86/misched-copy.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
; REQUIRES: asserts
-; RUN: llc < %s -verify-machineinstrs -march=x86 -mcpu=core2 -pre-RA-sched=source -enable-misched -verify-misched -debug-only=machine-scheduler -o - 2>&1 > /dev/null | FileCheck %s
+; RUN: llc < %s -verify-machineinstrs -mtriple=i686-- -mcpu=core2 -pre-RA-sched=source -enable-misched -verify-misched -debug-only=machine-scheduler -o - 2>&1 > /dev/null | FileCheck %s
;
; Test scheduling of copy instructions.
;
Modified: llvm/trunk/test/CodeGen/X86/misched-fusion.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/misched-fusion.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/misched-fusion.ll (original)
+++ llvm/trunk/test/CodeGen/X86/misched-fusion.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -mcpu=corei7-avx -disable-lsr -pre-RA-sched=source -enable-misched -verify-machineinstrs | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=corei7-avx -disable-lsr -pre-RA-sched=source -enable-misched -verify-machineinstrs | FileCheck %s
; Verify that TEST+JE are scheduled together.
; CHECK: test_je
Modified: llvm/trunk/test/CodeGen/X86/misched-matmul.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/misched-matmul.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/misched-matmul.ll (original)
+++ llvm/trunk/test/CodeGen/X86/misched-matmul.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
; REQUIRES: asserts
-; RUN: llc < %s -march=x86-64 -mcpu=core2 -pre-RA-sched=source -enable-misched -stats 2>&1 | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=core2 -pre-RA-sched=source -enable-misched -stats 2>&1 | FileCheck %s
;
; Verify that register pressure heuristics are working in MachineScheduler.
;
Modified: llvm/trunk/test/CodeGen/X86/misched-matrix.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/misched-matrix.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/misched-matrix.ll (original)
+++ llvm/trunk/test/CodeGen/X86/misched-matrix.ll Tue Aug 1 17:28:10 2017
@@ -1,10 +1,10 @@
-; RUN: llc < %s -march=x86-64 -mcpu=core2 -pre-RA-sched=source -enable-misched \
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=core2 -pre-RA-sched=source -enable-misched \
; RUN: -misched-topdown -verify-machineinstrs \
; RUN: | FileCheck %s -check-prefix=TOPDOWN
-; RUN: llc < %s -march=x86-64 -mcpu=core2 -pre-RA-sched=source -enable-misched \
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=core2 -pre-RA-sched=source -enable-misched \
; RUN: -misched=ilpmin -verify-machineinstrs \
; RUN: | FileCheck %s -check-prefix=ILPMIN
-; RUN: llc < %s -march=x86-64 -mcpu=core2 -pre-RA-sched=source -enable-misched \
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=core2 -pre-RA-sched=source -enable-misched \
; RUN: -misched=ilpmax -verify-machineinstrs \
; RUN: | FileCheck %s -check-prefix=ILPMAX
;
Modified: llvm/trunk/test/CodeGen/X86/misched-new.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/misched-new.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/misched-new.ll (original)
+++ llvm/trunk/test/CodeGen/X86/misched-new.ll Tue Aug 1 17:28:10 2017
@@ -1,7 +1,7 @@
-; RUN: llc < %s -march=x86-64 -mcpu=core2 -x86-early-ifcvt -enable-misched \
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=core2 -x86-early-ifcvt -enable-misched \
; RUN: -misched=shuffle -misched-bottomup -verify-machineinstrs \
; RUN: | FileCheck %s
-; RUN: llc < %s -march=x86-64 -mcpu=core2 -x86-early-ifcvt -enable-misched \
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=core2 -x86-early-ifcvt -enable-misched \
; RUN: -misched=shuffle -misched-topdown -verify-machineinstrs \
; RUN: | FileCheck %s --check-prefix TOPDOWN
; REQUIRES: asserts
Modified: llvm/trunk/test/CodeGen/X86/mmx-arith.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/mmx-arith.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/mmx-arith.ll (original)
+++ llvm/trunk/test/CodeGen/X86/mmx-arith.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=x86 -mattr=+mmx,+sse2 | FileCheck -check-prefix=X32 %s
-; RUN: llc < %s -march=x86-64 -mattr=+mmx,+sse2 | FileCheck -check-prefix=X64 %s
+; RUN: llc < %s -mtriple=i686-- -mattr=+mmx,+sse2 | FileCheck -check-prefix=X32 %s
+; RUN: llc < %s -mtriple=x86_64-- -mattr=+mmx,+sse2 | FileCheck -check-prefix=X64 %s
;; A basic sanity check to make sure that MMX arithmetic actually compiles.
;; First is a straight translation of the original with bitcasts as needed.
Modified: llvm/trunk/test/CodeGen/X86/mmx-copy-gprs.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/mmx-copy-gprs.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/mmx-copy-gprs.ll (original)
+++ llvm/trunk/test/CodeGen/X86/mmx-copy-gprs.ll Tue Aug 1 17:28:10 2017
@@ -1,7 +1,7 @@
; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s
-; RUN: llc < %s -march=x86 -mattr=-sse2 | FileCheck %s
-; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- -mattr=-sse2 | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 | FileCheck %s
; This test should use GPRs to copy the mmx value, not MMX regs. Using mmx regs,
; increases the places that need to use emms.
Modified: llvm/trunk/test/CodeGen/X86/mmx-intrinsics.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/mmx-intrinsics.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/mmx-intrinsics.ll (original)
+++ llvm/trunk/test/CodeGen/X86/mmx-intrinsics.ll Tue Aug 1 17:28:10 2017
@@ -1,7 +1,7 @@
-; RUN: llc < %s -march=x86 -mattr=+mmx,+ssse3,-avx | FileCheck %s --check-prefix=ALL --check-prefix=X86
-; RUN: llc < %s -march=x86 -mattr=+mmx,+avx | FileCheck %s --check-prefix=ALL --check-prefix=X86
-; RUN: llc < %s -march=x86-64 -mattr=+mmx,+ssse3,-avx | FileCheck %s --check-prefix=ALL --check-prefix=X64
-; RUN: llc < %s -march=x86-64 -mattr=+mmx,+avx | FileCheck %s --check-prefix=ALL --check-prefix=X64
+; RUN: llc < %s -mtriple=i686-- -mattr=+mmx,+ssse3,-avx | FileCheck %s --check-prefix=ALL --check-prefix=X86
+; RUN: llc < %s -mtriple=i686-- -mattr=+mmx,+avx | FileCheck %s --check-prefix=ALL --check-prefix=X86
+; RUN: llc < %s -mtriple=x86_64-- -mattr=+mmx,+ssse3,-avx | FileCheck %s --check-prefix=ALL --check-prefix=X64
+; RUN: llc < %s -mtriple=x86_64-- -mattr=+mmx,+avx | FileCheck %s --check-prefix=ALL --check-prefix=X64
declare x86_mmx @llvm.x86.ssse3.phadd.w(x86_mmx, x86_mmx) nounwind readnone
Modified: llvm/trunk/test/CodeGen/X86/mmx-only.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/mmx-only.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/mmx-only.ll (original)
+++ llvm/trunk/test/CodeGen/X86/mmx-only.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=x86 -mattr=+mmx | FileCheck %s
-; RUN: llc < %s -march=x86 -mattr=+mmx,-sse | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- -mattr=+mmx | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- -mattr=+mmx,-sse | FileCheck %s
; Test that turning off sse doesn't turn off mmx.
Modified: llvm/trunk/test/CodeGen/X86/movfs.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/movfs.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/movfs.ll (original)
+++ llvm/trunk/test/CodeGen/X86/movfs.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | grep fs
+; RUN: llc < %s -mtriple=i686-- | grep fs
define i32 @foo() nounwind readonly {
entry:
Modified: llvm/trunk/test/CodeGen/X86/movgs.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/movgs.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/movgs.ll (original)
+++ llvm/trunk/test/CodeGen/X86/movgs.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu -mcpu=penryn -mattr=sse4.1 | FileCheck %s --check-prefix=X32
+; RUN: llc < %s -mtriple=i386-linux-gnu -mcpu=penryn -mattr=sse4.1 | FileCheck %s --check-prefix=X32
; RUN: llc < %s -mtriple=x86_64-linux -mcpu=penryn -mattr=sse4.1 | FileCheck %s --check-prefix=X64
; RUN: llc < %s -mtriple=x86_64-win32 -mcpu=penryn -mattr=sse4.1 | FileCheck %s --check-prefix=X64
Modified: llvm/trunk/test/CodeGen/X86/ms-inline-asm.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/ms-inline-asm.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/ms-inline-asm.ll (original)
+++ llvm/trunk/test/CodeGen/X86/ms-inline-asm.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mcpu=core2 -no-integrated-as | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- -mcpu=core2 -no-integrated-as | FileCheck %s
define i32 @t1() nounwind {
entry:
Modified: llvm/trunk/test/CodeGen/X86/mul-legalize.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/mul-legalize.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/mul-legalize.ll (original)
+++ llvm/trunk/test/CodeGen/X86/mul-legalize.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | FileCheck %s
+; RUN: llc < %s | FileCheck %s
; PR2135
; CHECK: 24576
Modified: llvm/trunk/test/CodeGen/X86/mul-remat.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/mul-remat.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/mul-remat.ll (original)
+++ llvm/trunk/test/CodeGen/X86/mul-remat.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | grep mov | count 1
+; RUN: llc < %s -mtriple=i686-- | grep mov | count 1
; PR1874
define i32 @test(i32 %a, i32 %b) {
Modified: llvm/trunk/test/CodeGen/X86/mul-shift-reassoc.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/mul-shift-reassoc.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/mul-shift-reassoc.ll (original)
+++ llvm/trunk/test/CodeGen/X86/mul-shift-reassoc.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=x86 | grep lea
-; RUN: llc < %s -march=x86 | not grep add
+; RUN: llc < %s -mtriple=i686-- | grep lea
+; RUN: llc < %s -mtriple=i686-- | not grep add
define i32 @test(i32 %X, i32 %Y) {
; Push the shl through the mul to allow an LEA to be formed, instead
Modified: llvm/trunk/test/CodeGen/X86/mul128_sext_loop.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/mul128_sext_loop.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/mul128_sext_loop.ll (original)
+++ llvm/trunk/test/CodeGen/X86/mul128_sext_loop.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
define void @test(i64* nocapture %arr, i64 %arrsize, i64 %factor) nounwind uwtable {
%1 = icmp sgt i64 %arrsize, 0
Modified: llvm/trunk/test/CodeGen/X86/mult-alt-generic-i686.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/mult-alt-generic-i686.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/mult-alt-generic-i686.ll (original)
+++ llvm/trunk/test/CodeGen/X86/mult-alt-generic-i686.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -no-integrated-as
+; RUN: llc < %s -no-integrated-as
; ModuleID = 'mult-alt-generic.c'
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32"
target triple = "i686"
Modified: llvm/trunk/test/CodeGen/X86/mult-alt-generic-x86_64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/mult-alt-generic-x86_64.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/mult-alt-generic-x86_64.ll (original)
+++ llvm/trunk/test/CodeGen/X86/mult-alt-generic-x86_64.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -no-integrated-as
+; RUN: llc < %s -no-integrated-as
; ModuleID = 'mult-alt-generic.c'
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64"
Modified: llvm/trunk/test/CodeGen/X86/mult-alt-x86.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/mult-alt-x86.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/mult-alt-x86.ll (original)
+++ llvm/trunk/test/CodeGen/X86/mult-alt-x86.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mattr=+mmx,+sse2 -no-integrated-as
+; RUN: llc < %s -mattr=+mmx,+sse2 -no-integrated-as
; ModuleID = 'mult-alt-x86.c'
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32"
target triple = "i686-pc-win32"
Modified: llvm/trunk/test/CodeGen/X86/multiple-loop-post-inc.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/multiple-loop-post-inc.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/multiple-loop-post-inc.ll (original)
+++ llvm/trunk/test/CodeGen/X86/multiple-loop-post-inc.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc -asm-verbose=false -disable-branch-fold -disable-block-placement -disable-tail-duplicate -march=x86-64 -mcpu=nehalem -no-integrated-as < %s | FileCheck %s
+; RUN: llc -asm-verbose=false -disable-branch-fold -disable-block-placement -disable-tail-duplicate -mtriple=x86_64-- -mcpu=nehalem -no-integrated-as < %s | FileCheck %s
; rdar://7236213
;
; The scheduler's 2-address hack has been disabled, so there is
Modified: llvm/trunk/test/CodeGen/X86/multiple-return-values-cross-block.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/multiple-return-values-cross-block.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/multiple-return-values-cross-block.ll (original)
+++ llvm/trunk/test/CodeGen/X86/multiple-return-values-cross-block.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86
+; RUN: llc < %s -mtriple=i686--
declare {x86_fp80, x86_fp80} @test()
Modified: llvm/trunk/test/CodeGen/X86/musttail-thiscall.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/musttail-thiscall.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/musttail-thiscall.ll (original)
+++ llvm/trunk/test/CodeGen/X86/musttail-thiscall.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
-; RUN: llc -march=x86 < %s | FileCheck %s
-; RUN: llc -march=x86 -O0 < %s | FileCheck %s
+; RUN: llc -mtriple=i686-- < %s | FileCheck %s
+; RUN: llc -mtriple=i686-- -O0 < %s | FileCheck %s
; CHECK-LABEL: t1:
; CHECK: jmp {{_?}}t1_callee
Modified: llvm/trunk/test/CodeGen/X86/musttail.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/musttail.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/musttail.ll (original)
+++ llvm/trunk/test/CodeGen/X86/musttail.ll Tue Aug 1 17:28:10 2017
@@ -1,6 +1,6 @@
-; RUN: llc -march=x86 < %s | FileCheck %s
-; RUN: llc -march=x86 -O0 < %s | FileCheck %s
-; RUN: llc -march=x86 -disable-tail-calls < %s | FileCheck %s
+; RUN: llc -mtriple=i686-- < %s | FileCheck %s
+; RUN: llc -mtriple=i686-- -O0 < %s | FileCheck %s
+; RUN: llc -mtriple=i686-- -disable-tail-calls < %s | FileCheck %s
declare void @t1_callee(i8*)
define void @t1(i32* %a) {
Modified: llvm/trunk/test/CodeGen/X86/narrow-shl-cst.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/narrow-shl-cst.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/narrow-shl-cst.ll (original)
+++ llvm/trunk/test/CodeGen/X86/narrow-shl-cst.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
; PR5039
define i32 @test1(i32 %x) nounwind {
Modified: llvm/trunk/test/CodeGen/X86/narrow-shl-load.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/narrow-shl-load.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/narrow-shl-load.ll (original)
+++ llvm/trunk/test/CodeGen/X86/narrow-shl-load.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc -march=x86-64 < %s | FileCheck %s
+; RUN: llc < %s | FileCheck %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64-pc-linux-gnu"
Modified: llvm/trunk/test/CodeGen/X86/narrow_op-1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/narrow_op-1.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/narrow_op-1.ll (original)
+++ llvm/trunk/test/CodeGen/X86/narrow_op-1.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
%struct.bf = type { i64, i16, i16, i32 }
@bfi = common global %struct.bf zeroinitializer, align 16
Modified: llvm/trunk/test/CodeGen/X86/neg-shl-add.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/neg-shl-add.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/neg-shl-add.ll (original)
+++ llvm/trunk/test/CodeGen/X86/neg-shl-add.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc -march=x86-64 < %s | not grep negq
+; RUN: llc -mtriple=x86_64-- < %s | not grep negq
; These sequences don't need neg instructions; they can be done with
; a single shift and sub each.
Modified: llvm/trunk/test/CodeGen/X86/neg_fp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/neg_fp.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/neg_fp.ll (original)
+++ llvm/trunk/test/CodeGen/X86/neg_fp.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mattr=+sse4.1 -o %t
+; RUN: llc < %s -mtriple=i686-- -mattr=+sse4.1 -o %t
; RUN: grep xorps %t | count 1
; Test that when we don't -enable-unsafe-fp-math, we don't do the optimization
Modified: llvm/trunk/test/CodeGen/X86/negate-add-zero.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/negate-add-zero.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/negate-add-zero.ll (original)
+++ llvm/trunk/test/CodeGen/X86/negate-add-zero.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -enable-unsafe-fp-math -march=x86 | not grep xor
+; RUN: llc < %s -enable-unsafe-fp-math | not grep xor
; PR3374
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
Modified: llvm/trunk/test/CodeGen/X86/negative-stride-fptosi-user.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/negative-stride-fptosi-user.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/negative-stride-fptosi-user.ll (original)
+++ llvm/trunk/test/CodeGen/X86/negative-stride-fptosi-user.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 | grep cvtsi2sd
+; RUN: llc < %s -mtriple=x86_64-- | grep cvtsi2sd
; LSR previously eliminated the sitofp by introducing an induction
; variable which stepped by a bogus ((double)UINT32_C(-1)). It's theoretically
Modified: llvm/trunk/test/CodeGen/X86/negative-subscript.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/negative-subscript.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/negative-subscript.ll (original)
+++ llvm/trunk/test/CodeGen/X86/negative-subscript.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86
+; RUN: llc < %s -mtriple=i686--
; rdar://6559995
@a = external global [255 x i8*], align 32
Modified: llvm/trunk/test/CodeGen/X86/negative_zero.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/negative_zero.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/negative_zero.ll (original)
+++ llvm/trunk/test/CodeGen/X86/negative_zero.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mattr=-sse2,-sse3 | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- -mattr=-sse2,-sse3 | FileCheck %s
; CHECK: fchs
Modified: llvm/trunk/test/CodeGen/X86/no-cmov.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/no-cmov.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/no-cmov.ll (original)
+++ llvm/trunk/test/CodeGen/X86/no-cmov.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc -march=x86 -mcpu=i486 < %s | FileCheck %s
+; RUN: llc -mtriple=i686-- -mcpu=i486 < %s | FileCheck %s
define i32 @test1(i32 %g, i32* %j) {
%tobool = icmp eq i32 %g, 0
Modified: llvm/trunk/test/CodeGen/X86/nobt.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/nobt.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/nobt.ll (original)
+++ llvm/trunk/test/CodeGen/X86/nobt.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | not grep btl
+; RUN: llc < %s -mtriple=i686-- | not grep btl
; This tests some cases where BT must not be generated. See also bt.ll.
; Fixes 20040709-[12].c in gcc testsuite.
Modified: llvm/trunk/test/CodeGen/X86/nocx16.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/nocx16.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/nocx16.ll (original)
+++ llvm/trunk/test/CodeGen/X86/nocx16.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -mcpu=corei7 -mattr=-cx16 | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=corei7 -mattr=-cx16 | FileCheck %s
define void @test(i128* %a) nounwind {
entry:
; CHECK: __sync_val_compare_and_swap_16
Modified: llvm/trunk/test/CodeGen/X86/nonconst-static-ev.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/nonconst-static-ev.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/nonconst-static-ev.ll (original)
+++ llvm/trunk/test/CodeGen/X86/nonconst-static-ev.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: not llc -march=x86 -mtriple=x86_64-linux-gnu < %s 2> %t
+; RUN: not llc -mtriple=i686-linux-gnu < %s 2> %t
; RUN: FileCheck --check-prefix=CHECK-ERRORS < %t %s
@0 = global i8 extractvalue ([1 x i8] select (i1 ptrtoint (i32* @1 to i1), [1 x i8] [ i8 1 ], [1 x i8] [ i8 2 ]), 0)
Modified: llvm/trunk/test/CodeGen/X86/nonconst-static-iv.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/nonconst-static-iv.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/nonconst-static-iv.ll (original)
+++ llvm/trunk/test/CodeGen/X86/nonconst-static-iv.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: not llc -march=x86 -mtriple=x86_64-linux-gnu < %s 2> %t
+; RUN: not llc -mtriple=i686-linux-gnu < %s 2> %t
; RUN: FileCheck --check-prefix=CHECK-ERRORS < %t %s
@0 = global i8 insertvalue( { i8 } select (i1 ptrtoint (i32* @1 to i1), { i8 } { i8 1 }, { i8 } { i8 2 }), i8 0, 0)
Modified: llvm/trunk/test/CodeGen/X86/nosse-error1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/nosse-error1.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/nosse-error1.ll (original)
+++ llvm/trunk/test/CodeGen/X86/nosse-error1.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
-; RUN: not llc < %s -march=x86-64 -mattr=-sse 2>&1 | FileCheck --check-prefix NOSSE %s
-; RUN: llc < %s -march=x86-64 | FileCheck %s
+; RUN: not llc < %s -mattr=-sse 2>&1 | FileCheck --check-prefix NOSSE %s
+; RUN: llc < %s | FileCheck %s
; NOSSE: {{SSE register return with SSE disabled}}
Modified: llvm/trunk/test/CodeGen/X86/nosse-error2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/nosse-error2.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/nosse-error2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/nosse-error2.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
-; RUN: not llc < %s -march=x86 -mcpu=i686 -mattr=-sse 2>&1 | FileCheck --check-prefix NOSSE %s
-; RUN: llc < %s -march=x86 -mcpu=i686 -mattr=+sse | FileCheck %s
+; RUN: not llc < %s -mcpu=i686 -mattr=-sse 2>&1 | FileCheck --check-prefix NOSSE %s
+; RUN: llc < %s -mcpu=i686 -mattr=+sse | FileCheck %s
; NOSSE: {{SSE register return with SSE disabled}}
Modified: llvm/trunk/test/CodeGen/X86/nosse-varargs.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/nosse-varargs.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/nosse-varargs.ll (original)
+++ llvm/trunk/test/CodeGen/X86/nosse-varargs.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=x86-64 -mattr=-sse | FileCheck %s -check-prefix=NOSSE
-; RUN: llc < %s -march=x86-64 | FileCheck %s -check-prefix=YESSSE
+; RUN: llc < %s -mattr=-sse | FileCheck %s -check-prefix=NOSSE
+; RUN: llc < %s | FileCheck %s -check-prefix=YESSSE
; PR3403
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
target triple = "x86_64-unknown-linux-gnu"
Modified: llvm/trunk/test/CodeGen/X86/null-streamer.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/null-streamer.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/null-streamer.ll (original)
+++ llvm/trunk/test/CodeGen/X86/null-streamer.ll Tue Aug 1 17:28:10 2017
@@ -1,6 +1,6 @@
; Check the MCNullStreamer operates correctly, at least on a minimal test case.
;
-; RUN: llc -filetype=null -o %t -march=x86 %s
+; RUN: llc -filetype=null -o %t -mtriple=i686-- %s
; RUN: llc -filetype=null -o %t -mtriple=i686-cygwin %s
source_filename = "test/CodeGen/X86/null-streamer.ll"
Modified: llvm/trunk/test/CodeGen/X86/object-size.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/object-size.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/object-size.ll (original)
+++ llvm/trunk/test/CodeGen/X86/object-size.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc -O0 < %s -march=x86-64 | FileCheck %s
+; RUN: llc -O0 < %s | FileCheck %s
; ModuleID = 'ts.c'
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
Modified: llvm/trunk/test/CodeGen/X86/opt-ext-uses.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/opt-ext-uses.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/opt-ext-uses.ll (original)
+++ llvm/trunk/test/CodeGen/X86/opt-ext-uses.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- | FileCheck %s
; This test should get one and only one register to register mov.
; CHECK-LABEL: t:
Modified: llvm/trunk/test/CodeGen/X86/optimize-max-0.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/optimize-max-0.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/optimize-max-0.ll (original)
+++ llvm/trunk/test/CodeGen/X86/optimize-max-0.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | not grep cmov
+; RUN: llc < %s | not grep cmov
; LSR should be able to eliminate the max computations by
; making the loops use slt/ult comparisons instead of ne comparisons.
Modified: llvm/trunk/test/CodeGen/X86/overlap-shift.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/overlap-shift.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/overlap-shift.ll (original)
+++ llvm/trunk/test/CodeGen/X86/overlap-shift.ll Tue Aug 1 17:28:10 2017
@@ -6,7 +6,7 @@
; Check that the shift gets turned into an LEA.
-; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | \
+; RUN: llc < %s -mtriple=i686-- -x86-asm-syntax=intel | \
; RUN: not grep "mov E.X, E.X"
@G = external global i32 ; <i32*> [#uses=1]
Modified: llvm/trunk/test/CodeGen/X86/packed_struct.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/packed_struct.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/packed_struct.ll (original)
+++ llvm/trunk/test/CodeGen/X86/packed_struct.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 > %t
+; RUN: llc < %s > %t
; RUN: grep foos+5 %t
; RUN: grep foos+1 %t
; RUN: grep foos+9 %t
Modified: llvm/trunk/test/CodeGen/X86/peep-test-0.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/peep-test-0.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/peep-test-0.ll (original)
+++ llvm/trunk/test/CodeGen/X86/peep-test-0.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 > %t
+; RUN: llc < %s -mtriple=x86_64-- > %t
; RUN: not grep cmp %t
; RUN: not grep test %t
Modified: llvm/trunk/test/CodeGen/X86/peep-test-1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/peep-test-1.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/peep-test-1.ll (original)
+++ llvm/trunk/test/CodeGen/X86/peep-test-1.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 > %t
+; RUN: llc < %s -mtriple=i686-- > %t
; RUN: grep dec %t | count 1
; RUN: not grep test %t
; RUN: not grep cmp %t
Modified: llvm/trunk/test/CodeGen/X86/peep-test-2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/peep-test-2.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/peep-test-2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/peep-test-2.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -verify-machineinstrs -march=x86 | FileCheck %s
+; RUN: llc < %s -verify-machineinstrs | FileCheck %s
; CHECK: testl
Modified: llvm/trunk/test/CodeGen/X86/peep-test-3.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/peep-test-3.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/peep-test-3.ll (original)
+++ llvm/trunk/test/CodeGen/X86/peep-test-3.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mcpu=generic -march=x86 -post-RA-scheduler=false | FileCheck %s
+; RUN: llc < %s -mcpu=generic -mtriple=i686-- -post-RA-scheduler=false | FileCheck %s
; rdar://7226797
; LLVM should omit the testl and use the flags result from the orl.
Modified: llvm/trunk/test/CodeGen/X86/peephole-multiple-folds.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/peephole-multiple-folds.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/peephole-multiple-folds.ll (original)
+++ llvm/trunk/test/CodeGen/X86/peephole-multiple-folds.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc -march=x86-64 -mcpu=core-avx2 < %s | FileCheck %s
+; RUN: llc -mtriple=x86_64-- -mcpu=core-avx2 < %s | FileCheck %s
;
; Test multiple peephole-time folds in a single basic block.
; <rdar://problem/16478629>
Modified: llvm/trunk/test/CodeGen/X86/phi-bit-propagation.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/phi-bit-propagation.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/phi-bit-propagation.ll (original)
+++ llvm/trunk/test/CodeGen/X86/phi-bit-propagation.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
%"class.std::bitset" = type { [8 x i8] }
Modified: llvm/trunk/test/CodeGen/X86/phi-immediate-factoring.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/phi-immediate-factoring.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/phi-immediate-factoring.ll (original)
+++ llvm/trunk/test/CodeGen/X86/phi-immediate-factoring.ll Tue Aug 1 17:28:10 2017
@@ -1,7 +1,7 @@
; REQUIRES: asserts
-; RUN: llc < %s -disable-preheader-prot=true -march=x86 -stats 2>&1 | grep "Number of blocks eliminated" | grep 3
-; RUN: llc < %s -disable-preheader-prot=true -march=x86 -stats -cgp-freq-ratio-to-skip-merge=10 2>&1 | grep "Number of blocks eliminated" | grep 6
-; RUN: llc < %s -disable-preheader-prot=false -march=x86 -stats 2>&1 | grep "Number of blocks eliminated" | grep 3
+; RUN: llc < %s -disable-preheader-prot=true -stats 2>&1 | grep "Number of blocks eliminated" | grep 3
+; RUN: llc < %s -disable-preheader-prot=true -stats -cgp-freq-ratio-to-skip-merge=10 2>&1 | grep "Number of blocks eliminated" | grep 6
+; RUN: llc < %s -disable-preheader-prot=false -stats 2>&1 | grep "Number of blocks eliminated" | grep 3
; PR1296
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
Modified: llvm/trunk/test/CodeGen/X86/phys-reg-local-regalloc.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/phys-reg-local-regalloc.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/phys-reg-local-regalloc.ll (original)
+++ llvm/trunk/test/CodeGen/X86/phys-reg-local-regalloc.ll Tue Aug 1 17:28:10 2017
@@ -1,6 +1,6 @@
-; RUN: llc < %s -stack-symbol-ordering=0 -march=x86 -mtriple=i386-apple-darwin9 -mcpu=generic -regalloc=fast -optimize-regalloc=0 -no-x86-call-frame-opt | FileCheck %s
-; RUN: llc -O0 < %s -stack-symbol-ordering=0 -march=x86 -mtriple=i386-apple-darwin9 -mcpu=generic -regalloc=fast -no-x86-call-frame-opt | FileCheck %s
-; RUN: llc < %s -stack-symbol-ordering=0 -march=x86 -mtriple=i386-apple-darwin9 -mcpu=atom -regalloc=fast -optimize-regalloc=0 -no-x86-call-frame-opt | FileCheck -check-prefix=ATOM %s
+; RUN: llc < %s -stack-symbol-ordering=0 -mtriple=i386-apple-darwin9 -mcpu=generic -regalloc=fast -optimize-regalloc=0 -no-x86-call-frame-opt | FileCheck %s
+; RUN: llc -O0 < %s -stack-symbol-ordering=0 -mtriple=i386-apple-darwin9 -mcpu=generic -regalloc=fast -no-x86-call-frame-opt | FileCheck %s
+; RUN: llc < %s -stack-symbol-ordering=0 -mtriple=i386-apple-darwin9 -mcpu=atom -regalloc=fast -optimize-regalloc=0 -no-x86-call-frame-opt | FileCheck -check-prefix=ATOM %s
; CHECKed instructions should be the same with or without -O0 except on Intel Atom due to instruction scheduling.
@.str = private constant [12 x i8] c"x + y = %i\0A\00", align 1 ; <[12 x i8]*> [#uses=1]
Modified: llvm/trunk/test/CodeGen/X86/phys_subreg_coalesce-2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/phys_subreg_coalesce-2.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/phys_subreg_coalesce-2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/phys_subreg_coalesce-2.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=x86 | FileCheck %s
-; RUN: llc -no-phi-elim-live-out-early-exit -terminal-rule < %s -march=x86 | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -no-phi-elim-live-out-early-exit -terminal-rule < %s -mtriple=i686-- | FileCheck %s
; PR2659
define i32 @binomial(i32 %n, i32 %k) nounwind {
Modified: llvm/trunk/test/CodeGen/X86/pmovext.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pmovext.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pmovext.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pmovext.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -mcpu=corei7 | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=corei7 | FileCheck %s
; rdar://11897677
Modified: llvm/trunk/test/CodeGen/X86/postalloc-coalescing.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/postalloc-coalescing.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/postalloc-coalescing.ll (original)
+++ llvm/trunk/test/CodeGen/X86/postalloc-coalescing.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | grep mov | count 3
+; RUN: llc < %s -mtriple=i686-- | grep mov | count 3
define fastcc i32 @_Z18yy_get_next_bufferv() nounwind {
entry:
Modified: llvm/trunk/test/CodeGen/X86/pr10068.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr10068.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr10068.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr10068.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86
+; RUN: llc < %s -mtriple=i686--
define void @foobar() {
entry:
Modified: llvm/trunk/test/CodeGen/X86/pr10523.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr10523.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr10523.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr10523.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -mattr=+sse2,+sse4.1
+; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2,+sse4.1
; No check in a crash test
Modified: llvm/trunk/test/CodeGen/X86/pr10524.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr10524.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr10524.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr10524.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -mattr=+sse2,+sse4.1
+; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2,+sse4.1
; No check in a crash test
Modified: llvm/trunk/test/CodeGen/X86/pr10525.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr10525.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr10525.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr10525.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -mattr=+sse2,+sse4.1
+; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2,+sse4.1
; No check in a crash test
Modified: llvm/trunk/test/CodeGen/X86/pr10526.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr10526.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr10526.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr10526.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -mattr=+sse2,+sse4.1
+; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2,+sse4.1
; No check in a crash test
Modified: llvm/trunk/test/CodeGen/X86/pr11468.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr11468.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr11468.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr11468.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -stackrealign -stack-alignment=32 -march=x86-64 -mattr=+avx -mtriple=i686-apple-darwin10 | FileCheck %s
+; RUN: llc < %s -stackrealign -stack-alignment=32 -mattr=+avx -mtriple=x86_64-apple-darwin10 | FileCheck %s
; PR11468
define void @f(i64 %sz) uwtable {
Modified: llvm/trunk/test/CodeGen/X86/pr11998.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr11998.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr11998.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr11998.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mcpu=corei7-avx -march=x86-64 -mattr=+avx
+; RUN: llc < %s -mcpu=corei7-avx -mtriple=x86_64-- -mattr=+avx
define void @autogen_51367_5000(i8) {
BB:
Modified: llvm/trunk/test/CodeGen/X86/pr12889.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr12889.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr12889.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr12889.ll Tue Aug 1 17:28:10 2017
@@ -1,6 +1,6 @@
-; RUN: llc < %s -march=x86
+; RUN: llc < %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
-target triple = "x86_64-unknown-linux-gnu"
+target triple = "i686-unknown-linux-gnu"
@c0 = common global i8 0, align 1
Modified: llvm/trunk/test/CodeGen/X86/pr13220.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr13220.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr13220.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr13220.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc -march=x86 < %s
+; RUN: llc -mtriple=i686-- < %s
; PR13220
define <8 x i32> @foo(<8 x i96> %x) {
Modified: llvm/trunk/test/CodeGen/X86/pr14562.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr14562.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr14562.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr14562.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- | FileCheck %s
@temp1 = global i64 -77129852189294865, align 8
Modified: llvm/trunk/test/CodeGen/X86/pr20088.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr20088.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr20088.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr20088.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -mattr=+avx | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx | FileCheck %s
declare <16 x i8> @llvm.x86.sse41.pblendvb(<16 x i8>, <16 x i8>, <16 x i8>)
Modified: llvm/trunk/test/CodeGen/X86/pr21099.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr21099.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr21099.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr21099.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -O2 -march=x86-64 -verify-machineinstrs | FileCheck %s
+; RUN: llc < %s -O2 -mtriple=x86_64-- -verify-machineinstrs | FileCheck %s
define void @pr21099(i64* %p) {
; CHECK-LABEL: pr21099
Modified: llvm/trunk/test/CodeGen/X86/pr2326.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr2326.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr2326.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr2326.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | grep sete
+; RUN: llc < %s -mtriple=i686-- | grep sete
; PR2326
define i32 @func_59(i32 %p_60) nounwind {
Modified: llvm/trunk/test/CodeGen/X86/pr23273.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr23273.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr23273.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr23273.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=i386-unknown-unknown -mcpu=generic -march=x86 -mattr=-sse2 -fast-isel < %s
+; RUN: llc -mtriple=i386-unknown-unknown -mcpu=generic -mattr=-sse2 -fast-isel < %s
; Verify that the backend doesn't crash during fast-isel with an assertion
; failure when selecting a int-to-double conversion. The fast selection routine
Modified: llvm/trunk/test/CodeGen/X86/pr2656.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr2656.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr2656.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr2656.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s
+; RUN: llc < %s -mattr=+sse2 | FileCheck %s
; PR2656
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
Modified: llvm/trunk/test/CodeGen/X86/pr2659.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr2659.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr2659.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr2659.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mtriple=i686-apple-darwin9.4.0 -disable-branch-fold | FileCheck %s
+; RUN: llc < %s -mtriple=i686-apple-darwin9.4.0 -disable-branch-fold | FileCheck %s
; PR2659
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
Modified: llvm/trunk/test/CodeGen/X86/pr26652.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr26652.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr26652.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr26652.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86
+; RUN: llc < %s -mtriple=i686--
; PR26652
define <2 x i32> @test(<4 x i32> %a, <4 x i32> %b) {
Modified: llvm/trunk/test/CodeGen/X86/pr2982.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr2982.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr2982.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr2982.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86
+; RUN: llc < %s
; PR2982
target datalayout =
Modified: llvm/trunk/test/CodeGen/X86/pr3216.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr3216.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr3216.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr3216.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- | FileCheck %s
@foo = global i8 127
Modified: llvm/trunk/test/CodeGen/X86/pr3241.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr3241.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr3241.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr3241.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86
+; RUN: llc < %s -mtriple=i686--
; PR3241
@g_620 = external global i32
Modified: llvm/trunk/test/CodeGen/X86/pr3243.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr3243.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr3243.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr3243.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86
+; RUN: llc < %s -mtriple=i686--
; PR3243
declare signext i16 @safe_mul_func_int16_t_s_s(i16 signext, i32) nounwind readnone optsize
Modified: llvm/trunk/test/CodeGen/X86/pr3244.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr3244.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr3244.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr3244.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86
+; RUN: llc < %s -mtriple=i686--
; PR3244
@g_62 = external global i16 ; <i16*> [#uses=1]
Modified: llvm/trunk/test/CodeGen/X86/pr3250.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr3250.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr3250.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr3250.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86
+; RUN: llc < %s -mtriple=i686--
; PR3250
declare i32 @safe_sub_func_short_u_u(i16 signext, i16 signext) nounwind
Modified: llvm/trunk/test/CodeGen/X86/pr3317.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr3317.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr3317.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr3317.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86
+; RUN: llc < %s -mtriple=i686--
; PR3317
%VT = type [0 x i32 (...)*]
Modified: llvm/trunk/test/CodeGen/X86/pr3366.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr3366.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr3366.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr3366.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -disable-cgp-branch-opts | grep movzbl
+; RUN: llc < %s -mtriple=i686-- -disable-cgp-branch-opts | grep movzbl
; PR3366
define void @_ada_c34002a() nounwind {
Modified: llvm/trunk/test/CodeGen/X86/pr3522.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr3522.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr3522.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr3522.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
; REQUIRES: asserts
-; RUN: llc < %s -march=x86 -stats 2>&1 | not grep "instructions sunk"
+; RUN: llc < %s -stats 2>&1 | not grep "instructions sunk"
; PR3522
target triple = "i386-pc-linux-gnu"
Modified: llvm/trunk/test/CodeGen/X86/pr5145.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr5145.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr5145.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr5145.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc -march=x86-64 < %s | FileCheck %s
+; RUN: llc -mtriple=x86_64-- < %s | FileCheck %s
@sc8 = external global i8
define void @atomic_maxmin_i8() {
Modified: llvm/trunk/test/CodeGen/X86/pr7882.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr7882.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr7882.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr7882.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mtriple=i686-apple-darwin -pre-RA-sched=fast \
+; RUN: llc < %s -mtriple=i686-apple-darwin -pre-RA-sched=fast \
; RUN: | FileCheck %s
; make sure scheduler honors the flags clobber. PR 7882.
Modified: llvm/trunk/test/CodeGen/X86/prefetch.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/prefetch.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/prefetch.ll (original)
+++ llvm/trunk/test/CodeGen/X86/prefetch.ll Tue Aug 1 17:28:10 2017
@@ -1,9 +1,9 @@
-; RUN: llc < %s -march=x86 -mattr=+sse | FileCheck %s
-; RUN: llc < %s -march=x86 -mattr=+avx | FileCheck %s
-; RUN: llc < %s -march=x86 -mattr=+sse -mattr=+prfchw | FileCheck %s -check-prefix=PRFCHW
-; RUN: llc < %s -march=x86 -mcpu=slm | FileCheck %s -check-prefix=SLM
-; RUN: llc < %s -march=x86 -mcpu=btver2 | FileCheck %s -check-prefix=PRFCHW
-; RUN: llc < %s -march=x86 -mcpu=btver2 -mattr=-prfchw | FileCheck %s -check-prefix=NOPRFCHW
+; RUN: llc < %s -mtriple=i686-- -mattr=+sse | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- -mattr=+avx | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- -mattr=+sse -mattr=+prfchw | FileCheck %s -check-prefix=PRFCHW
+; RUN: llc < %s -mtriple=i686-- -mcpu=slm | FileCheck %s -check-prefix=SLM
+; RUN: llc < %s -mtriple=i686-- -mcpu=btver2 | FileCheck %s -check-prefix=PRFCHW
+; RUN: llc < %s -mtriple=i686-- -mcpu=btver2 -mattr=-prfchw | FileCheck %s -check-prefix=NOPRFCHW
; rdar://10538297
Modified: llvm/trunk/test/CodeGen/X86/promote-trunc.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/promote-trunc.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/promote-trunc.ll (original)
+++ llvm/trunk/test/CodeGen/X86/promote-trunc.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64
+; RUN: llc < %s -mtriple=x86_64--
define<4 x i8> @func_8_64() {
%F = load <4 x i64>, <4 x i64>* undef
Modified: llvm/trunk/test/CodeGen/X86/promote.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/promote.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/promote.ll (original)
+++ llvm/trunk/test/CodeGen/X86/promote.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -mcpu=corei7 | FileCheck %s
+; RUN: llc < %s -mcpu=corei7 | FileCheck %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i8:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
Modified: llvm/trunk/test/CodeGen/X86/pshufd-combine-crash.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pshufd-combine-crash.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pshufd-combine-crash.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pshufd-combine-crash.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -mcpu=corei7 -debug
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=corei7 -debug
; REQUIRES: asserts
Modified: llvm/trunk/test/CodeGen/X86/rd-mod-wr-eflags.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/rd-mod-wr-eflags.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/rd-mod-wr-eflags.ll (original)
+++ llvm/trunk/test/CodeGen/X86/rd-mod-wr-eflags.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
%struct.obj = type { i64 }
Modified: llvm/trunk/test/CodeGen/X86/rdpmc.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/rdpmc.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/rdpmc.ll (original)
+++ llvm/trunk/test/CodeGen/X86/rdpmc.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=x86-64 -mcpu=generic | FileCheck %s --check-prefix=CHECK --check-prefix=X86-64
-; RUN: llc < %s -march=x86 -mcpu=generic | FileCheck %s --check-prefix=CHECK --check-prefix=X86
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=generic | FileCheck %s --check-prefix=CHECK --check-prefix=X86-64
+; RUN: llc < %s -mtriple=i686-- -mcpu=generic | FileCheck %s --check-prefix=CHECK --check-prefix=X86
; Verify that we correctly lower the "Read Performance-Monitoring Counters"
; x86 builtin.
Modified: llvm/trunk/test/CodeGen/X86/rdtsc.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/rdtsc.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/rdtsc.ll (original)
+++ llvm/trunk/test/CodeGen/X86/rdtsc.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=x86-64 -mcpu=generic | FileCheck %s
-; RUN: llc < %s -march=x86 -mcpu=generic | FileCheck %s --check-prefix=CHECK --check-prefix=X86
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=generic | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- -mcpu=generic | FileCheck %s --check-prefix=CHECK --check-prefix=X86
; Verify that we correctly lower ISD::READCYCLECOUNTER.
Modified: llvm/trunk/test/CodeGen/X86/regpressure.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/regpressure.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/regpressure.ll (original)
+++ llvm/trunk/test/CodeGen/X86/regpressure.ll Tue Aug 1 17:28:10 2017
@@ -2,7 +2,7 @@
;; Both functions in this testcase should codegen to the same function, and
;; neither of them should require spilling anything to the stack.
-; RUN: llc < %s -march=x86 -stats 2>&1 | \
+; RUN: llc < %s -mtriple=i686-- -stats 2>&1 | \
; RUN: not grep "Number of register spills"
;; This can be compiled to use three registers if the loads are not
Modified: llvm/trunk/test/CodeGen/X86/rem_crash.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/rem_crash.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/rem_crash.ll (original)
+++ llvm/trunk/test/CodeGen/X86/rem_crash.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=x86
-; RUN: llc < %s -march=x86-64
+; RUN: llc < %s -mtriple=i686--
+; RUN: llc < %s -mtriple=x86_64--
define i8 @test_minsize_uu8(i8 %x) minsize optsize {
entry:
Modified: llvm/trunk/test/CodeGen/X86/ret-addr.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/ret-addr.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/ret-addr.ll (original)
+++ llvm/trunk/test/CodeGen/X86/ret-addr.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
-; RUN: llc < %s -disable-fp-elim -march=x86 | not grep xor
-; RUN: llc < %s -disable-fp-elim -march=x86-64 | not grep xor
+; RUN: llc < %s -disable-fp-elim -mtriple=i686-- | not grep xor
+; RUN: llc < %s -disable-fp-elim -mtriple=x86_64-- | not grep xor
define i8* @h() nounwind readnone optsize {
entry:
Modified: llvm/trunk/test/CodeGen/X86/ret-i64-0.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/ret-i64-0.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/ret-i64-0.ll (original)
+++ llvm/trunk/test/CodeGen/X86/ret-i64-0.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | grep xor | count 2
+; RUN: llc < %s -mtriple=i686-- | grep xor | count 2
define i64 @foo() nounwind {
ret i64 0
Modified: llvm/trunk/test/CodeGen/X86/rip-rel-address.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/rip-rel-address.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/rip-rel-address.ll (original)
+++ llvm/trunk/test/CodeGen/X86/rip-rel-address.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -relocation-model=pic -mtriple=x86_64-apple-darwin10 | FileCheck %s -check-prefix=PIC64
+; RUN: llc < %s -relocation-model=pic -mtriple=x86_64-apple-darwin10 | FileCheck %s -check-prefix=PIC64
; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -relocation-model=static | FileCheck %s -check-prefix=STATIC64
; Use %rip-relative addressing even in static mode on x86-64, because
Modified: llvm/trunk/test/CodeGen/X86/rot16.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/rot16.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/rot16.ll (original)
+++ llvm/trunk/test/CodeGen/X86/rot16.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mcpu=generic | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- -mcpu=generic | FileCheck %s
define i16 @foo(i16 %x, i16 %y, i16 %z) nounwind readnone {
entry:
Modified: llvm/trunk/test/CodeGen/X86/rot32.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/rot32.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/rot32.ll (original)
+++ llvm/trunk/test/CodeGen/X86/rot32.ll Tue Aug 1 17:28:10 2017
@@ -1,6 +1,6 @@
-; RUN: llc < %s -march=x86 -mcpu=corei7 | FileCheck %s
-; RUN: llc < %s -march=x86 -mcpu=corei7-avx | FileCheck %s --check-prefix=SHLD
-; RUN: llc < %s -march=x86 -mcpu=core-avx2 | FileCheck %s --check-prefix=BMI2
+; RUN: llc < %s -mtriple=i686-- -mcpu=corei7 | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- -mcpu=corei7-avx | FileCheck %s --check-prefix=SHLD
+; RUN: llc < %s -mtriple=i686-- -mcpu=core-avx2 | FileCheck %s --check-prefix=BMI2
define i32 @foo(i32 %x, i32 %y, i32 %z) nounwind readnone {
entry:
Modified: llvm/trunk/test/CodeGen/X86/rot64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/rot64.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/rot64.ll (original)
+++ llvm/trunk/test/CodeGen/X86/rot64.ll Tue Aug 1 17:28:10 2017
@@ -1,6 +1,6 @@
-; RUN: llc < %s -march=x86-64 -mcpu=corei7 | FileCheck %s
-; RUN: llc < %s -march=x86-64 -mcpu=corei7-avx | FileCheck %s --check-prefix=SHLD
-; RUN: llc < %s -march=x86-64 -mcpu=core-avx2 | FileCheck %s --check-prefix=BMI2
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=corei7 | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=corei7-avx | FileCheck %s --check-prefix=SHLD
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=core-avx2 | FileCheck %s --check-prefix=BMI2
define i64 @foo(i64 %x, i64 %y, i64 %z) nounwind readnone {
entry:
Modified: llvm/trunk/test/CodeGen/X86/rotate2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/rotate2.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/rotate2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/rotate2.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -mcpu=corei7 | grep rol | count 2
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=corei7 | grep rol | count 2
define i64 @test1(i64 %x) nounwind {
entry:
Modified: llvm/trunk/test/CodeGen/X86/rrlist-livereg-corrutpion.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/rrlist-livereg-corrutpion.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/rrlist-livereg-corrutpion.ll (original)
+++ llvm/trunk/test/CodeGen/X86/rrlist-livereg-corrutpion.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
; CHECK-LABEL: test
define i64 @test(i64 %a, i256 %b, i1 %c) {
Modified: llvm/trunk/test/CodeGen/X86/scalar-extract.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/scalar-extract.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/scalar-extract.ll (original)
+++ llvm/trunk/test/CodeGen/X86/scalar-extract.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mattr=+mmx -o %t
+; RUN: llc < %s -mtriple=i686-- -mattr=+mmx -o %t
; RUN: not grep movq %t
; Check that widening doesn't introduce a mmx register in this case when
Modified: llvm/trunk/test/CodeGen/X86/scalar_sse_minmax.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/scalar_sse_minmax.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/scalar_sse_minmax.ll (original)
+++ llvm/trunk/test/CodeGen/X86/scalar_sse_minmax.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mattr=+sse,+sse2 | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- -mattr=+sse,+sse2 | FileCheck %s
define float @min1(float %x, float %y) {
; CHECK-LABEL: min1
Modified: llvm/trunk/test/CodeGen/X86/scalar_widen_div.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/scalar_widen_div.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/scalar_widen_div.ll (original)
+++ llvm/trunk/test/CodeGen/X86/scalar_widen_div.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -mattr=+sse4.2 | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse4.2 | FileCheck %s
; Verify when widening a divide/remainder operation, we only generate a
; divide/rem per element since divide/remainder can trap.
Modified: llvm/trunk/test/CodeGen/X86/scalarize-bitcast.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/scalarize-bitcast.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/scalarize-bitcast.ll (original)
+++ llvm/trunk/test/CodeGen/X86/scalarize-bitcast.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64
+; RUN: llc < %s
; PR3886
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
Modified: llvm/trunk/test/CodeGen/X86/scheduler-backtracking.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/scheduler-backtracking.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/scheduler-backtracking.ll (original)
+++ llvm/trunk/test/CodeGen/X86/scheduler-backtracking.ll Tue Aug 1 17:28:10 2017
@@ -1,8 +1,8 @@
-; RUN: llc -march=x86-64 < %s -pre-RA-sched=list-ilp | FileCheck %s
-; RUN: llc -march=x86-64 < %s -pre-RA-sched=list-hybrid | FileCheck %s
-; RUN: llc -march=x86-64 < %s -pre-RA-sched=source | FileCheck %s
-; RUN: llc -march=x86-64 < %s -pre-RA-sched=list-burr | FileCheck %s
-; RUN: llc -march=x86-64 < %s -pre-RA-sched=linearize | FileCheck %s
+; RUN: llc -mtriple=x86_64-- < %s -pre-RA-sched=list-ilp | FileCheck %s
+; RUN: llc -mtriple=x86_64-- < %s -pre-RA-sched=list-hybrid | FileCheck %s
+; RUN: llc -mtriple=x86_64-- < %s -pre-RA-sched=source | FileCheck %s
+; RUN: llc -mtriple=x86_64-- < %s -pre-RA-sched=list-burr | FileCheck %s
+; RUN: llc -mtriple=x86_64-- < %s -pre-RA-sched=linearize | FileCheck %s
; PR22304 https://llvm.org/bugs/show_bug.cgi?id=22304
; Tests checking backtracking in source scheduler. llc used to crash on them.
Modified: llvm/trunk/test/CodeGen/X86/sdiv-exact.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sdiv-exact.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/sdiv-exact.ll (original)
+++ llvm/trunk/test/CodeGen/X86/sdiv-exact.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc -march=x86 -mattr=+sse2 < %s | FileCheck %s
+; RUN: llc -mtriple=i686-- -mattr=+sse2 < %s | FileCheck %s
define i32 @test1(i32 %x) {
%div = sdiv exact i32 %x, 25
Modified: llvm/trunk/test/CodeGen/X86/sdiv-pow2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sdiv-pow2.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/sdiv-pow2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/sdiv-pow2.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc -march=x86 < %s | FileCheck %s
+; RUN: llc -mtriple=i686-- < %s | FileCheck %s
; No attributes, should not use idiv
define i32 @test1(i32 inreg %x) {
Modified: llvm/trunk/test/CodeGen/X86/setoeq.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/setoeq.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/setoeq.ll (original)
+++ llvm/trunk/test/CodeGen/X86/setoeq.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 | FileCheck %s
define zeroext i8 @t(double %x) nounwind readnone {
entry:
Modified: llvm/trunk/test/CodeGen/X86/setuge.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/setuge.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/setuge.ll (original)
+++ llvm/trunk/test/CodeGen/X86/setuge.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | not grep set
+; RUN: llc < %s -mtriple=i686-- | not grep set
declare i1 @llvm.isunordered.f32(float, float)
Modified: llvm/trunk/test/CodeGen/X86/sext-load.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sext-load.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/sext-load.ll (original)
+++ llvm/trunk/test/CodeGen/X86/sext-load.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- | FileCheck %s
; When doing sign extension, use the sext-load lowering to take advantage of
; x86's sign extension during loads.
Modified: llvm/trunk/test/CodeGen/X86/sext-subreg.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sext-subreg.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/sext-subreg.ll (original)
+++ llvm/trunk/test/CodeGen/X86/sext-subreg.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
; rdar://7529457
define i64 @t(i64 %A, i64 %B, i32* %P, i64 *%P2) nounwind {
Modified: llvm/trunk/test/CodeGen/X86/shift-coalesce.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/shift-coalesce.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/shift-coalesce.ll (original)
+++ llvm/trunk/test/CodeGen/X86/shift-coalesce.ll Tue Aug 1 17:28:10 2017
@@ -1,6 +1,6 @@
-; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | \
+; RUN: llc < %s -mtriple=i686-- -x86-asm-syntax=intel | \
; RUN: grep "shld.*cl"
-; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | \
+; RUN: llc < %s -mtriple=i686-- -x86-asm-syntax=intel | \
; RUN: not grep "mov cl, bl"
; PR687
Modified: llvm/trunk/test/CodeGen/X86/shift-i128.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/shift-i128.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/shift-i128.ll (original)
+++ llvm/trunk/test/CodeGen/X86/shift-i128.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=x86
-; RUN: llc < %s -march=x86-64
+; RUN: llc < %s -mtriple=i686--
+; RUN: llc < %s -mtriple=x86_64--
;
; Scalars
Modified: llvm/trunk/test/CodeGen/X86/shift-i256.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/shift-i256.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/shift-i256.ll (original)
+++ llvm/trunk/test/CodeGen/X86/shift-i256.ll Tue Aug 1 17:28:10 2017
@@ -1,6 +1,6 @@
-; RUN: llc < %s -march=x86 | FileCheck %s
-; RUN: llc < %s -march=x86-64 -O0 | FileCheck %s -check-prefix=CHECK-X64
-; RUN: llc < %s -march=x86-64 -O2 | FileCheck %s -check-prefix=CHECK-X64
+; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- -O0 | FileCheck %s -check-prefix=CHECK-X64
+; RUN: llc < %s -mtriple=x86_64-- -O2 | FileCheck %s -check-prefix=CHECK-X64
; CHECK-LABEL: shift1
define void @shift1(i256 %x, i256 %a, i256* nocapture %r) nounwind readnone {
Modified: llvm/trunk/test/CodeGen/X86/shift-one.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/shift-one.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/shift-one.ll (original)
+++ llvm/trunk/test/CodeGen/X86/shift-one.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | not grep leal
+; RUN: llc < %s -mtriple=i686-- | not grep leal
@x = external global i32 ; <i32*> [#uses=1]
Modified: llvm/trunk/test/CodeGen/X86/shift-pair.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/shift-pair.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/shift-pair.ll (original)
+++ llvm/trunk/test/CodeGen/X86/shift-pair.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
define i64 @test(i64 %A) {
; CHECK: @test
Modified: llvm/trunk/test/CodeGen/X86/shift-parts.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/shift-parts.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/shift-parts.ll (original)
+++ llvm/trunk/test/CodeGen/X86/shift-parts.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc -march=x86-64 < %s | FileCheck %s
+; RUN: llc -mtriple=x86_64-- < %s | FileCheck %s
; PR4736
%0 = type { i32, i8, [35 x i8] }
Modified: llvm/trunk/test/CodeGen/X86/shl-anyext.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/shl-anyext.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/shl-anyext.ll (original)
+++ llvm/trunk/test/CodeGen/X86/shl-anyext.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc -march=x86-64 < %s | FileCheck %s
+; RUN: llc -mtriple=x86_64-- < %s | FileCheck %s
; Codegen should be able to use a 32-bit shift instead of a 64-bit shift.
; CHECK: shll $16
Modified: llvm/trunk/test/CodeGen/X86/shl-i64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/shl-i64.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/shl-i64.ll (original)
+++ llvm/trunk/test/CodeGen/X86/shl-i64.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc -march=x86 -mattr=+sse2 < %s | FileCheck %s
+; RUN: llc -mtriple=i686-- -mattr=+sse2 < %s | FileCheck %s
; Make sure that we don't generate an illegal i64 extract after LegalizeType.
; CHECK: shll
Modified: llvm/trunk/test/CodeGen/X86/shl_elim.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/shl_elim.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/shl_elim.ll (original)
+++ llvm/trunk/test/CodeGen/X86/shl_elim.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- | FileCheck %s
define i32 @test1(i64 %a) nounwind {
%tmp29 = lshr i64 %a, 24 ; <i64> [#uses=1]
Modified: llvm/trunk/test/CodeGen/X86/shrink-fp-const1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/shrink-fp-const1.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/shrink-fp-const1.ll (original)
+++ llvm/trunk/test/CodeGen/X86/shrink-fp-const1.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -mattr=+sse2 | not grep cvtss2sd
+; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2 | not grep cvtss2sd
; PR1264
define double @foo(double %x) {
Modified: llvm/trunk/test/CodeGen/X86/shrink-fp-const2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/shrink-fp-const2.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/shrink-fp-const2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/shrink-fp-const2.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | grep flds
+; RUN: llc < %s -mtriple=i686-- | grep flds
; This should be a flds, not fldt.
define x86_fp80 @test2() nounwind {
entry:
Modified: llvm/trunk/test/CodeGen/X86/sink-hoist.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sink-hoist.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/sink-hoist.ll (original)
+++ llvm/trunk/test/CodeGen/X86/sink-hoist.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -verify-machineinstrs -march=x86-64 -asm-verbose=false -mtriple=x86_64-unknown-linux-gnu -mcpu=nehalem -post-RA-scheduler=true -schedmodel=false | FileCheck %s
+; RUN: llc < %s -verify-machineinstrs -asm-verbose=false -mtriple=x86_64-unknown-linux-gnu -mcpu=nehalem -post-RA-scheduler=true -schedmodel=false | FileCheck %s
; Currently, floating-point selects are lowered to CFG triangles.
; This means that one side of the select is always unconditionally
Modified: llvm/trunk/test/CodeGen/X86/smul-with-overflow.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/smul-with-overflow.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/smul-with-overflow.ll (original)
+++ llvm/trunk/test/CodeGen/X86/smul-with-overflow.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- | FileCheck %s
@ok = internal constant [4 x i8] c"%d\0A\00"
@no = internal constant [4 x i8] c"no\0A\00"
Modified: llvm/trunk/test/CodeGen/X86/soft-fp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/soft-fp.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/soft-fp.ll (original)
+++ llvm/trunk/test/CodeGen/X86/soft-fp.ll Tue Aug 1 17:28:10 2017
@@ -1,10 +1,10 @@
-; RUN: llc < %s -march=x86 -mattr=+mmx,+sse,+soft-float \
+; RUN: llc < %s -mtriple=i686-- -mattr=+mmx,+sse,+soft-float \
; RUN: | FileCheck %s --check-prefix=SOFT1 --check-prefix=CHECK
-; RUN: llc < %s -march=x86-64 -mattr=+mmx,+sse2,+soft-float \
+; RUN: llc < %s -mtriple=x86_64-- -mattr=+mmx,+sse2,+soft-float \
; RUN: | FileCheck %s --check-prefix=SOFT2 --check-prefix=CHECK
-; RUN: llc < %s -march=x86-64 -mattr=+mmx,+sse \
+; RUN: llc < %s -mtriple=x86_64-- -mattr=+mmx,+sse \
; RUN: | FileCheck %s --check-prefix=SSE1 --check-prefix=CHECK
-; RUN: llc < %s -march=x86-64 -mattr=+mmx,+sse2 \
+; RUN: llc < %s -mtriple=x86_64-- -mattr=+mmx,+sse2 \
; RUN: | FileCheck %s --check-prefix=SSE2 --check-prefix=CHECK
; RUN: llc < %s -mtriple=x86_64-gnux32 -mattr=+mmx,+sse2,+soft-float | FileCheck %s
Modified: llvm/trunk/test/CodeGen/X86/split-vector-bitcast.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/split-vector-bitcast.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/split-vector-bitcast.ll (original)
+++ llvm/trunk/test/CodeGen/X86/split-vector-bitcast.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mattr=-sse2,+sse | grep addps
+; RUN: llc < %s -mtriple=i686-- -mattr=-sse2,+sse | grep addps
; PR10497 + another isel issue with sse2 disabled
; (This is primarily checking that this construct doesn't crash.)
Modified: llvm/trunk/test/CodeGen/X86/split-vector-rem.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/split-vector-rem.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/split-vector-rem.ll (original)
+++ llvm/trunk/test/CodeGen/X86/split-vector-rem.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=x86-64 | grep div | count 16
-; RUN: llc < %s -march=x86-64 | grep fmodf | count 8
+; RUN: llc < %s -mtriple=x86_64-- | grep div | count 16
+; RUN: llc < %s -mtriple=x86_64-- | grep fmodf | count 8
define <8 x i32> @foo(<8 x i32> %t, <8 x i32> %u) {
%m = srem <8 x i32> %t, %u
Modified: llvm/trunk/test/CodeGen/X86/sse-align-1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse-align-1.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/sse-align-1.ll (original)
+++ llvm/trunk/test/CodeGen/X86/sse-align-1.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 | grep movap | count 2
+; RUN: llc < %s -mtriple=x86_64-- | grep movap | count 2
define <4 x float> @foo(<4 x float>* %p) nounwind {
%t = load <4 x float>, <4 x float>* %p
Modified: llvm/trunk/test/CodeGen/X86/sse-align-10.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse-align-10.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/sse-align-10.ll (original)
+++ llvm/trunk/test/CodeGen/X86/sse-align-10.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
define <2 x i64> @bar(<2 x i64>* %p) nounwind {
; CHECK-LABEL: bar:
Modified: llvm/trunk/test/CodeGen/X86/sse-align-11.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse-align-11.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/sse-align-11.ll (original)
+++ llvm/trunk/test/CodeGen/X86/sse-align-11.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=x86 -mcpu=yonah -mtriple=i686-apple-darwin8 | grep movaps
-; RUN: llc < %s -march=x86 -mcpu=yonah -mtriple=i686-linux-gnu | grep movaps
+; RUN: llc < %s -mcpu=yonah -mtriple=i686-apple-darwin8 | grep movaps
+; RUN: llc < %s -mcpu=yonah -mtriple=i686-linux-gnu | grep movaps
; PR8969 - make 32-bit linux have a 16-byte aligned stack
define <4 x float> @foo(float %a, float %b, float %c, float %d) nounwind {
Modified: llvm/trunk/test/CodeGen/X86/sse-align-12.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse-align-12.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/sse-align-12.ll (original)
+++ llvm/trunk/test/CodeGen/X86/sse-align-12.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -march=x86-64 -mcpu=nehalem | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=nehalem | FileCheck %s
define <4 x float> @a(<4 x float>* %y) nounwind {
; CHECK-LABEL: a:
Modified: llvm/trunk/test/CodeGen/X86/sse-align-2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse-align-2.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/sse-align-2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/sse-align-2.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -mcpu=penryn | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=penryn | FileCheck %s
define <4 x float> @foo(<4 x float>* %p, <4 x float> %x) nounwind {
%t = load <4 x float>, <4 x float>* %p, align 4
Modified: llvm/trunk/test/CodeGen/X86/sse-align-4.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse-align-4.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/sse-align-4.ll (original)
+++ llvm/trunk/test/CodeGen/X86/sse-align-4.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 | grep movup | count 2
+; RUN: llc < %s -mtriple=x86_64-- | grep movup | count 2
define void @foo(<4 x float>* %p, <4 x float> %x) nounwind {
store <4 x float> %x, <4 x float>* %p, align 4
Modified: llvm/trunk/test/CodeGen/X86/sse-align-5.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse-align-5.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/sse-align-5.ll (original)
+++ llvm/trunk/test/CodeGen/X86/sse-align-5.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 | grep movaps | count 1
+; RUN: llc < %s -mtriple=x86_64-- | grep movaps | count 1
define <2 x i64> @bar(<2 x i64>* %p) nounwind {
%t = load <2 x i64>, <2 x i64>* %p
Modified: llvm/trunk/test/CodeGen/X86/sse-align-6.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse-align-6.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/sse-align-6.ll (original)
+++ llvm/trunk/test/CodeGen/X86/sse-align-6.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 | grep movdqu | count 1
+; RUN: llc < %s -mtriple=x86_64-- | grep movdqu | count 1
define <2 x i64> @bar(<2 x i64>* %p, <2 x i64> %x) nounwind {
%t = load <2 x i64>, <2 x i64>* %p, align 8
Modified: llvm/trunk/test/CodeGen/X86/sse-align-8.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse-align-8.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/sse-align-8.ll (original)
+++ llvm/trunk/test/CodeGen/X86/sse-align-8.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 | grep movups | count 1
+; RUN: llc < %s -mtriple=x86_64-- | grep movups | count 1
define void @bar(<2 x i64>* %p, <2 x i64> %x) nounwind {
store <2 x i64> %x, <2 x i64>* %p, align 8
Modified: llvm/trunk/test/CodeGen/X86/sse-align-9.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse-align-9.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/sse-align-9.ll (original)
+++ llvm/trunk/test/CodeGen/X86/sse-align-9.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 | grep movup | count 2
+; RUN: llc < %s -mtriple=x86_64-- | grep movup | count 2
define <4 x float> @foo(<4 x float>* %p) nounwind {
%t = load <4 x float>, <4 x float>* %p, align 4
Modified: llvm/trunk/test/CodeGen/X86/sse-load-ret.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse-load-ret.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/sse-load-ret.ll (original)
+++ llvm/trunk/test/CodeGen/X86/sse-load-ret.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=x86 -mcpu=yonah | not grep movss
-; RUN: llc < %s -march=x86 -mcpu=yonah | not grep xmm
+; RUN: llc < %s -mtriple=i686-- -mcpu=yonah | not grep movss
+; RUN: llc < %s -mtriple=i686-- -mcpu=yonah | not grep xmm
define double @test1(double* %P) {
%X = load double, double* %P ; <double> [#uses=1]
Modified: llvm/trunk/test/CodeGen/X86/sse-only.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse-only.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/sse-only.ll (original)
+++ llvm/trunk/test/CodeGen/X86/sse-only.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -march=x86 -mattr=+sse2,-mmx | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- -mattr=+sse2,-mmx | FileCheck %s
; Test that turning off mmx doesn't turn off sse
Modified: llvm/trunk/test/CodeGen/X86/sse-unaligned-mem-feature.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse-unaligned-mem-feature.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/sse-unaligned-mem-feature.ll (original)
+++ llvm/trunk/test/CodeGen/X86/sse-unaligned-mem-feature.ll Tue Aug 1 17:28:10 2017
@@ -1,7 +1,7 @@
-; RUN: llc -mcpu=yonah -mattr=sse-unaligned-mem -march=x86 < %s | FileCheck %s
+; RUN: llc -mcpu=yonah -mattr=sse-unaligned-mem < %s | FileCheck %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
-target triple = "x86_64-unknown-linux-gnu"
+target triple = "i686-unknown-linux-gnu"
define <4 x float> @foo(<4 x float>* %P, <4 x float> %In) nounwind {
%A = load <4 x float>, <4 x float>* %P, align 4
Modified: llvm/trunk/test/CodeGen/X86/sse-varargs.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse-varargs.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/sse-varargs.ll (original)
+++ llvm/trunk/test/CodeGen/X86/sse-varargs.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mattr=+sse2 | grep xmm | grep esp
+; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 | grep xmm | grep esp
define i32 @t() nounwind {
entry:
Modified: llvm/trunk/test/CodeGen/X86/stack-protector-vreg-to-vreg-copy.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/stack-protector-vreg-to-vreg-copy.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/stack-protector-vreg-to-vreg-copy.ll (original)
+++ llvm/trunk/test/CodeGen/X86/stack-protector-vreg-to-vreg-copy.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple i386-unknown-freebsd10.0 -march=x86 --relocation-model=pic %s -o -
+; RUN: llc -mtriple i386-unknown-freebsd10.0 --relocation-model=pic %s -o -
; PR16979
Modified: llvm/trunk/test/CodeGen/X86/store-empty-member.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/store-empty-member.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/store-empty-member.ll (original)
+++ llvm/trunk/test/CodeGen/X86/store-empty-member.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- | FileCheck %s
; Don't crash on an empty struct member.
Modified: llvm/trunk/test/CodeGen/X86/store-fp-constant.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/store-fp-constant.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/store-fp-constant.ll (original)
+++ llvm/trunk/test/CodeGen/X86/store-fp-constant.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- | FileCheck %s
; CHECK-NOT: rodata
; CHECK-NOT: literal
Modified: llvm/trunk/test/CodeGen/X86/store-global-address.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/store-global-address.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/store-global-address.ll (original)
+++ llvm/trunk/test/CodeGen/X86/store-global-address.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | grep movl | count 1
+; RUN: llc < %s -mtriple=i686-- | grep movl | count 1
@dst = global i32 0 ; <i32*> [#uses=1]
@ptr = global i32* null ; <i32**> [#uses=1]
Modified: llvm/trunk/test/CodeGen/X86/store-narrow.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/store-narrow.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/store-narrow.ll (original)
+++ llvm/trunk/test/CodeGen/X86/store-narrow.ll Tue Aug 1 17:28:10 2017
@@ -1,9 +1,8 @@
; rdar://7860110
-; RUN: llc -asm-verbose=false < %s | FileCheck %s -check-prefix=X64
-; RUN: llc -march=x86 -asm-verbose=false -fixup-byte-word-insts=1 < %s | FileCheck %s -check-prefix=X32 -check-prefix=X32-BWON
-; RUN: llc -march=x86 -asm-verbose=false -fixup-byte-word-insts=0 < %s | FileCheck %s -check-prefix=X32 -check-prefix=X32-BWOFF
+; RUN: llc -mtriple=x86_64-apple-darwin10.2 -asm-verbose=false < %s | FileCheck %s -check-prefix=X64
+; RUN: llc -mtriple=i686-apple-darwin10.2 -asm-verbose=false -fixup-byte-word-insts=1 < %s | FileCheck %s -check-prefix=X32 -check-prefix=X32-BWON
+; RUN: llc -mtriple=i686-apple-darwin10.2 -asm-verbose=false -fixup-byte-word-insts=0 < %s | FileCheck %s -check-prefix=X32 -check-prefix=X32-BWOFF
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
-target triple = "x86_64-apple-darwin10.2"
define void @test1(i32* nocapture %a0, i8 zeroext %a1) nounwind ssp {
entry:
Modified: llvm/trunk/test/CodeGen/X86/storetrunc-fp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/storetrunc-fp.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/storetrunc-fp.ll (original)
+++ llvm/trunk/test/CodeGen/X86/storetrunc-fp.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | not grep flds
+; RUN: llc < %s -mtriple=i686-- | not grep flds
define void @foo(x86_fp80 %a, x86_fp80 %b, float* %fp) {
%c = fadd x86_fp80 %a, %b
Modified: llvm/trunk/test/CodeGen/X86/stride-nine-with-base-reg.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/stride-nine-with-base-reg.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/stride-nine-with-base-reg.ll (original)
+++ llvm/trunk/test/CodeGen/X86/stride-nine-with-base-reg.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -relocation-model=static | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- -relocation-model=static | FileCheck %s
; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
; CHECK-NOT: lea
Modified: llvm/trunk/test/CodeGen/X86/stride-reuse.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/stride-reuse.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/stride-reuse.ll (original)
+++ llvm/trunk/test/CodeGen/X86/stride-reuse.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mcpu=generic -march=x86 | FileCheck %s
+; RUN: llc < %s -mcpu=generic -mtriple=i686-- | FileCheck %s
; RUN: llc < %s -mcpu=generic -mtriple=x86_64-linux | FileCheck %s
; CHECK-NOT: lea
Modified: llvm/trunk/test/CodeGen/X86/sub.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sub.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/sub.ll (original)
+++ llvm/trunk/test/CodeGen/X86/sub.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc -march=x86 < %s | FileCheck %s
+; RUN: llc -mtriple=i686-- < %s | FileCheck %s
define i32 @test1(i32 %x) {
%xor = xor i32 %x, 31
Modified: llvm/trunk/test/CodeGen/X86/subreg-to-reg-0.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/subreg-to-reg-0.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/subreg-to-reg-0.ll (original)
+++ llvm/trunk/test/CodeGen/X86/subreg-to-reg-0.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 | grep mov | count 1
+; RUN: llc < %s -mtriple=x86_64-- | grep mov | count 1
; Do eliminate the zero-extension instruction and rely on
; x86-64's implicit zero-extension!
Modified: llvm/trunk/test/CodeGen/X86/subreg-to-reg-1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/subreg-to-reg-1.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/subreg-to-reg-1.ll (original)
+++ llvm/trunk/test/CodeGen/X86/subreg-to-reg-1.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
; CHECK: {{leal .*[)], %e.*}}
; CHECK-NOT: {{leal .*[)], %e.*}}
Modified: llvm/trunk/test/CodeGen/X86/subreg-to-reg-3.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/subreg-to-reg-3.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/subreg-to-reg-3.ll (original)
+++ llvm/trunk/test/CodeGen/X86/subreg-to-reg-3.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
; CHECK: imull
Modified: llvm/trunk/test/CodeGen/X86/subreg-to-reg-4.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/subreg-to-reg-4.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/subreg-to-reg-4.ll (original)
+++ llvm/trunk/test/CodeGen/X86/subreg-to-reg-4.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 > %t
+; RUN: llc < %s -mtriple=x86_64-- > %t
; RUN: not grep leaq %t
; RUN: not grep incq %t
; RUN: not grep decq %t
Modified: llvm/trunk/test/CodeGen/X86/subreg-to-reg-6.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/subreg-to-reg-6.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/subreg-to-reg-6.ll (original)
+++ llvm/trunk/test/CodeGen/X86/subreg-to-reg-6.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64
+; RUN: llc < %s -mtriple=x86_64--
define i64 @foo() nounwind {
entry:
Modified: llvm/trunk/test/CodeGen/X86/switch-bt.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/switch-bt.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/switch-bt.ll (original)
+++ llvm/trunk/test/CodeGen/X86/switch-bt.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc -march=x86-64 -asm-verbose=false < %s -jump-table-density=40 | FileCheck %s
+; RUN: llc -mtriple=x86_64-- -asm-verbose=false < %s -jump-table-density=40 | FileCheck %s
; This switch should use bit tests, and the third bit test case is just
; testing for one possible value, so it doesn't need a bt.
Modified: llvm/trunk/test/CodeGen/X86/switch-crit-edge-constant.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/switch-crit-edge-constant.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/switch-crit-edge-constant.ll (original)
+++ llvm/trunk/test/CodeGen/X86/switch-crit-edge-constant.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
; PR925
-; RUN: llc < %s -march=x86 | FileCheck %s
+; RUN: llc < %s | FileCheck %s
; CHECK: {{mov.*str1}}
; CHECK-NOT: {{mov.*str1}}
Modified: llvm/trunk/test/CodeGen/X86/switch-default-only.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/switch-default-only.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/switch-default-only.ll (original)
+++ llvm/trunk/test/CodeGen/X86/switch-default-only.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc -O0 -fast-isel=false -march=x86 < %s | FileCheck %s
+; RUN: llc -O0 -fast-isel=false -mtriple=i686-- < %s | FileCheck %s
; No need for branching when the default and only destination follows
; immediately after the switch.
Modified: llvm/trunk/test/CodeGen/X86/switch-edge-weight.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/switch-edge-weight.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/switch-edge-weight.ll (original)
+++ llvm/trunk/test/CodeGen/X86/switch-edge-weight.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc -march=x86-64 -print-machineinstrs=expand-isel-pseudos %s -o /dev/null 2>&1 | FileCheck %s
+; RUN: llc -mtriple=x86_64-- -print-machineinstrs=expand-isel-pseudos %s -o /dev/null 2>&1 | FileCheck %s
declare void @foo(i32)
Modified: llvm/trunk/test/CodeGen/X86/switch-or.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/switch-or.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/switch-or.ll (original)
+++ llvm/trunk/test/CodeGen/X86/switch-or.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc -march=x86 -asm-verbose=false < %s | FileCheck %s
+; RUN: llc -mtriple=i686-- -asm-verbose=false < %s | FileCheck %s
; Check that merging switch cases that differ in one bit works.
; CHECK-LABEL: test1
Modified: llvm/trunk/test/CodeGen/X86/switch-zextload.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/switch-zextload.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/switch-zextload.ll (original)
+++ llvm/trunk/test/CodeGen/X86/switch-zextload.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | grep mov | count 1
+; RUN: llc < %s | grep mov | count 1
; Do zextload, instead of a load and a separate zext.
Modified: llvm/trunk/test/CodeGen/X86/tail-call-legality.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/tail-call-legality.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/tail-call-legality.ll (original)
+++ llvm/trunk/test/CodeGen/X86/tail-call-legality.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc -march=x86 -o - < %s | FileCheck %s
+; RUN: llc -mtriple=i686-- -o - < %s | FileCheck %s
; This used to be classified as a tail call because of a mismatch in the
; arguments seen by Analysis.cpp and ISelLowering. As seen by ISelLowering, they
Modified: llvm/trunk/test/CodeGen/X86/tail-dup-debugloc.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/tail-dup-debugloc.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/tail-dup-debugloc.ll (original)
+++ llvm/trunk/test/CodeGen/X86/tail-dup-debugloc.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc -stop-after=tailduplication -march=x86-64 < %s | FileCheck %s
+; RUN: llc -stop-after=tailduplication < %s | FileCheck %s
;
; Check that DebugLoc attached to the branch instruction of
; 'while.cond1.preheader.lr.ph' survives after tailduplication pass.
Modified: llvm/trunk/test/CodeGen/X86/tail-opts.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/tail-opts.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/tail-opts.ll (original)
+++ llvm/trunk/test/CodeGen/X86/tail-opts.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -mtriple=x86_64-unknown-linux-gnu -asm-verbose=false -post-RA-scheduler=true | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -asm-verbose=false -post-RA-scheduler=true | FileCheck %s
declare void @bar(i32)
declare void @car(i32)
Modified: llvm/trunk/test/CodeGen/X86/tailcall-calleesave.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/tailcall-calleesave.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/tailcall-calleesave.ll (original)
+++ llvm/trunk/test/CodeGen/X86/tailcall-calleesave.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc -march=x86 -tailcallopt -mcpu=core < %s | FileCheck %s
+; RUN: llc -tailcallopt -mcpu=core < %s | FileCheck %s
target triple = "i686-apple-darwin"
Modified: llvm/trunk/test/CodeGen/X86/tailcall-returndup-void.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/tailcall-returndup-void.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/tailcall-returndup-void.ll (original)
+++ llvm/trunk/test/CodeGen/X86/tailcall-returndup-void.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
; CHECK: rBM_info
; CHECK-NOT: ret
Modified: llvm/trunk/test/CodeGen/X86/tailcall.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/tailcall.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/tailcall.ll (original)
+++ llvm/trunk/test/CodeGen/X86/tailcall.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -tailcallopt | grep TAILCALL | count 7
+; RUN: llc < %s -mtriple=i686-- -tailcallopt | grep TAILCALL | count 7
; With -tailcallopt, CodeGen guarantees a tail call optimization
; for all of these.
Modified: llvm/trunk/test/CodeGen/X86/tailcallfp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/tailcallfp.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/tailcallfp.ll (original)
+++ llvm/trunk/test/CodeGen/X86/tailcallfp.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -tailcallopt | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- -tailcallopt | FileCheck %s
define fastcc i32 @bar(i32 %X, i32(double, i32) *%FP) {
%Y = tail call fastcc i32 %FP(double 0.0, i32 %X)
ret i32 %Y
Modified: llvm/trunk/test/CodeGen/X86/tailcallfp2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/tailcallfp2.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/tailcallfp2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/tailcallfp2.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -tailcallopt | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- -tailcallopt | FileCheck %s
declare i32 @putchar(i32)
Modified: llvm/trunk/test/CodeGen/X86/tbm-intrinsics-x86_64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/tbm-intrinsics-x86_64.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/tbm-intrinsics-x86_64.ll (original)
+++ llvm/trunk/test/CodeGen/X86/tbm-intrinsics-x86_64.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-unknown-unknown -march=x86-64 -mattr=+tbm < %s | FileCheck %s
+; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+tbm < %s | FileCheck %s
define i32 @test_x86_tbm_bextri_u32(i32 %a) nounwind readnone {
entry:
Modified: llvm/trunk/test/CodeGen/X86/test-nofold.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/test-nofold.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/test-nofold.ll (original)
+++ llvm/trunk/test/CodeGen/X86/test-nofold.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mcpu=yonah | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- -mcpu=yonah | FileCheck %s
; rdar://5752025
; We want:
Modified: llvm/trunk/test/CodeGen/X86/test-shrink.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/test-shrink.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/test-shrink.ll (original)
+++ llvm/trunk/test/CodeGen/X86/test-shrink.ll Tue Aug 1 17:28:10 2017
@@ -1,6 +1,6 @@
; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s --check-prefix=CHECK-64
; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s --check-prefix=CHECK-64
-; RUN: llc < %s -march=x86 | FileCheck %s --check-prefix=CHECK-32
+; RUN: llc < %s -mtriple=i686-- | FileCheck %s --check-prefix=CHECK-32
; CHECK-64-LABEL: g64xh:
; CHECK-64: testb $8, {{%ah|%ch}}
Modified: llvm/trunk/test/CodeGen/X86/testb-je-fusion.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/testb-je-fusion.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/testb-je-fusion.ll (original)
+++ llvm/trunk/test/CodeGen/X86/testb-je-fusion.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -mcpu=corei7-avx | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=corei7-avx | FileCheck %s
; testb should be scheduled right before je to enable macro-fusion.
Modified: llvm/trunk/test/CodeGen/X86/tls-android-negative.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/tls-android-negative.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/tls-android-negative.ll (original)
+++ llvm/trunk/test/CodeGen/X86/tls-android-negative.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
-; RUN: llc < %s -emulated-tls -march=x86 -mtriple=x86_64-linux-android -relocation-model=pic | FileCheck %s
-; RUN: llc < %s -emulated-tls -march=x86-64 -mtriple=x86_64-linux-android -relocation-model=pic | FileCheck %s
+; RUN: llc < %s -emulated-tls -mtriple=i686-linux-android -relocation-model=pic | FileCheck %s
+; RUN: llc < %s -emulated-tls -mtriple=x86_64-linux-android -relocation-model=pic | FileCheck %s
; Make sure that some symboles are not emitted in emulated TLS model.
Modified: llvm/trunk/test/CodeGen/X86/tls-android.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/tls-android.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/tls-android.ll (original)
+++ llvm/trunk/test/CodeGen/X86/tls-android.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
-; RUN: llc < %s -emulated-tls -march=x86 -mtriple=x86_64-linux-android -relocation-model=pic | FileCheck %s
-; RUN: llc < %s -emulated-tls -march=x86-64 -mtriple=x86_64-linux-android -relocation-model=pic | FileCheck -check-prefix=X64 %s
+; RUN: llc < %s -emulated-tls -mtriple=i686-linux-android -relocation-model=pic | FileCheck %s
+; RUN: llc < %s -emulated-tls -mtriple=x86_64-linux-android -relocation-model=pic | FileCheck -check-prefix=X64 %s
; Make sure that TLS symboles are emitted in expected order.
Modified: llvm/trunk/test/CodeGen/X86/tls-local-dynamic.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/tls-local-dynamic.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/tls-local-dynamic.ll (original)
+++ llvm/trunk/test/CodeGen/X86/tls-local-dynamic.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu -relocation-model=pic | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-linux-gnu -relocation-model=pic | FileCheck %s
@x = internal thread_local global i32 0, align 4
@y = internal thread_local global i32 0, align 4
Modified: llvm/trunk/test/CodeGen/X86/tls-models.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/tls-models.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/tls-models.ll (original)
+++ llvm/trunk/test/CodeGen/X86/tls-models.ll Tue Aug 1 17:28:10 2017
@@ -1,10 +1,10 @@
-; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu | FileCheck -check-prefix=X64 %s
-; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu -relocation-model=pic | FileCheck -check-prefix=X64_PIC %s
-; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu | FileCheck -check-prefix=X32 %s
-; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu -relocation-model=pic | FileCheck -check-prefix=X32_PIC %s
+; RUN: llc < %s -mtriple=x86_64-linux-gnu | FileCheck -check-prefix=X64 %s
+; RUN: llc < %s -mtriple=x86_64-linux-gnu -relocation-model=pic | FileCheck -check-prefix=X64_PIC %s
+; RUN: llc < %s -mtriple=i386-linux-gnu | FileCheck -check-prefix=X32 %s
+; RUN: llc < %s -mtriple=i386-linux-gnu -relocation-model=pic | FileCheck -check-prefix=X32_PIC %s
; Darwin always uses the same model.
-; RUN: llc < %s -march=x86-64 -mtriple=x86_64-apple-darwin | FileCheck -check-prefix=DARWIN %s
+; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck -check-prefix=DARWIN %s
@external_gd = external thread_local global i32
@internal_gd = internal thread_local global i32 42
Modified: llvm/trunk/test/CodeGen/X86/tls-pic.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/tls-pic.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/tls-pic.ll (original)
+++ llvm/trunk/test/CodeGen/X86/tls-pic.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu -relocation-model=pic | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu -relocation-model=pic | FileCheck %s --check-prefix=X64
+; RUN: llc < %s -mtriple=i386-linux-gnu -relocation-model=pic | FileCheck %s --check-prefix=X86
+; RUN: llc < %s -mtriple=x86_64-linux-gnu -relocation-model=pic | FileCheck %s --check-prefix=X64
@i = thread_local global i32 15
@j = internal thread_local global i32 42
Modified: llvm/trunk/test/CodeGen/X86/tls-pie.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/tls-pie.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/tls-pie.ll (original)
+++ llvm/trunk/test/CodeGen/X86/tls-pie.ll Tue Aug 1 17:28:10 2017
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -march=x86 -mcpu=generic -mtriple=i386-linux-gnu -relocation-model=pic | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -march=x86-64 -mcpu=generic -mtriple=x86_64-linux-gnux32 -relocation-model=pic | FileCheck %s --check-prefix=X32
-; RUN: llc < %s -march=x86-64 -mcpu=generic -mtriple=x86_64-linux-gnu -relocation-model=pic | FileCheck %s --check-prefix=X64
+; RUN: llc < %s -mcpu=generic -mtriple=i386-linux-gnu -relocation-model=pic | FileCheck %s --check-prefix=X86
+; RUN: llc < %s -mcpu=generic -mtriple=x86_64-linux-gnux32 -relocation-model=pic | FileCheck %s --check-prefix=X32
+; RUN: llc < %s -mcpu=generic -mtriple=x86_64-linux-gnu -relocation-model=pic | FileCheck %s --check-prefix=X64
@i = thread_local global i32 15
@i2 = external thread_local global i32
Modified: llvm/trunk/test/CodeGen/X86/tls.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/tls.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/tls.ll (original)
+++ llvm/trunk/test/CodeGen/X86/tls.ll Tue Aug 1 17:28:10 2017
@@ -1,9 +1,9 @@
-; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu | FileCheck -check-prefix=X86_LINUX %s
-; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu | FileCheck -check-prefix=X64_LINUX %s
-; RUN: llc < %s -march=x86 -mtriple=x86-pc-win32 | FileCheck -check-prefix=X86_WIN %s
-; RUN: llc < %s -march=x86-64 -mtriple=x86_64-pc-win32 | FileCheck -check-prefix=X64_WIN %s
-; RUN: llc < %s -march=x86 -mtriple=x86-pc-windows-gnu | FileCheck -check-prefix=MINGW32 %s
-; RUN: llc < %s -march=x86-64 -mtriple=x86_64-pc-windows-gnu | FileCheck -check-prefix=X64_WIN %s
+; RUN: llc < %s -mtriple=i386-linux-gnu | FileCheck -check-prefix=X86_LINUX %s
+; RUN: llc < %s -mtriple=x86_64-linux-gnu | FileCheck -check-prefix=X64_LINUX %s
+; RUN: llc < %s -mtriple=i686-pc-win32 | FileCheck -check-prefix=X86_WIN %s
+; RUN: llc < %s -mtriple=x86_64-pc-win32 | FileCheck -check-prefix=X64_WIN %s
+; RUN: llc < %s -mtriple=i686-pc-windows-gnu | FileCheck -check-prefix=MINGW32 %s
+; RUN: llc < %s -mtriple=x86_64-pc-windows-gnu | FileCheck -check-prefix=X64_WIN %s
@i1 = thread_local global i32 15
@i2 = external thread_local global i32
Modified: llvm/trunk/test/CodeGen/X86/token_landingpad.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/token_landingpad.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/token_landingpad.ll (original)
+++ llvm/trunk/test/CodeGen/X86/token_landingpad.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,5 @@
-; RUN: llc < %s
+; RUN: llc < %s -mtriple=x86_64--
+; RUN: llc < %s -mtriple=i686--
; This test verifies that SelectionDAG can handle landingPad of token type and not crash LLVM.
Modified: llvm/trunk/test/CodeGen/X86/twoaddr-coalesce-2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/twoaddr-coalesce-2.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/twoaddr-coalesce-2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/twoaddr-coalesce-2.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
; REQUIRES: asserts
-; RUN: llc < %s -march=x86 -mattr=+sse2 -mcpu=penryn -stats 2>&1 | \
+; RUN: llc < %s -mattr=+sse2 -mcpu=penryn -stats 2>&1 | \
; RUN: grep "twoaddressinstruction" | grep "Number of instructions aggressively commuted"
; rdar://6480363
Modified: llvm/trunk/test/CodeGen/X86/twoaddr-coalesce-3.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/twoaddr-coalesce-3.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/twoaddr-coalesce-3.ll (original)
+++ llvm/trunk/test/CodeGen/X86/twoaddr-coalesce-3.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -relocation-model=pic | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- -relocation-model=pic | FileCheck %s
; This test is to ensure the TwoAddrInstruction pass chooses the proper operands to
; merge and generates fewer mov insns.
Modified: llvm/trunk/test/CodeGen/X86/twoaddr-coalesce.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/twoaddr-coalesce.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/twoaddr-coalesce.ll (original)
+++ llvm/trunk/test/CodeGen/X86/twoaddr-coalesce.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | grep mov | count 2
+; RUN: llc < %s -mtriple=i686-- | grep mov | count 2
; rdar://6523745
@"\01LC" = internal constant [4 x i8] c"%d\0A\00" ; <[4 x i8]*> [#uses=1]
Modified: llvm/trunk/test/CodeGen/X86/twoaddr-pass-sink.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/twoaddr-pass-sink.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/twoaddr-pass-sink.ll (original)
+++ llvm/trunk/test/CodeGen/X86/twoaddr-pass-sink.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
; REQUIRES: asserts
-; RUN: llc < %s -march=x86 -mattr=+sse2 -stats 2>&1 | grep "Number of 3-address instructions sunk"
+; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 -stats 2>&1 | grep "Number of 3-address instructions sunk"
define void @t2(<2 x i64>* %vDct, <2 x i64>* %vYp, i8* %skiplist, <2 x i64> %a1) nounwind {
entry:
Modified: llvm/trunk/test/CodeGen/X86/uint_to_fp-2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/uint_to_fp-2.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/uint_to_fp-2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/uint_to_fp-2.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-unknown-unknown -march=x86 -mattr=+sse2 | FileCheck %s
+; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+sse2 | FileCheck %s
; rdar://6504833
define float @test1(i32 %x) nounwind readnone {
Modified: llvm/trunk/test/CodeGen/X86/umul-with-carry.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/umul-with-carry.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/umul-with-carry.ll (original)
+++ llvm/trunk/test/CodeGen/X86/umul-with-carry.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | grep "jc" | count 1
+; RUN: llc < %s -mtriple=i386-- | grep "jc" | count 1
; XFAIL: *
; FIXME: umul-with-overflow not supported yet.
Modified: llvm/trunk/test/CodeGen/X86/update-terminator-debugloc.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/update-terminator-debugloc.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/update-terminator-debugloc.ll (original)
+++ llvm/trunk/test/CodeGen/X86/update-terminator-debugloc.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc -stop-after=machine-sink -march=x86-64 < %s | FileCheck %s
+; RUN: llc -stop-after=machine-sink < %s | FileCheck %s
;
; test code:
; 1 extern int bar(int x);
Modified: llvm/trunk/test/CodeGen/X86/update-terminator.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/update-terminator.mir?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/update-terminator.mir (original)
+++ llvm/trunk/test/CodeGen/X86/update-terminator.mir Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -verify-machineinstrs -run-pass block-placement -o - %s | FileCheck %s
+# RUN: llc -mtriple=x86_64-- -verify-machineinstrs -run-pass block-placement -o - %s | FileCheck %s
# Check the conditional jump in bb.1 is changed to unconditional after block placement swaps bb.2 and bb.3.
--- |
Modified: llvm/trunk/test/CodeGen/X86/utf8.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/utf8.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/utf8.ll (original)
+++ llvm/trunk/test/CodeGen/X86/utf8.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- | FileCheck %s
; CHECK: iÎ
@"i\CE\94" = common global i32 0, align 4
Modified: llvm/trunk/test/CodeGen/X86/v2f32.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/v2f32.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/v2f32.ll (original)
+++ llvm/trunk/test/CodeGen/X86/v2f32.ll Tue Aug 1 17:28:10 2017
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-linux -mcpu=penryn -o - | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -mcpu=yonah -march=x86 -mtriple=i386-linux-gnu -o - | FileCheck %s --check-prefix=X32
+; RUN: llc < %s -mcpu=yonah -mtriple=i386-linux-gnu -o - | FileCheck %s --check-prefix=X32
; PR7518
define void @test1(<2 x float> %Q, float *%P2) nounwind {
Modified: llvm/trunk/test/CodeGen/X86/v4i32load-crash.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/v4i32load-crash.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/v4i32load-crash.ll (original)
+++ llvm/trunk/test/CodeGen/X86/v4i32load-crash.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
-; RUN: llc --march=x86 --mcpu=x86-64 --mattr=ssse3 < %s
-; RUN: llc --march=x86-64 --mcpu=x86-64 --mattr=ssse3 < %s
+; RUN: llc --mtriple=i686-- --mcpu=x86-64 --mattr=ssse3 < %s
+; RUN: llc --mtriple=x86_64-- --mcpu=x86-64 --mattr=ssse3 < %s
;PR18045:
;Issue of selection for 'v4i32 load'.
Modified: llvm/trunk/test/CodeGen/X86/variable-sized-darwin-bzero.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/variable-sized-darwin-bzero.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/variable-sized-darwin-bzero.ll (original)
+++ llvm/trunk/test/CodeGen/X86/variable-sized-darwin-bzero.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mtriple=i686-apple-darwin10 | grep __bzero
+; RUN: llc < %s -mtriple=i686-apple-darwin10 | grep __bzero
define void @foo(i8* %p, i64 %n) {
call void @llvm.memset.p0i8.i64(i8* %p, i8 0, i64 %n, i32 4, i1 false)
Modified: llvm/trunk/test/CodeGen/X86/vec_add.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_add.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vec_add.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vec_add.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mattr=+sse2
+; RUN: llc < %s -mtriple=i686-- -mattr=+sse2
define <2 x i64> @test(<2 x i64> %a, <2 x i64> %b) {
entry:
Modified: llvm/trunk/test/CodeGen/X86/vec_anyext.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_anyext.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vec_anyext.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vec_anyext.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64
+; RUN: llc < %s -mtriple=x86_64--
; PR 9267
define<4 x i16> @func_16_32() {
Modified: llvm/trunk/test/CodeGen/X86/vec_call.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_call.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vec_call.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vec_call.ll Tue Aug 1 17:28:10 2017
@@ -1,6 +1,6 @@
-; RUN: llc < %s -mcpu=generic -march=x86 -mattr=+sse2 -mtriple=i686-apple-darwin8 | \
+; RUN: llc < %s -mcpu=generic -mattr=+sse2 -mtriple=i686-apple-darwin8 | \
; RUN: grep "subl.*60"
-; RUN: llc < %s -mcpu=generic -march=x86 -mattr=+sse2 -mtriple=i686-apple-darwin8 | \
+; RUN: llc < %s -mcpu=generic -mattr=+sse2 -mtriple=i686-apple-darwin8 | \
; RUN: grep "movaps.*32"
Modified: llvm/trunk/test/CodeGen/X86/vec_compare.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_compare.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vec_compare.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vec_compare.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mcpu=yonah -mtriple=i386-apple-darwin | FileCheck %s
+; RUN: llc < %s -mcpu=yonah -mtriple=i386-apple-darwin | FileCheck %s
define <4 x i32> @test1(<4 x i32> %A, <4 x i32> %B) nounwind {
Modified: llvm/trunk/test/CodeGen/X86/vec_ins_extract.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_ins_extract.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vec_ins_extract.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vec_ins_extract.ll Tue Aug 1 17:28:10 2017
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: opt < %s -sroa -instcombine | \
-; RUN: llc -march=x86 -mcpu=yonah | not grep sub.*esp
+; RUN: llc -mtriple=i686-- -mcpu=yonah | not grep sub.*esp
; This checks that various insert/extract idiom work without going to the
; stack.
Modified: llvm/trunk/test/CodeGen/X86/vec_split.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_split.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vec_split.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vec_split.ll Tue Aug 1 17:28:10 2017
@@ -1,6 +1,6 @@
-; RUN: llc -march=x86-64 -mattr=sse4.1 < %s | FileCheck %s -check-prefix=SSE4
-; RUN: llc -march=x86-64 -mattr=avx < %s | FileCheck %s -check-prefix=AVX1
-; RUN: llc -march=x86-64 -mattr=avx2 < %s | FileCheck %s -check-prefix=AVX2
+; RUN: llc -mtriple=x86_64-- -mattr=sse4.1 < %s | FileCheck %s -check-prefix=SSE4
+; RUN: llc -mtriple=x86_64-- -mattr=avx < %s | FileCheck %s -check-prefix=AVX1
+; RUN: llc -mtriple=x86_64-- -mattr=avx2 < %s | FileCheck %s -check-prefix=AVX2
define <16 x i16> @split16(<16 x i16> %a, <16 x i16> %b, <16 x i8> %__mask) {
; SSE4-LABEL: split16:
Modified: llvm/trunk/test/CodeGen/X86/vec_zero-2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_zero-2.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vec_zero-2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vec_zero-2.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mattr=+sse2
+; RUN: llc < %s -mtriple=i686-- -mattr=+sse2
define i32 @t() {
entry:
Modified: llvm/trunk/test/CodeGen/X86/vec_zero.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_zero.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vec_zero.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vec_zero.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 | FileCheck %s
; CHECK: foo
; CHECK: xorps
Modified: llvm/trunk/test/CodeGen/X86/vector-intrinsics.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-intrinsics.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vector-intrinsics.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vector-intrinsics.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 | grep call | count 43
+; RUN: llc < %s -mtriple=x86_64-- | grep call | count 43
declare <4 x double> @llvm.sin.v4f64(<4 x double> %p)
declare <4 x double> @llvm.cos.v4f64(<4 x double> %p)
Modified: llvm/trunk/test/CodeGen/X86/vector-variable-idx.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-variable-idx.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vector-variable-idx.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vector-variable-idx.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 | grep movss | count 2
+; RUN: llc < %s -mtriple=x86_64-- | grep movss | count 2
; PR2676
define float @foo(<4 x float> %p, i32 %t) {
Modified: llvm/trunk/test/CodeGen/X86/vector-variable-idx2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-variable-idx2.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vector-variable-idx2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vector-variable-idx2.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -mattr=+sse4.1
+; RUN: llc < %s -mattr=+sse4.1
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64-apple-darwin11.0.0"
Modified: llvm/trunk/test/CodeGen/X86/vector.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vector.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vector.ll Tue Aug 1 17:28:10 2017
@@ -1,6 +1,6 @@
; Test that vectors are scalarized/lowered correctly.
-; RUN: llc < %s -march=x86 -mcpu=i386
-; RUN: llc < %s -march=x86 -mcpu=yonah
+; RUN: llc < %s -mtriple=i686-- -mcpu=i386
+; RUN: llc < %s -mtriple=i686-- -mcpu=yonah
%d8 = type <8 x double>
%f1 = type <1 x float>
Modified: llvm/trunk/test/CodeGen/X86/vfcmp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vfcmp.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vfcmp.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vfcmp.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mattr=+sse2
+; RUN: llc < %s -mtriple=i686-- -mattr=+sse2
; PR2620
Modified: llvm/trunk/test/CodeGen/X86/volatile.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/volatile.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/volatile.ll (original)
+++ llvm/trunk/test/CodeGen/X86/volatile.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=x86 -mattr=sse2 | grep movsd | count 5
-; RUN: llc < %s -march=x86 -mattr=sse2 -O0 | grep -v esp | grep movsd | count 5
+; RUN: llc < %s -mtriple=i686-- -mattr=sse2 | grep movsd | count 5
+; RUN: llc < %s -mtriple=i686-- -mattr=sse2 -O0 | grep -v esp | grep movsd | count 5
@x = external global double
Modified: llvm/trunk/test/CodeGen/X86/vortex-bug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vortex-bug.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vortex-bug.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vortex-bug.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64
+; RUN: llc < %s -mtriple=x86_64--
%struct.blktkntype = type { i32, i32 }
%struct.fieldstruc = type { [128 x i8], %struct.blktkntype*, i32, i32 }
Modified: llvm/trunk/test/CodeGen/X86/vshift_split.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vshift_split.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vshift_split.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vshift_split.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mattr=+sse2
+; RUN: llc < %s -mtriple=i686-- -mattr=+sse2
; Example that requires splitting and expanding a vector shift.
define <2 x i64> @update(<2 x i64> %val) nounwind readnone {
Modified: llvm/trunk/test/CodeGen/X86/vshift_split2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vshift_split2.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vshift_split2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vshift_split2.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mcpu=yonah
+; RUN: llc < %s -mtriple=i686-- -mcpu=yonah
; Legalization example that requires splitting a large vector into smaller pieces.
Modified: llvm/trunk/test/CodeGen/X86/weak.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/weak.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/weak.ll (original)
+++ llvm/trunk/test/CodeGen/X86/weak.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86
+; RUN: llc < %s -mtriple=i686--
@a = extern_weak global i32 ; <i32*> [#uses=1]
@b = global i32* @a ; <i32**> [#uses=0]
Modified: llvm/trunk/test/CodeGen/X86/wide-fma-contraction.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/wide-fma-contraction.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/wide-fma-contraction.ll (original)
+++ llvm/trunk/test/CodeGen/X86/wide-fma-contraction.ll Tue Aug 1 17:28:10 2017
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -march=x86 -mcpu=bdver2 -mattr=-fma -mtriple=x86_64-apple-darwin < %s | FileCheck %s
-; RUN: llc -march=x86 -mcpu=bdver2 -mattr=-fma,-fma4 -mtriple=x86_64-apple-darwin < %s | FileCheck %s --check-prefix=CHECK-NOFMA
+; RUN: llc -mcpu=bdver2 -mattr=-fma -mtriple=i686-apple-darwin < %s | FileCheck %s
+; RUN: llc -mcpu=bdver2 -mattr=-fma,-fma4 -mtriple=i686-apple-darwin < %s | FileCheck %s --check-prefix=CHECK-NOFMA
; CHECK-LABEL: fmafunc
; CHECK-NOFMA-LABEL: fmafunc
Modified: llvm/trunk/test/CodeGen/X86/wide-integer-fold.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/wide-integer-fold.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/wide-integer-fold.ll (original)
+++ llvm/trunk/test/CodeGen/X86/wide-integer-fold.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
; CHECK: movq $-65535, %rax
; DAGCombiner should fold this to a simple constant.
Modified: llvm/trunk/test/CodeGen/X86/widen_load-1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/widen_load-1.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/widen_load-1.ll (original)
+++ llvm/trunk/test/CodeGen/X86/widen_load-1.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
-; RUN: llc -stack-symbol-ordering=0 %s -o - -march=x86-64 -mattr=-avx -mtriple=x86_64-unknown-linux-gnu | FileCheck %s --check-prefix=SSE
-; RUN: llc -stack-symbol-ordering=0 %s -o - -march=x86-64 -mattr=+avx -mtriple=x86_64-unknown-linux-gnu | FileCheck %s --check-prefix=AVX
+; RUN: llc -stack-symbol-ordering=0 %s -o - -mattr=-avx -mtriple=x86_64-unknown-linux-gnu | FileCheck %s --check-prefix=SSE
+; RUN: llc -stack-symbol-ordering=0 %s -o - -mattr=+avx -mtriple=x86_64-unknown-linux-gnu | FileCheck %s --check-prefix=AVX
; PR4891
; PR5626
Modified: llvm/trunk/test/CodeGen/X86/x86-64-disp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/x86-64-disp.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/x86-64-disp.ll (original)
+++ llvm/trunk/test/CodeGen/X86/x86-64-disp.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 | grep mov | count 2
+; RUN: llc < %s | grep mov | count 2
; Fold an offset into an address even if it's not a 32-bit
; signed integer.
Modified: llvm/trunk/test/CodeGen/X86/x86-64-double-shifts-Oz-Os-O2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/x86-64-double-shifts-Oz-Os-O2.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/x86-64-double-shifts-Oz-Os-O2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/x86-64-double-shifts-Oz-Os-O2.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -mcpu=bdver1 | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=bdver1 | FileCheck %s
; clang -Oz -c test1.cpp -emit-llvm -S -o
; Verify that we generate shld insruction when we are optimizing for size,
Modified: llvm/trunk/test/CodeGen/X86/x86-64-double-shifts-var.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/x86-64-double-shifts-var.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/x86-64-double-shifts-var.ll (original)
+++ llvm/trunk/test/CodeGen/X86/x86-64-double-shifts-var.ll Tue Aug 1 17:28:10 2017
@@ -1,23 +1,23 @@
-; RUN: llc < %s -march=x86-64 -mcpu=athlon | FileCheck %s
-; RUN: llc < %s -march=x86-64 -mcpu=athlon-tbird | FileCheck %s
-; RUN: llc < %s -march=x86-64 -mcpu=athlon-4 | FileCheck %s
-; RUN: llc < %s -march=x86-64 -mcpu=athlon-xp | FileCheck %s
-; RUN: llc < %s -march=x86-64 -mcpu=athlon-mp | FileCheck %s
-; RUN: llc < %s -march=x86-64 -mcpu=k8 | FileCheck %s
-; RUN: llc < %s -march=x86-64 -mcpu=opteron | FileCheck %s
-; RUN: llc < %s -march=x86-64 -mcpu=athlon64 | FileCheck %s
-; RUN: llc < %s -march=x86-64 -mcpu=athlon-fx | FileCheck %s
-; RUN: llc < %s -march=x86-64 -mcpu=k8-sse3 | FileCheck %s
-; RUN: llc < %s -march=x86-64 -mcpu=opteron-sse3 | FileCheck %s
-; RUN: llc < %s -march=x86-64 -mcpu=athlon64-sse3 | FileCheck %s
-; RUN: llc < %s -march=x86-64 -mcpu=amdfam10 | FileCheck %s
-; RUN: llc < %s -march=x86-64 -mcpu=btver1 | FileCheck %s
-; RUN: llc < %s -march=x86-64 -mcpu=btver2 | FileCheck %s
-; RUN: llc < %s -march=x86-64 -mcpu=bdver1 | FileCheck %s
-; RUN: llc < %s -march=x86-64 -mcpu=bdver2 | FileCheck %s
-; RUN: llc < %s -march=x86-64 -mcpu=bdver3 | FileCheck %s
-; RUN: llc < %s -march=x86-64 -mcpu=bdver4 | FileCheck %s
-; RUN: llc < %s -march=x86-64 -mcpu=znver1 | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=athlon | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=athlon-tbird | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=athlon-4 | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=athlon-xp | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=athlon-mp | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=k8 | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=opteron | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=athlon64 | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=athlon-fx | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=k8-sse3 | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=opteron-sse3 | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=athlon64-sse3 | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=amdfam10 | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=btver1 | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=btver2 | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=bdver1 | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=bdver2 | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=bdver3 | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=bdver4 | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=znver1 | FileCheck %s
; Verify that for the X86_64 processors that are known to have poor latency
; double precision shift instructions we do not generate 'shld' or 'shrd'
Modified: llvm/trunk/test/CodeGen/X86/x86-64-ret0.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/x86-64-ret0.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/x86-64-ret0.ll (original)
+++ llvm/trunk/test/CodeGen/X86/x86-64-ret0.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 | grep mov | count 1
+; RUN: llc < %s -mtriple=x86_64-- | grep mov | count 1
define i32 @f() nounwind {
tail call void @t( i32 1 ) nounwind
Modified: llvm/trunk/test/CodeGen/X86/x86-fold-pshufb.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/x86-fold-pshufb.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/x86-fold-pshufb.ll (original)
+++ llvm/trunk/test/CodeGen/X86/x86-fold-pshufb.ll Tue Aug 1 17:28:10 2017
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -relocation-model=pic -march=x86-64 -mtriple=x86_64-unknown-unknown -mattr=+ssse3 < %s | FileCheck %s
-; RUN: llc -march=x86-64 -mtriple=x86_64-unknown-unknown -mattr=+ssse3 < %s | FileCheck %s
+; RUN: llc -relocation-model=pic -mtriple=x86_64-unknown-unknown -mattr=+ssse3 < %s | FileCheck %s
+; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+ssse3 < %s | FileCheck %s
; Verify that the backend correctly folds the shuffle in function 'fold_pshufb'
; into a simple load from constant pool.
Modified: llvm/trunk/test/CodeGen/X86/x87.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/x87.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/x87.ll (original)
+++ llvm/trunk/test/CodeGen/X86/x87.ll Tue Aug 1 17:28:10 2017
@@ -1,9 +1,9 @@
-; RUN: llc < %s -march=x86 | FileCheck %s -check-prefix=X87
-; RUN: llc < %s -march=x86-64 -mattr=-sse | FileCheck %s -check-prefix=X87
-; RUN: llc < %s -march=x86 -mattr=-x87 | FileCheck %s -check-prefix=NOX87
-; RUN: llc < %s -march=x86-64 -mattr=-x87,-sse | FileCheck %s -check-prefix=NOX87
-; RUN: llc < %s -march=x86 -mattr=-x87,+sse | FileCheck %s -check-prefix=NOX87
-; RUN: llc < %s -march=x86-64 -mattr=-x87,-sse2 | FileCheck %s -check-prefix=NOX87
+; RUN: llc < %s -mtriple=i686-- | FileCheck %s -check-prefix=X87
+; RUN: llc < %s -mtriple=x86_64-- -mattr=-sse | FileCheck %s -check-prefix=X87
+; RUN: llc < %s -mtriple=i686-- -mattr=-x87 | FileCheck %s -check-prefix=NOX87
+; RUN: llc < %s -mtriple=x86_64-- -mattr=-x87,-sse | FileCheck %s -check-prefix=NOX87
+; RUN: llc < %s -mtriple=i686-- -mattr=-x87,+sse | FileCheck %s -check-prefix=NOX87
+; RUN: llc < %s -mtriple=x86_64-- -mattr=-x87,-sse2 | FileCheck %s -check-prefix=NOX87
define void @test(i32 %i, i64 %l, float* %pf, double* %pd, fp128* %pld) nounwind readnone {
; X87-LABEL: test:
Modified: llvm/trunk/test/CodeGen/X86/xmm-r64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/xmm-r64.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/xmm-r64.ll (original)
+++ llvm/trunk/test/CodeGen/X86/xmm-r64.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64
+; RUN: llc < %s -mtriple=x86_64--
define <4 x i32> @test() {
%tmp1039 = call <4 x i32> @llvm.x86.sse2.psll.d( <4 x i32> zeroinitializer, <4 x i32> zeroinitializer ) ; <<4 x i32>> [#uses=1]
Modified: llvm/trunk/test/CodeGen/X86/xtest.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/xtest.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/xtest.ll (original)
+++ llvm/trunk/test/CodeGen/X86/xtest.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -mattr=+rtm | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- -mattr=+rtm | FileCheck %s
declare i32 @llvm.x86.xtest() nounwind
Modified: llvm/trunk/test/CodeGen/X86/zero-remat.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/zero-remat.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/zero-remat.ll (original)
+++ llvm/trunk/test/CodeGen/X86/zero-remat.ll Tue Aug 1 17:28:10 2017
@@ -1,7 +1,7 @@
; REQUIRES: asserts
-; RUN: llc < %s -march=x86-64 | FileCheck %s --check-prefix=CHECK-64
-; RUN: llc < %s -march=x86-64 -o /dev/null -stats -info-output-file - | grep asm-printer | grep 12
-; RUN: llc < %s -march=x86 | FileCheck %s --check-prefix=CHECK-32
+; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefix=CHECK-64
+; RUN: llc < %s -mtriple=x86_64-- -o /dev/null -stats -info-output-file - | grep asm-printer | grep 12
+; RUN: llc < %s -mtriple=i686-- | FileCheck %s --check-prefix=CHECK-32
declare void @bar(double %x)
declare void @barf(float %x)
Modified: llvm/trunk/test/CodeGen/X86/zext-inreg-0.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/zext-inreg-0.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/zext-inreg-0.ll (original)
+++ llvm/trunk/test/CodeGen/X86/zext-inreg-0.ll Tue Aug 1 17:28:10 2017
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=x86 | FileCheck -check-prefix=X86 %s
-; RUN: llc < %s -march=x86-64 | FileCheck -check-prefix=X64 %s
+; RUN: llc < %s -mtriple=i686-- | FileCheck -check-prefix=X86 %s
+; RUN: llc < %s -mtriple=x86_64-- | FileCheck -check-prefix=X64 %s
; X86-NOT: and
Modified: llvm/trunk/test/CodeGen/X86/zext-inreg-1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/zext-inreg-1.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/zext-inreg-1.ll (original)
+++ llvm/trunk/test/CodeGen/X86/zext-inreg-1.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | not grep and
+; RUN: llc < %s -mtriple=i686-- | not grep and
; These tests differ from the ones in zext-inreg-0.ll in that
; on x86-64 they do require and instructions.
Modified: llvm/trunk/test/CodeGen/X86/zlib-longest-match.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/zlib-longest-match.ll?rev=309774&r1=309773&r2=309774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/zlib-longest-match.ll (original)
+++ llvm/trunk/test/CodeGen/X86/zlib-longest-match.ll Tue Aug 1 17:28:10 2017
@@ -1,4 +1,4 @@
-; RUN: llc -march=x86-64 < %s -block-placement-exit-block-bias=20 -no-phi-elim-live-out-early-exit | FileCheck %s
+; RUN: llc < %s -block-placement-exit-block-bias=20 -no-phi-elim-live-out-early-exit | FileCheck %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
target triple = "x86_64-apple-macosx10.9.0"
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