[PATCH] D36104: [AArch64] Coalesce Copy Zero during instruction selection

[Haicheng Wu via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL309748: [AArch64] Fix a typo in isExtFreeImpl() (authored by haicheng).

Changed prior to commit:
  https://reviews.llvm.org/D36104?vs=108957&id=109225#toc

Repository:
  rL LLVM

https://reviews.llvm.org/D36104

Files:
  llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp


Index: llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp
===================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -7421,7 +7421,7 @@
   if (isa<FPExtInst>(Ext))
     return false;
 
-  // Vector types are next free.
+  // Vector types are not free.
   if (Ext->getType()->isVectorTy())
     return false;
 


-------------- next part --------------
A non-text attachment was scrubbed...
Name: D36104.109225.patch
Type: text/x-patch
Size: 441 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20170801/c46ae15e/attachment.bin>