[PATCH] D36158: [DAG] Allow merging of stores of vector loads

Nirav Dave via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Aug 1 11:22:33 PDT 2017


niravd updated this revision to Diff 109163.
niravd edited the summary of this revision.
niravd added a comment.

Fold away type modification into landed NFC patch


https://reviews.llvm.org/D36158

Files:
  lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  test/CodeGen/X86/MergeConsecutiveStores.ll


Index: test/CodeGen/X86/MergeConsecutiveStores.ll
===================================================================
--- test/CodeGen/X86/MergeConsecutiveStores.ll
+++ test/CodeGen/X86/MergeConsecutiveStores.ll
@@ -535,10 +535,9 @@
   ret void
 
 ; CHECK-LABEL: merge_vec_stores_from_loads
-; CHECK:      vmovaps
-; CHECK-NEXT: vmovaps
-; CHECK-NEXT: vmovaps
-; CHECK-NEXT: vmovaps
+; CHECK:      vmovups (%rdi), %ymm0
+; CHECK-NEXT: vmovups %ymm0, (%rsi)
+; CHECK-NEXT: vzeroupper      
 ; CHECK-NEXT: retq
 }
 
Index: lib/CodeGen/SelectionDAG/DAGCombiner.cpp
===================================================================
--- lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -12704,12 +12704,6 @@
   if (!IsConstantSrc && !IsLoadSrc && !IsExtractVecSrc)
     return false;
 
-  // Don't merge vectors into wider vectors if the source data comes from loads.
-  // TODO: This restriction can be lifted by using logic similar to the
-  // ExtractVecSrc case.
-  if (MemVT.isVector() && IsLoadSrc)
-    return false;
-
   SmallVector<MemOpLink, 8> StoreNodes;
   // Find potential store merge candidates by searching through chain sub-DAG
   getStoreMergeCandidates(St, StoreNodes);


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