[PATCH] D36151: [GlobalISel] Only merge memory ops for mayLoad or mayStore instrs.

[Florian Hahn via Phabricator via llvm-commits]

fhahn created this revision.
Herald added subscribers: kristof.beyls, igorb, aemerson.

The MachineVerifier expects instructions to have memory operands only
for instructions with the mayLoad or mayStore flags. I think we only
have to merge memory operands for instructions that access memory.

Because the GIR_MergeMemOperands action was executed for most
instructions, memory operands of input values have been added to
instructions that do not access memory, which caused
test/CodeGen/ARM/GlobalISel/arm-isel.ll to fail with expensive checks
enabled for ARM.


https://reviews.llvm.org/D36151

Files:
  test/TableGen/GlobalISelEmitter.td
  utils/TableGen/GlobalISelEmitter.cpp

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