[PATCH] D35785: [AsmParser][AVX512]Enhance OpMask/Zero/Merge syntax check rubostness

[michael zuckerman via Phabricator via llvm-commits]

m_zuckerman added inline comments.


================
Comment at: test/MC/X86/avx512-err.s:8
+// ERR: Expected a {z} mark at this point
+vfmsub213ps %zmm8, %zmm8, %zmm8{%k2} {rn-sae}
+
----------------
So why this is an error? you mustn't have the {z} mask before the {rn-sae}. 
Again according to the ISA section 2.5.4 
https://software.intel.com/sites/default/files/managed/07/b7/319433-023.pdf
for example: 
vaddps zmm7 {k6}, zmm2, zmm4, {rd-sae}



================
Comment at: test/MC/X86/avx512-err.s:10
+
+// ERR: Expected an op-mask register at this point
+vfmsub213ps %zmm8, %zmm8, %zmm8 {rn-sae}
----------------
coby wrote:
> m_zuckerman wrote:
> > why is this error a true? 
> > according to the ISA, the instruction can optionally have op mask.  
> The error due to the misplacing of the rounding (rn-sae) mark (line 11).
> Only an OpMask / Zero mark is allowed to immediately follow a destination operand.
can you add also the intel syntax test since it is written in a different way? The location of the mask is the first and not the last.

For example: 
vaddps zmm7 {k6}, zmm2, zmm4, {rd-sae}

and see that you are getting the same error when you insert 
vaddps zmm7 , zmm2, zmm4, {rd-sae}



Repository:
  rL LLVM

https://reviews.llvm.org/D35785